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From: Matt Ranostay <mranostay@ti.com>
To: <rogerq@kernel.org>, <lpieralisi@kernel.org>, <robh@kernel.org>,
	<kw@linux.com>, <bhelgaas@google.com>,
	<krzysztof.kozlowski@linaro.org>, <vigneshr@ti.com>,
	<tjoseph@cadence.com>, <sergio.paracuellos@gmail.com>,
	<pthombar@cadence.com>, <linux-pci@vger.kernel.org>
Cc: <devicetree@vger.kernel.org>,
	<linux-arm-kernel@lists.infradead.org>,
	<linux-omap@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
	Matt Ranostay <mranostay@ti.com>
Subject: [PATCH v7 1/5] dt-bindings: PCI: ti,j721e-pci-*: add checks for num-lanes
Date: Thu, 24 Nov 2022 00:12:17 -0800	[thread overview]
Message-ID: <20221124081221.1206167-2-mranostay@ti.com> (raw)
In-Reply-To: <20221124081221.1206167-1-mranostay@ti.com>

Add num-lanes schema checks based on compatible string on available lanes
for that platform.

Signed-off-by: Matt Ranostay <mranostay@ti.com>
---
 .../bindings/pci/ti,j721e-pci-ep.yaml         | 28 +++++++++++++++++--
 .../bindings/pci/ti,j721e-pci-host.yaml       | 28 +++++++++++++++++--
 2 files changed, 50 insertions(+), 6 deletions(-)

diff --git a/Documentation/devicetree/bindings/pci/ti,j721e-pci-ep.yaml b/Documentation/devicetree/bindings/pci/ti,j721e-pci-ep.yaml
index 10e6eabdff53..1aeea168d3d0 100644
--- a/Documentation/devicetree/bindings/pci/ti,j721e-pci-ep.yaml
+++ b/Documentation/devicetree/bindings/pci/ti,j721e-pci-ep.yaml
@@ -10,9 +10,6 @@ title: TI J721E PCI EP (PCIe Wrapper)
 maintainers:
   - Kishon Vijay Abraham I <kishon@ti.com>
 
-allOf:
-  - $ref: "cdns-pcie-ep.yaml#"
-
 properties:
   compatible:
     oneOf:
@@ -65,6 +62,31 @@ properties:
     items:
       - const: link_state
 
+allOf:
+  - $ref: "cdns-pcie-ep.yaml#"
+  - if:
+      properties:
+        compatible:
+          enum:
+            - ti,am64-pcie-ep
+    then:
+      properties:
+        num-lanes:
+          minimum: 1
+          maximum: 1
+
+  - if:
+      properties:
+        compatible:
+          enum:
+            - ti,j7200-pcie-ep
+            - ti,j721e-pcie-ep
+    then:
+      properties:
+        num-lanes:
+          minimum: 1
+          maximum: 2
+
 required:
   - compatible
   - reg
diff --git a/Documentation/devicetree/bindings/pci/ti,j721e-pci-host.yaml b/Documentation/devicetree/bindings/pci/ti,j721e-pci-host.yaml
index b0513b197d08..8eca0d08303f 100644
--- a/Documentation/devicetree/bindings/pci/ti,j721e-pci-host.yaml
+++ b/Documentation/devicetree/bindings/pci/ti,j721e-pci-host.yaml
@@ -10,9 +10,6 @@ title: TI J721E PCI Host (PCIe Wrapper)
 maintainers:
   - Kishon Vijay Abraham I <kishon@ti.com>
 
-allOf:
-  - $ref: "cdns-pcie-host.yaml#"
-
 properties:
   compatible:
     oneOf:
@@ -98,6 +95,31 @@ properties:
       interrupts:
         maxItems: 1
 
+allOf:
+  - $ref: "cdns-pcie-host.yaml#"
+  - if:
+      properties:
+        compatible:
+          enum:
+            - ti,am64-pcie-host
+    then:
+      properties:
+        num-lanes:
+          minimum: 1
+          maximum: 1
+
+  - if:
+      properties:
+        compatible:
+          enum:
+            - ti,j7200-pcie-host
+            - ti,j721e-pcie-host
+    then:
+      properties:
+        num-lanes:
+          minimum: 1
+          maximum: 2
+
 required:
   - compatible
   - reg
-- 
2.38.GIT


WARNING: multiple messages have this Message-ID (diff)
From: Matt Ranostay <mranostay@ti.com>
To: <rogerq@kernel.org>, <lpieralisi@kernel.org>, <robh@kernel.org>,
	<kw@linux.com>, <bhelgaas@google.com>,
	<krzysztof.kozlowski@linaro.org>, <vigneshr@ti.com>,
	<tjoseph@cadence.com>, <sergio.paracuellos@gmail.com>,
	<pthombar@cadence.com>, <linux-pci@vger.kernel.org>
Cc: <devicetree@vger.kernel.org>,
	<linux-arm-kernel@lists.infradead.org>,
	<linux-omap@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
	Matt Ranostay <mranostay@ti.com>
Subject: [PATCH v7 1/5] dt-bindings: PCI: ti,j721e-pci-*: add checks for num-lanes
Date: Thu, 24 Nov 2022 00:12:17 -0800	[thread overview]
Message-ID: <20221124081221.1206167-2-mranostay@ti.com> (raw)
In-Reply-To: <20221124081221.1206167-1-mranostay@ti.com>

Add num-lanes schema checks based on compatible string on available lanes
for that platform.

Signed-off-by: Matt Ranostay <mranostay@ti.com>
---
 .../bindings/pci/ti,j721e-pci-ep.yaml         | 28 +++++++++++++++++--
 .../bindings/pci/ti,j721e-pci-host.yaml       | 28 +++++++++++++++++--
 2 files changed, 50 insertions(+), 6 deletions(-)

diff --git a/Documentation/devicetree/bindings/pci/ti,j721e-pci-ep.yaml b/Documentation/devicetree/bindings/pci/ti,j721e-pci-ep.yaml
index 10e6eabdff53..1aeea168d3d0 100644
--- a/Documentation/devicetree/bindings/pci/ti,j721e-pci-ep.yaml
+++ b/Documentation/devicetree/bindings/pci/ti,j721e-pci-ep.yaml
@@ -10,9 +10,6 @@ title: TI J721E PCI EP (PCIe Wrapper)
 maintainers:
   - Kishon Vijay Abraham I <kishon@ti.com>
 
-allOf:
-  - $ref: "cdns-pcie-ep.yaml#"
-
 properties:
   compatible:
     oneOf:
@@ -65,6 +62,31 @@ properties:
     items:
       - const: link_state
 
+allOf:
+  - $ref: "cdns-pcie-ep.yaml#"
+  - if:
+      properties:
+        compatible:
+          enum:
+            - ti,am64-pcie-ep
+    then:
+      properties:
+        num-lanes:
+          minimum: 1
+          maximum: 1
+
+  - if:
+      properties:
+        compatible:
+          enum:
+            - ti,j7200-pcie-ep
+            - ti,j721e-pcie-ep
+    then:
+      properties:
+        num-lanes:
+          minimum: 1
+          maximum: 2
+
 required:
   - compatible
   - reg
diff --git a/Documentation/devicetree/bindings/pci/ti,j721e-pci-host.yaml b/Documentation/devicetree/bindings/pci/ti,j721e-pci-host.yaml
index b0513b197d08..8eca0d08303f 100644
--- a/Documentation/devicetree/bindings/pci/ti,j721e-pci-host.yaml
+++ b/Documentation/devicetree/bindings/pci/ti,j721e-pci-host.yaml
@@ -10,9 +10,6 @@ title: TI J721E PCI Host (PCIe Wrapper)
 maintainers:
   - Kishon Vijay Abraham I <kishon@ti.com>
 
-allOf:
-  - $ref: "cdns-pcie-host.yaml#"
-
 properties:
   compatible:
     oneOf:
@@ -98,6 +95,31 @@ properties:
       interrupts:
         maxItems: 1
 
+allOf:
+  - $ref: "cdns-pcie-host.yaml#"
+  - if:
+      properties:
+        compatible:
+          enum:
+            - ti,am64-pcie-host
+    then:
+      properties:
+        num-lanes:
+          minimum: 1
+          maximum: 1
+
+  - if:
+      properties:
+        compatible:
+          enum:
+            - ti,j7200-pcie-host
+            - ti,j721e-pcie-host
+    then:
+      properties:
+        num-lanes:
+          minimum: 1
+          maximum: 2
+
 required:
   - compatible
   - reg
-- 
2.38.GIT


_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

  reply	other threads:[~2022-11-24  8:14 UTC|newest]

Thread overview: 25+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-11-24  8:12 [PATCH v7 0/5] PCI: add 4x lane support for pci-j721e controllers Matt Ranostay
2022-11-24  8:12 ` Matt Ranostay
2022-11-24  8:12 ` Matt Ranostay [this message]
2022-11-24  8:12   ` [PATCH v7 1/5] dt-bindings: PCI: ti,j721e-pci-*: add checks for num-lanes Matt Ranostay
2022-11-26 14:30   ` Krzysztof Kozlowski
2022-11-26 14:30     ` Krzysztof Kozlowski
2022-11-24  8:12 ` [PATCH v7 2/5] PCI: j721e: Add per platform maximum lane settings Matt Ranostay
2022-11-24  8:12   ` Matt Ranostay
2022-11-25 12:27   ` Roger Quadros
2022-11-25 12:27     ` Roger Quadros
2022-11-24  8:12 ` [PATCH v7 3/5] PCI: j721e: Add PCIe 4x lane selection support Matt Ranostay
2022-11-24  8:12   ` Matt Ranostay
2022-11-25 12:31   ` Roger Quadros
2022-11-25 12:31     ` Roger Quadros
2023-02-02 16:09   ` Lorenzo Pieralisi
2023-02-02 16:09     ` Lorenzo Pieralisi
2022-11-24  8:12 ` [PATCH v7 4/5] dt-bindings: PCI: ti,j721e-pci-*: add j784s4-pci-* compatible strings Matt Ranostay
2022-11-24  8:12   ` Matt Ranostay
2022-11-26 14:30   ` Krzysztof Kozlowski
2022-11-26 14:30     ` Krzysztof Kozlowski
2022-11-24  8:12 ` [PATCH v7 5/5] PCI: j721e: add j784s4 PCIe configuration Matt Ranostay
2022-11-24  8:12   ` Matt Ranostay
2022-11-25 12:32   ` Roger Quadros
2022-11-25 12:32     ` Roger Quadros
2022-11-25 20:08   ` kernel test robot

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