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From: Jisheng Zhang <jszhang@kernel.org>
To: kvm-riscv@lists.infradead.org
Subject: [PATCH v3 07/13] riscv: fpu: switch has_fpu() to riscv_has_extension_likely()
Date: Thu, 12 Jan 2023 01:10:21 +0800	[thread overview]
Message-ID: <20230111171027.2392-8-jszhang@kernel.org> (raw)
In-Reply-To: <20230111171027.2392-1-jszhang@kernel.org>

Switch has_fpu() from statich branch to the new helper
riscv_has_extension_likely().

Signed-off-by: Jisheng Zhang <jszhang@kernel.org>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Reviewed-by: Heiko Stuebner <heiko@sntech.de>
---
 arch/riscv/include/asm/switch_to.h | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/arch/riscv/include/asm/switch_to.h b/arch/riscv/include/asm/switch_to.h
index 11463489fec6..60f8ca01d36e 100644
--- a/arch/riscv/include/asm/switch_to.h
+++ b/arch/riscv/include/asm/switch_to.h
@@ -59,7 +59,8 @@ static inline void __switch_to_aux(struct task_struct *prev,
 
 static __always_inline bool has_fpu(void)
 {
-	return static_branch_likely(&riscv_isa_ext_keys[RISCV_ISA_EXT_KEY_FPU]);
+	return riscv_has_extension_likely(RISCV_ISA_EXT_f) ||
+		riscv_has_extension_likely(RISCV_ISA_EXT_d);
 }
 #else
 static __always_inline bool has_fpu(void) { return false; }
-- 
2.38.1



WARNING: multiple messages have this Message-ID (diff)
From: Jisheng Zhang <jszhang@kernel.org>
To: Paul Walmsley <paul.walmsley@sifive.com>,
	Palmer Dabbelt <palmer@dabbelt.com>,
	Albert Ou <aou@eecs.berkeley.edu>,
	Anup Patel <anup@brainfault.org>,
	Atish Patra <atishp@atishpatra.org>,
	Heiko Stuebner <heiko@sntech.de>
Cc: linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org,
	kvm@vger.kernel.org, kvm-riscv@lists.infradead.org,
	Andrew Jones <ajones@ventanamicro.com>
Subject: [PATCH v3 07/13] riscv: fpu: switch has_fpu() to riscv_has_extension_likely()
Date: Thu, 12 Jan 2023 01:10:21 +0800	[thread overview]
Message-ID: <20230111171027.2392-8-jszhang@kernel.org> (raw)
In-Reply-To: <20230111171027.2392-1-jszhang@kernel.org>

Switch has_fpu() from statich branch to the new helper
riscv_has_extension_likely().

Signed-off-by: Jisheng Zhang <jszhang@kernel.org>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Reviewed-by: Heiko Stuebner <heiko@sntech.de>
---
 arch/riscv/include/asm/switch_to.h | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/arch/riscv/include/asm/switch_to.h b/arch/riscv/include/asm/switch_to.h
index 11463489fec6..60f8ca01d36e 100644
--- a/arch/riscv/include/asm/switch_to.h
+++ b/arch/riscv/include/asm/switch_to.h
@@ -59,7 +59,8 @@ static inline void __switch_to_aux(struct task_struct *prev,
 
 static __always_inline bool has_fpu(void)
 {
-	return static_branch_likely(&riscv_isa_ext_keys[RISCV_ISA_EXT_KEY_FPU]);
+	return riscv_has_extension_likely(RISCV_ISA_EXT_f) ||
+		riscv_has_extension_likely(RISCV_ISA_EXT_d);
 }
 #else
 static __always_inline bool has_fpu(void) { return false; }
-- 
2.38.1


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http://lists.infradead.org/mailman/listinfo/linux-riscv

WARNING: multiple messages have this Message-ID (diff)
From: Jisheng Zhang <jszhang@kernel.org>
To: Paul Walmsley <paul.walmsley@sifive.com>,
	Palmer Dabbelt <palmer@dabbelt.com>,
	Albert Ou <aou@eecs.berkeley.edu>,
	Anup Patel <anup@brainfault.org>,
	Atish Patra <atishp@atishpatra.org>,
	Heiko Stuebner <heiko@sntech.de>
Cc: linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org,
	kvm@vger.kernel.org, kvm-riscv@lists.infradead.org,
	Andrew Jones <ajones@ventanamicro.com>
Subject: [PATCH v3 07/13] riscv: fpu: switch has_fpu() to riscv_has_extension_likely()
Date: Thu, 12 Jan 2023 01:10:21 +0800	[thread overview]
Message-ID: <20230111171027.2392-8-jszhang@kernel.org> (raw)
In-Reply-To: <20230111171027.2392-1-jszhang@kernel.org>

Switch has_fpu() from statich branch to the new helper
riscv_has_extension_likely().

Signed-off-by: Jisheng Zhang <jszhang@kernel.org>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Reviewed-by: Heiko Stuebner <heiko@sntech.de>
---
 arch/riscv/include/asm/switch_to.h | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/arch/riscv/include/asm/switch_to.h b/arch/riscv/include/asm/switch_to.h
index 11463489fec6..60f8ca01d36e 100644
--- a/arch/riscv/include/asm/switch_to.h
+++ b/arch/riscv/include/asm/switch_to.h
@@ -59,7 +59,8 @@ static inline void __switch_to_aux(struct task_struct *prev,
 
 static __always_inline bool has_fpu(void)
 {
-	return static_branch_likely(&riscv_isa_ext_keys[RISCV_ISA_EXT_KEY_FPU]);
+	return riscv_has_extension_likely(RISCV_ISA_EXT_f) ||
+		riscv_has_extension_likely(RISCV_ISA_EXT_d);
 }
 #else
 static __always_inline bool has_fpu(void) { return false; }
-- 
2.38.1


  parent reply	other threads:[~2023-01-11 17:10 UTC|newest]

Thread overview: 108+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-01-11 17:10 [PATCH v3 00/13] riscv: improve boot time isa extensions handling Jisheng Zhang
2023-01-11 17:10 ` Jisheng Zhang
2023-01-11 17:10 ` Jisheng Zhang
2023-01-11 17:10 ` [PATCH v3 01/13] riscv: fix jal offsets in patched alternatives Jisheng Zhang
2023-01-11 17:10   ` Jisheng Zhang
2023-01-11 17:10   ` Jisheng Zhang
2023-01-11 17:56   ` Andrew Jones
2023-01-11 17:56     ` Andrew Jones
2023-01-11 17:56     ` Andrew Jones
2023-01-11 23:31   ` Heiko Stübner
2023-01-11 23:31     ` Heiko Stübner
2023-01-11 23:31     ` Heiko Stübner
2023-01-12 20:25     ` Conor Dooley
2023-01-12 20:25       ` Conor Dooley
2023-01-12 20:25       ` Conor Dooley
2023-01-11 17:10 ` [PATCH v3 02/13] riscv: move riscv_noncoherent_supported() out of ZICBOM probe Jisheng Zhang
2023-01-11 17:10   ` Jisheng Zhang
2023-01-11 17:10   ` Jisheng Zhang
2023-01-11 17:10 ` [PATCH v3 03/13] riscv: cpufeature: detect RISCV_ALTERNATIVES_EARLY_BOOT earlier Jisheng Zhang
2023-01-11 17:10   ` Jisheng Zhang
2023-01-11 17:10   ` Jisheng Zhang
2023-01-12 21:11   ` Conor Dooley
2023-01-12 21:11     ` Conor Dooley
2023-01-12 21:11     ` Conor Dooley
2023-01-11 17:10 ` [PATCH v3 04/13] riscv: hwcap: make ISA extension ids can be used in asm Jisheng Zhang
2023-01-11 17:10   ` Jisheng Zhang
2023-01-11 17:10   ` Jisheng Zhang
2023-01-12 21:28   ` Conor Dooley
2023-01-12 21:28     ` Conor Dooley
2023-01-12 21:28     ` Conor Dooley
2023-01-15 13:13     ` Jisheng Zhang
2023-01-15 13:13       ` Jisheng Zhang
2023-01-15 13:13       ` Jisheng Zhang
2023-01-11 17:10 ` [PATCH v3 05/13] riscv: cpufeature: extend riscv_cpufeature_patch_func to all ISA extensions Jisheng Zhang
2023-01-11 17:10   ` Jisheng Zhang
2023-01-11 17:10   ` Jisheng Zhang
2023-01-11 23:29   ` Heiko Stübner
2023-01-11 23:29     ` Heiko Stübner
2023-01-11 23:29     ` Heiko Stübner
2023-01-12  9:21     ` Andrew Jones
2023-01-12  9:21       ` Andrew Jones
2023-01-12  9:21       ` Andrew Jones
2023-01-13 15:18       ` Conor Dooley
2023-01-13 15:18         ` Conor Dooley
2023-01-13 15:18         ` Conor Dooley
2023-01-14 20:32         ` Conor Dooley
2023-01-14 20:32           ` Conor Dooley
2023-01-14 20:32           ` Conor Dooley
2023-01-18 21:54           ` Conor Dooley
2023-01-18 21:54             ` Conor Dooley
2023-01-18 21:54             ` Conor Dooley
2023-01-19  8:29             ` Andrew Jones
2023-01-19  8:29               ` Andrew Jones
2023-01-19  8:29               ` Andrew Jones
2023-01-19 22:13               ` Conor Dooley
2023-01-19 22:13                 ` Conor Dooley
2023-01-19 22:13                 ` Conor Dooley
2023-01-15 13:59       ` Jisheng Zhang
2023-01-15 13:59         ` Jisheng Zhang
2023-01-15 13:59         ` Jisheng Zhang
2023-01-15 14:19     ` Jisheng Zhang
2023-01-15 14:19       ` Jisheng Zhang
2023-01-15 14:19       ` Jisheng Zhang
2023-01-11 17:10 ` [PATCH v3 06/13] riscv: introduce riscv_has_extension_[un]likely() Jisheng Zhang
2023-01-11 17:10   ` Jisheng Zhang
2023-01-11 17:10   ` Jisheng Zhang
2023-01-11 17:10 ` Jisheng Zhang [this message]
2023-01-11 17:10   ` [PATCH v3 07/13] riscv: fpu: switch has_fpu() to riscv_has_extension_likely() Jisheng Zhang
2023-01-11 17:10   ` Jisheng Zhang
2023-01-12 21:58   ` Conor Dooley
2023-01-12 21:58     ` Conor Dooley
2023-01-12 21:58     ` Conor Dooley
2023-01-11 17:10 ` [PATCH v3 08/13] riscv: module: move find_section to module.h Jisheng Zhang
2023-01-11 17:10   ` Jisheng Zhang
2023-01-11 17:10   ` Jisheng Zhang
2023-01-11 17:10 ` [PATCH v3 09/13] riscv: switch to relative alternative entries Jisheng Zhang
2023-01-11 17:10   ` Jisheng Zhang
2023-01-11 17:10   ` Jisheng Zhang
2023-01-11 18:11   ` Andrew Jones
2023-01-11 18:11     ` Andrew Jones
2023-01-11 18:11     ` Andrew Jones
2023-01-12 21:49   ` Conor Dooley
2023-01-12 21:49     ` Conor Dooley
2023-01-12 21:49     ` Conor Dooley
2023-01-11 17:10 ` [PATCH v3 10/13] riscv: alternative: patch alternatives in the vDSO Jisheng Zhang
2023-01-11 17:10   ` Jisheng Zhang
2023-01-11 17:10   ` Jisheng Zhang
2023-01-11 23:55   ` kernel test robot
2023-01-11 23:55     ` kernel test robot
2023-01-11 23:55     ` kernel test robot
2023-01-12  7:48   ` Conor Dooley
2023-01-12  7:48     ` Conor Dooley
2023-01-12  7:48     ` Conor Dooley
2023-01-12 21:55     ` Conor Dooley
2023-01-12 21:55       ` Conor Dooley
2023-01-12 21:55       ` Conor Dooley
2023-01-11 17:10 ` [PATCH v3 11/13] riscv: cpu_relax: switch to riscv_has_extension_likely() Jisheng Zhang
2023-01-11 17:10   ` Jisheng Zhang
2023-01-11 17:10   ` Jisheng Zhang
2023-01-12 21:59   ` Conor Dooley
2023-01-12 21:59     ` Conor Dooley
2023-01-12 21:59     ` Conor Dooley
2023-01-11 17:10 ` [PATCH v3 12/13] riscv: KVM: Switch has_svinval() to riscv_has_extension_unlikely() Jisheng Zhang
2023-01-11 17:10   ` Jisheng Zhang
2023-01-11 17:10   ` Jisheng Zhang
2023-01-11 17:10 ` [PATCH v3 13/13] riscv: remove riscv_isa_ext_keys[] array and related usage Jisheng Zhang
2023-01-11 17:10   ` Jisheng Zhang
2023-01-11 17:10   ` Jisheng Zhang

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