From: Conor Dooley <conor@kernel.org>
To: kvm-riscv@lists.infradead.org
Subject: [PATCH v3 07/13] riscv: fpu: switch has_fpu() to riscv_has_extension_likely()
Date: Thu, 12 Jan 2023 21:58:28 +0000 [thread overview]
Message-ID: <Y8CChK9XBXTcT9wn@spud> (raw)
In-Reply-To: <20230111171027.2392-8-jszhang@kernel.org>
On Thu, Jan 12, 2023 at 01:10:21AM +0800, Jisheng Zhang wrote:
> Switch has_fpu() from statich branch to the new helper
s/statich/static
> riscv_has_extension_likely().
>
> Signed-off-by: Jisheng Zhang <jszhang@kernel.org>
> Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
> Reviewed-by: Heiko Stuebner <heiko@sntech.de>
Modulo whatever psuedo-cpufeature shenanigans require renaming the
function, you can tack my name onto this list also...
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Thanks,
Conor.
> ---
> arch/riscv/include/asm/switch_to.h | 3 ++-
> 1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/arch/riscv/include/asm/switch_to.h b/arch/riscv/include/asm/switch_to.h
> index 11463489fec6..60f8ca01d36e 100644
> --- a/arch/riscv/include/asm/switch_to.h
> +++ b/arch/riscv/include/asm/switch_to.h
> @@ -59,7 +59,8 @@ static inline void __switch_to_aux(struct task_struct *prev,
>
> static __always_inline bool has_fpu(void)
> {
> - return static_branch_likely(&riscv_isa_ext_keys[RISCV_ISA_EXT_KEY_FPU]);
> + return riscv_has_extension_likely(RISCV_ISA_EXT_f) ||
> + riscv_has_extension_likely(RISCV_ISA_EXT_d);
> }
> #else
> static __always_inline bool has_fpu(void) { return false; }
> --
> 2.38.1
>
>
> _______________________________________________
> linux-riscv mailing list
> linux-riscv at lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-riscv
-------------- next part --------------
A non-text attachment was scrubbed...
Name: signature.asc
Type: application/pgp-signature
Size: 228 bytes
Desc: not available
URL: <http://lists.infradead.org/pipermail/kvm-riscv/attachments/20230112/ddc4c7f7/attachment-0001.sig>
WARNING: multiple messages have this Message-ID (diff)
From: Conor Dooley <conor@kernel.org>
To: Jisheng Zhang <jszhang@kernel.org>
Cc: Paul Walmsley <paul.walmsley@sifive.com>,
Palmer Dabbelt <palmer@dabbelt.com>,
Albert Ou <aou@eecs.berkeley.edu>,
Anup Patel <anup@brainfault.org>,
Atish Patra <atishp@atishpatra.org>,
Heiko Stuebner <heiko@sntech.de>,
linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org,
kvm@vger.kernel.org, kvm-riscv@lists.infradead.org,
Andrew Jones <ajones@ventanamicro.com>
Subject: Re: [PATCH v3 07/13] riscv: fpu: switch has_fpu() to riscv_has_extension_likely()
Date: Thu, 12 Jan 2023 21:58:28 +0000 [thread overview]
Message-ID: <Y8CChK9XBXTcT9wn@spud> (raw)
In-Reply-To: <20230111171027.2392-8-jszhang@kernel.org>
[-- Attachment #1.1: Type: text/plain, Size: 1473 bytes --]
On Thu, Jan 12, 2023 at 01:10:21AM +0800, Jisheng Zhang wrote:
> Switch has_fpu() from statich branch to the new helper
s/statich/static
> riscv_has_extension_likely().
>
> Signed-off-by: Jisheng Zhang <jszhang@kernel.org>
> Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
> Reviewed-by: Heiko Stuebner <heiko@sntech.de>
Modulo whatever psuedo-cpufeature shenanigans require renaming the
function, you can tack my name onto this list also...
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Thanks,
Conor.
> ---
> arch/riscv/include/asm/switch_to.h | 3 ++-
> 1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/arch/riscv/include/asm/switch_to.h b/arch/riscv/include/asm/switch_to.h
> index 11463489fec6..60f8ca01d36e 100644
> --- a/arch/riscv/include/asm/switch_to.h
> +++ b/arch/riscv/include/asm/switch_to.h
> @@ -59,7 +59,8 @@ static inline void __switch_to_aux(struct task_struct *prev,
>
> static __always_inline bool has_fpu(void)
> {
> - return static_branch_likely(&riscv_isa_ext_keys[RISCV_ISA_EXT_KEY_FPU]);
> + return riscv_has_extension_likely(RISCV_ISA_EXT_f) ||
> + riscv_has_extension_likely(RISCV_ISA_EXT_d);
> }
> #else
> static __always_inline bool has_fpu(void) { return false; }
> --
> 2.38.1
>
>
> _______________________________________________
> linux-riscv mailing list
> linux-riscv@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-riscv
[-- Attachment #1.2: signature.asc --]
[-- Type: application/pgp-signature, Size: 228 bytes --]
[-- Attachment #2: Type: text/plain, Size: 161 bytes --]
_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv
WARNING: multiple messages have this Message-ID (diff)
From: Conor Dooley <conor@kernel.org>
To: Jisheng Zhang <jszhang@kernel.org>
Cc: Paul Walmsley <paul.walmsley@sifive.com>,
Palmer Dabbelt <palmer@dabbelt.com>,
Albert Ou <aou@eecs.berkeley.edu>,
Anup Patel <anup@brainfault.org>,
Atish Patra <atishp@atishpatra.org>,
Heiko Stuebner <heiko@sntech.de>,
linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org,
kvm@vger.kernel.org, kvm-riscv@lists.infradead.org,
Andrew Jones <ajones@ventanamicro.com>
Subject: Re: [PATCH v3 07/13] riscv: fpu: switch has_fpu() to riscv_has_extension_likely()
Date: Thu, 12 Jan 2023 21:58:28 +0000 [thread overview]
Message-ID: <Y8CChK9XBXTcT9wn@spud> (raw)
In-Reply-To: <20230111171027.2392-8-jszhang@kernel.org>
[-- Attachment #1: Type: text/plain, Size: 1473 bytes --]
On Thu, Jan 12, 2023 at 01:10:21AM +0800, Jisheng Zhang wrote:
> Switch has_fpu() from statich branch to the new helper
s/statich/static
> riscv_has_extension_likely().
>
> Signed-off-by: Jisheng Zhang <jszhang@kernel.org>
> Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
> Reviewed-by: Heiko Stuebner <heiko@sntech.de>
Modulo whatever psuedo-cpufeature shenanigans require renaming the
function, you can tack my name onto this list also...
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Thanks,
Conor.
> ---
> arch/riscv/include/asm/switch_to.h | 3 ++-
> 1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/arch/riscv/include/asm/switch_to.h b/arch/riscv/include/asm/switch_to.h
> index 11463489fec6..60f8ca01d36e 100644
> --- a/arch/riscv/include/asm/switch_to.h
> +++ b/arch/riscv/include/asm/switch_to.h
> @@ -59,7 +59,8 @@ static inline void __switch_to_aux(struct task_struct *prev,
>
> static __always_inline bool has_fpu(void)
> {
> - return static_branch_likely(&riscv_isa_ext_keys[RISCV_ISA_EXT_KEY_FPU]);
> + return riscv_has_extension_likely(RISCV_ISA_EXT_f) ||
> + riscv_has_extension_likely(RISCV_ISA_EXT_d);
> }
> #else
> static __always_inline bool has_fpu(void) { return false; }
> --
> 2.38.1
>
>
> _______________________________________________
> linux-riscv mailing list
> linux-riscv@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-riscv
[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 228 bytes --]
next prev parent reply other threads:[~2023-01-12 21:58 UTC|newest]
Thread overview: 108+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-01-11 17:10 [PATCH v3 00/13] riscv: improve boot time isa extensions handling Jisheng Zhang
2023-01-11 17:10 ` Jisheng Zhang
2023-01-11 17:10 ` Jisheng Zhang
2023-01-11 17:10 ` [PATCH v3 01/13] riscv: fix jal offsets in patched alternatives Jisheng Zhang
2023-01-11 17:10 ` Jisheng Zhang
2023-01-11 17:10 ` Jisheng Zhang
2023-01-11 17:56 ` Andrew Jones
2023-01-11 17:56 ` Andrew Jones
2023-01-11 17:56 ` Andrew Jones
2023-01-11 23:31 ` Heiko Stübner
2023-01-11 23:31 ` Heiko Stübner
2023-01-11 23:31 ` Heiko Stübner
2023-01-12 20:25 ` Conor Dooley
2023-01-12 20:25 ` Conor Dooley
2023-01-12 20:25 ` Conor Dooley
2023-01-11 17:10 ` [PATCH v3 02/13] riscv: move riscv_noncoherent_supported() out of ZICBOM probe Jisheng Zhang
2023-01-11 17:10 ` Jisheng Zhang
2023-01-11 17:10 ` Jisheng Zhang
2023-01-11 17:10 ` [PATCH v3 03/13] riscv: cpufeature: detect RISCV_ALTERNATIVES_EARLY_BOOT earlier Jisheng Zhang
2023-01-11 17:10 ` Jisheng Zhang
2023-01-11 17:10 ` Jisheng Zhang
2023-01-12 21:11 ` Conor Dooley
2023-01-12 21:11 ` Conor Dooley
2023-01-12 21:11 ` Conor Dooley
2023-01-11 17:10 ` [PATCH v3 04/13] riscv: hwcap: make ISA extension ids can be used in asm Jisheng Zhang
2023-01-11 17:10 ` Jisheng Zhang
2023-01-11 17:10 ` Jisheng Zhang
2023-01-12 21:28 ` Conor Dooley
2023-01-12 21:28 ` Conor Dooley
2023-01-12 21:28 ` Conor Dooley
2023-01-15 13:13 ` Jisheng Zhang
2023-01-15 13:13 ` Jisheng Zhang
2023-01-15 13:13 ` Jisheng Zhang
2023-01-11 17:10 ` [PATCH v3 05/13] riscv: cpufeature: extend riscv_cpufeature_patch_func to all ISA extensions Jisheng Zhang
2023-01-11 17:10 ` Jisheng Zhang
2023-01-11 17:10 ` Jisheng Zhang
2023-01-11 23:29 ` Heiko Stübner
2023-01-11 23:29 ` Heiko Stübner
2023-01-11 23:29 ` Heiko Stübner
2023-01-12 9:21 ` Andrew Jones
2023-01-12 9:21 ` Andrew Jones
2023-01-12 9:21 ` Andrew Jones
2023-01-13 15:18 ` Conor Dooley
2023-01-13 15:18 ` Conor Dooley
2023-01-13 15:18 ` Conor Dooley
2023-01-14 20:32 ` Conor Dooley
2023-01-14 20:32 ` Conor Dooley
2023-01-14 20:32 ` Conor Dooley
2023-01-18 21:54 ` Conor Dooley
2023-01-18 21:54 ` Conor Dooley
2023-01-18 21:54 ` Conor Dooley
2023-01-19 8:29 ` Andrew Jones
2023-01-19 8:29 ` Andrew Jones
2023-01-19 8:29 ` Andrew Jones
2023-01-19 22:13 ` Conor Dooley
2023-01-19 22:13 ` Conor Dooley
2023-01-19 22:13 ` Conor Dooley
2023-01-15 13:59 ` Jisheng Zhang
2023-01-15 13:59 ` Jisheng Zhang
2023-01-15 13:59 ` Jisheng Zhang
2023-01-15 14:19 ` Jisheng Zhang
2023-01-15 14:19 ` Jisheng Zhang
2023-01-15 14:19 ` Jisheng Zhang
2023-01-11 17:10 ` [PATCH v3 06/13] riscv: introduce riscv_has_extension_[un]likely() Jisheng Zhang
2023-01-11 17:10 ` Jisheng Zhang
2023-01-11 17:10 ` Jisheng Zhang
2023-01-11 17:10 ` [PATCH v3 07/13] riscv: fpu: switch has_fpu() to riscv_has_extension_likely() Jisheng Zhang
2023-01-11 17:10 ` Jisheng Zhang
2023-01-11 17:10 ` Jisheng Zhang
2023-01-12 21:58 ` Conor Dooley [this message]
2023-01-12 21:58 ` Conor Dooley
2023-01-12 21:58 ` Conor Dooley
2023-01-11 17:10 ` [PATCH v3 08/13] riscv: module: move find_section to module.h Jisheng Zhang
2023-01-11 17:10 ` Jisheng Zhang
2023-01-11 17:10 ` Jisheng Zhang
2023-01-11 17:10 ` [PATCH v3 09/13] riscv: switch to relative alternative entries Jisheng Zhang
2023-01-11 17:10 ` Jisheng Zhang
2023-01-11 17:10 ` Jisheng Zhang
2023-01-11 18:11 ` Andrew Jones
2023-01-11 18:11 ` Andrew Jones
2023-01-11 18:11 ` Andrew Jones
2023-01-12 21:49 ` Conor Dooley
2023-01-12 21:49 ` Conor Dooley
2023-01-12 21:49 ` Conor Dooley
2023-01-11 17:10 ` [PATCH v3 10/13] riscv: alternative: patch alternatives in the vDSO Jisheng Zhang
2023-01-11 17:10 ` Jisheng Zhang
2023-01-11 17:10 ` Jisheng Zhang
2023-01-11 23:55 ` kernel test robot
2023-01-11 23:55 ` kernel test robot
2023-01-11 23:55 ` kernel test robot
2023-01-12 7:48 ` Conor Dooley
2023-01-12 7:48 ` Conor Dooley
2023-01-12 7:48 ` Conor Dooley
2023-01-12 21:55 ` Conor Dooley
2023-01-12 21:55 ` Conor Dooley
2023-01-12 21:55 ` Conor Dooley
2023-01-11 17:10 ` [PATCH v3 11/13] riscv: cpu_relax: switch to riscv_has_extension_likely() Jisheng Zhang
2023-01-11 17:10 ` Jisheng Zhang
2023-01-11 17:10 ` Jisheng Zhang
2023-01-12 21:59 ` Conor Dooley
2023-01-12 21:59 ` Conor Dooley
2023-01-12 21:59 ` Conor Dooley
2023-01-11 17:10 ` [PATCH v3 12/13] riscv: KVM: Switch has_svinval() to riscv_has_extension_unlikely() Jisheng Zhang
2023-01-11 17:10 ` Jisheng Zhang
2023-01-11 17:10 ` Jisheng Zhang
2023-01-11 17:10 ` [PATCH v3 13/13] riscv: remove riscv_isa_ext_keys[] array and related usage Jisheng Zhang
2023-01-11 17:10 ` Jisheng Zhang
2023-01-11 17:10 ` Jisheng Zhang
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=Y8CChK9XBXTcT9wn@spud \
--to=conor@kernel.org \
--cc=kvm-riscv@lists.infradead.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.