From: Herve Codina <herve.codina@bootlin.com>
To: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Cc: Li Yang <leoyang.li@nxp.com>, Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Liam Girdwood <lgirdwood@gmail.com>,
Mark Brown <broonie@kernel.org>,
Christophe Leroy <christophe.leroy@csgroup.eu>,
Michael Ellerman <mpe@ellerman.id.au>,
Nicholas Piggin <npiggin@gmail.com>,
Qiang Zhao <qiang.zhao@nxp.com>, Takashi Iwai <tiwai@suse.com>,
Shengjiu Wang <shengjiu.wang@gmail.com>,
Xiubo Li <Xiubo.Lee@gmail.com>,
Fabio Estevam <festevam@gmail.com>,
Nicolin Chen <nicoleotsuka@gmail.com>,
linuxppc-dev@lists.ozlabs.org,
linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org, alsa-devel@alsa-project.org,
Thomas Petazzoni <thomas.petazzoni@bootlin.com>
Subject: Re: [PATCH v5 01/10] dt-bindings: soc: fsl: cpm_qe: Add TSA controller
Date: Fri, 17 Feb 2023 14:50:19 +0100 [thread overview]
Message-ID: <20230217145019.0def6f9a@bootlin.com> (raw)
In-Reply-To: <6ae9af19-1d52-c31f-79be-a36f06caaf80@linaro.org>
Hi Krzysztof,
On Fri, 17 Feb 2023 10:14:48 +0100
Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> wrote:
> On 16/02/2023 14:42, Herve Codina wrote:
> > Add support for the time slot assigner (TSA)
> > available in some PowerQUICC SoC such as MPC885
> > or MPC866.
> >
> > Signed-off-by: Herve Codina <herve.codina@bootlin.com>
> > ---
> > .../bindings/soc/fsl/cpm_qe/fsl,cpm1-tsa.yaml | 234 ++++++++++++++++++
> > include/dt-bindings/soc/fsl,tsa.h | 13 +
> > 2 files changed, 247 insertions(+)
> > create mode 100644 Documentation/devicetree/bindings/soc/fsl/cpm_qe/fsl,cpm1-tsa.yaml
> > create mode 100644 include/dt-bindings/soc/fsl,tsa.h
[...]
> > +
> > +patternProperties:
> > + '^tdm@[0-1]$':
> > + description:
> > + The TDM managed by this controller
> > + type: object
> > +
> > + additionalProperties: false
> > +
> > + properties:
> > + reg:
> > + minimum: 0
> > + maximum: 1
> > + description:
> > + The TDM number for this TDM, 0 for TDMa and 1 for TDMb
[...]
> > +
> > + fsl,rx-frame-sync-delay-bits:
> > + enum: [0, 1, 2, 3]
>
> maxItems: 1
The property is an enum
Why this maxItems value ?
If I add the maxItems value, I've got some dt_binding_check errors:
/xxxx/bindings/soc/fsl/cpm_qe/fsl,cpm1-tsa.yaml:
patternProperties:^tdm@[0-1]$:properties:fsl,rx-frame-sync-delay-bits:
'enum' should not be valid under {'enum': ['const', 'enum', 'exclusiveMaximum', 'exclusiveMinimum', 'minimum', 'maximum', 'multipleOf', 'pattern']}
hint: Scalar and array keywords cannot be mixed
from schema $id: http://devicetree.org/meta-schemas/keywords.yaml#
>
> > + default: 0
> > + description: |
> > + Receive frame sync delay in number of bits.
> > + Indicates the delay between the Rx sync and the first bit of the Rx
> > + frame. 0 for no bit delay. 1, 2 or 3 for 1, 2 or 3 bits delay.
> > +
> > + fsl,tx-frame-sync-delay-bits:
> > + enum: [0, 1, 2, 3]
>
> maxItems: 1
Same question here.
Thanks for the review,
Hervé
--
Hervé Codina, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
WARNING: multiple messages have this Message-ID (diff)
From: Herve Codina <herve.codina@bootlin.com>
To: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Cc: devicetree@vger.kernel.org, alsa-devel@alsa-project.org,
Fabio Estevam <festevam@gmail.com>,
linux-kernel@vger.kernel.org,
Thomas Petazzoni <thomas.petazzoni@bootlin.com>,
Xiubo Li <Xiubo.Lee@gmail.com>, Takashi Iwai <tiwai@suse.com>,
Nicholas Piggin <npiggin@gmail.com>,
Liam Girdwood <lgirdwood@gmail.com>,
Rob Herring <robh+dt@kernel.org>, Li Yang <leoyang.li@nxp.com>,
Nicolin Chen <nicoleotsuka@gmail.com>,
linuxppc-dev@lists.ozlabs.org, Mark Brown <broonie@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Jaroslav Kysela <perex@perex.cz>,
Shengjiu Wang <shengjiu.wang@gmail.com>,
linux-arm-kernel@lists.infradead.org,
Qiang Zhao <qiang.zhao@nxp.com>
Subject: Re: [PATCH v5 01/10] dt-bindings: soc: fsl: cpm_qe: Add TSA controller
Date: Fri, 17 Feb 2023 14:50:19 +0100 [thread overview]
Message-ID: <20230217145019.0def6f9a@bootlin.com> (raw)
In-Reply-To: <6ae9af19-1d52-c31f-79be-a36f06caaf80@linaro.org>
Hi Krzysztof,
On Fri, 17 Feb 2023 10:14:48 +0100
Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> wrote:
> On 16/02/2023 14:42, Herve Codina wrote:
> > Add support for the time slot assigner (TSA)
> > available in some PowerQUICC SoC such as MPC885
> > or MPC866.
> >
> > Signed-off-by: Herve Codina <herve.codina@bootlin.com>
> > ---
> > .../bindings/soc/fsl/cpm_qe/fsl,cpm1-tsa.yaml | 234 ++++++++++++++++++
> > include/dt-bindings/soc/fsl,tsa.h | 13 +
> > 2 files changed, 247 insertions(+)
> > create mode 100644 Documentation/devicetree/bindings/soc/fsl/cpm_qe/fsl,cpm1-tsa.yaml
> > create mode 100644 include/dt-bindings/soc/fsl,tsa.h
[...]
> > +
> > +patternProperties:
> > + '^tdm@[0-1]$':
> > + description:
> > + The TDM managed by this controller
> > + type: object
> > +
> > + additionalProperties: false
> > +
> > + properties:
> > + reg:
> > + minimum: 0
> > + maximum: 1
> > + description:
> > + The TDM number for this TDM, 0 for TDMa and 1 for TDMb
[...]
> > +
> > + fsl,rx-frame-sync-delay-bits:
> > + enum: [0, 1, 2, 3]
>
> maxItems: 1
The property is an enum
Why this maxItems value ?
If I add the maxItems value, I've got some dt_binding_check errors:
/xxxx/bindings/soc/fsl/cpm_qe/fsl,cpm1-tsa.yaml:
patternProperties:^tdm@[0-1]$:properties:fsl,rx-frame-sync-delay-bits:
'enum' should not be valid under {'enum': ['const', 'enum', 'exclusiveMaximum', 'exclusiveMinimum', 'minimum', 'maximum', 'multipleOf', 'pattern']}
hint: Scalar and array keywords cannot be mixed
from schema $id: http://devicetree.org/meta-schemas/keywords.yaml#
>
> > + default: 0
> > + description: |
> > + Receive frame sync delay in number of bits.
> > + Indicates the delay between the Rx sync and the first bit of the Rx
> > + frame. 0 for no bit delay. 1, 2 or 3 for 1, 2 or 3 bits delay.
> > +
> > + fsl,tx-frame-sync-delay-bits:
> > + enum: [0, 1, 2, 3]
>
> maxItems: 1
Same question here.
Thanks for the review,
Hervé
--
Hervé Codina, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
WARNING: multiple messages have this Message-ID (diff)
From: Herve Codina <herve.codina@bootlin.com>
To: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Cc: Li Yang <leoyang.li@nxp.com>, Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Liam Girdwood <lgirdwood@gmail.com>,
Mark Brown <broonie@kernel.org>,
Christophe Leroy <christophe.leroy@csgroup.eu>,
Michael Ellerman <mpe@ellerman.id.au>,
Nicholas Piggin <npiggin@gmail.com>,
Qiang Zhao <qiang.zhao@nxp.com>, Jaroslav Kysela <perex@perex.cz>,
Takashi Iwai <tiwai@suse.com>,
Shengjiu Wang <shengjiu.wang@gmail.com>,
Xiubo Li <Xiubo.Lee@gmail.com>,
Fabio Estevam <festevam@gmail.com>,
Nicolin Chen <nicoleotsuka@gmail.com>,
linuxppc-dev@lists.ozlabs.org,
linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org, alsa-devel@alsa-project.org,
Thomas Petazzoni <thomas.petazzoni@bootlin.com>
Subject: Re: [PATCH v5 01/10] dt-bindings: soc: fsl: cpm_qe: Add TSA controller
Date: Fri, 17 Feb 2023 14:50:19 +0100 [thread overview]
Message-ID: <20230217145019.0def6f9a@bootlin.com> (raw)
In-Reply-To: <6ae9af19-1d52-c31f-79be-a36f06caaf80@linaro.org>
Hi Krzysztof,
On Fri, 17 Feb 2023 10:14:48 +0100
Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> wrote:
> On 16/02/2023 14:42, Herve Codina wrote:
> > Add support for the time slot assigner (TSA)
> > available in some PowerQUICC SoC such as MPC885
> > or MPC866.
> >
> > Signed-off-by: Herve Codina <herve.codina@bootlin.com>
> > ---
> > .../bindings/soc/fsl/cpm_qe/fsl,cpm1-tsa.yaml | 234 ++++++++++++++++++
> > include/dt-bindings/soc/fsl,tsa.h | 13 +
> > 2 files changed, 247 insertions(+)
> > create mode 100644 Documentation/devicetree/bindings/soc/fsl/cpm_qe/fsl,cpm1-tsa.yaml
> > create mode 100644 include/dt-bindings/soc/fsl,tsa.h
[...]
> > +
> > +patternProperties:
> > + '^tdm@[0-1]$':
> > + description:
> > + The TDM managed by this controller
> > + type: object
> > +
> > + additionalProperties: false
> > +
> > + properties:
> > + reg:
> > + minimum: 0
> > + maximum: 1
> > + description:
> > + The TDM number for this TDM, 0 for TDMa and 1 for TDMb
[...]
> > +
> > + fsl,rx-frame-sync-delay-bits:
> > + enum: [0, 1, 2, 3]
>
> maxItems: 1
The property is an enum
Why this maxItems value ?
If I add the maxItems value, I've got some dt_binding_check errors:
/xxxx/bindings/soc/fsl/cpm_qe/fsl,cpm1-tsa.yaml:
patternProperties:^tdm@[0-1]$:properties:fsl,rx-frame-sync-delay-bits:
'enum' should not be valid under {'enum': ['const', 'enum', 'exclusiveMaximum', 'exclusiveMinimum', 'minimum', 'maximum', 'multipleOf', 'pattern']}
hint: Scalar and array keywords cannot be mixed
from schema $id: http://devicetree.org/meta-schemas/keywords.yaml#
>
> > + default: 0
> > + description: |
> > + Receive frame sync delay in number of bits.
> > + Indicates the delay between the Rx sync and the first bit of the Rx
> > + frame. 0 for no bit delay. 1, 2 or 3 for 1, 2 or 3 bits delay.
> > +
> > + fsl,tx-frame-sync-delay-bits:
> > + enum: [0, 1, 2, 3]
>
> maxItems: 1
Same question here.
Thanks for the review,
Hervé
--
Hervé Codina, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
WARNING: multiple messages have this Message-ID (diff)
From: Herve Codina <herve.codina@bootlin.com>
To: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Cc: Li Yang <leoyang.li@nxp.com>, Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Liam Girdwood <lgirdwood@gmail.com>,
Mark Brown <broonie@kernel.org>,
Christophe Leroy <christophe.leroy@csgroup.eu>,
Michael Ellerman <mpe@ellerman.id.au>,
Nicholas Piggin <npiggin@gmail.com>,
Qiang Zhao <qiang.zhao@nxp.com>, Jaroslav Kysela <perex@perex.cz>,
Takashi Iwai <tiwai@suse.com>,
Shengjiu Wang <shengjiu.wang@gmail.com>,
Xiubo Li <Xiubo.Lee@gmail.com>,
Fabio Estevam <festevam@gmail.com>,
Nicolin Chen <nicoleotsuka@gmail.com>,
linuxppc-dev@lists.ozlabs.org,
linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org, alsa-devel@alsa-project.org,
Thomas Petazzoni <thomas.petazzoni@bootlin.com>
Subject: Re: [PATCH v5 01/10] dt-bindings: soc: fsl: cpm_qe: Add TSA controller
Date: Fri, 17 Feb 2023 14:50:19 +0100 [thread overview]
Message-ID: <20230217145019.0def6f9a@bootlin.com> (raw)
In-Reply-To: <6ae9af19-1d52-c31f-79be-a36f06caaf80@linaro.org>
Hi Krzysztof,
On Fri, 17 Feb 2023 10:14:48 +0100
Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> wrote:
> On 16/02/2023 14:42, Herve Codina wrote:
> > Add support for the time slot assigner (TSA)
> > available in some PowerQUICC SoC such as MPC885
> > or MPC866.
> >
> > Signed-off-by: Herve Codina <herve.codina@bootlin.com>
> > ---
> > .../bindings/soc/fsl/cpm_qe/fsl,cpm1-tsa.yaml | 234 ++++++++++++++++++
> > include/dt-bindings/soc/fsl,tsa.h | 13 +
> > 2 files changed, 247 insertions(+)
> > create mode 100644 Documentation/devicetree/bindings/soc/fsl/cpm_qe/fsl,cpm1-tsa.yaml
> > create mode 100644 include/dt-bindings/soc/fsl,tsa.h
[...]
> > +
> > +patternProperties:
> > + '^tdm@[0-1]$':
> > + description:
> > + The TDM managed by this controller
> > + type: object
> > +
> > + additionalProperties: false
> > +
> > + properties:
> > + reg:
> > + minimum: 0
> > + maximum: 1
> > + description:
> > + The TDM number for this TDM, 0 for TDMa and 1 for TDMb
[...]
> > +
> > + fsl,rx-frame-sync-delay-bits:
> > + enum: [0, 1, 2, 3]
>
> maxItems: 1
The property is an enum
Why this maxItems value ?
If I add the maxItems value, I've got some dt_binding_check errors:
/xxxx/bindings/soc/fsl/cpm_qe/fsl,cpm1-tsa.yaml:
patternProperties:^tdm@[0-1]$:properties:fsl,rx-frame-sync-delay-bits:
'enum' should not be valid under {'enum': ['const', 'enum', 'exclusiveMaximum', 'exclusiveMinimum', 'minimum', 'maximum', 'multipleOf', 'pattern']}
hint: Scalar and array keywords cannot be mixed
from schema $id: http://devicetree.org/meta-schemas/keywords.yaml#
>
> > + default: 0
> > + description: |
> > + Receive frame sync delay in number of bits.
> > + Indicates the delay between the Rx sync and the first bit of the Rx
> > + frame. 0 for no bit delay. 1, 2 or 3 for 1, 2 or 3 bits delay.
> > +
> > + fsl,tx-frame-sync-delay-bits:
> > + enum: [0, 1, 2, 3]
>
> maxItems: 1
Same question here.
Thanks for the review,
Hervé
--
Hervé Codina, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
next prev parent reply other threads:[~2023-02-17 13:51 UTC|newest]
Thread overview: 69+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-02-16 13:42 [PATCH v5 00/10] Add the PowerQUICC audio support using the QMC Herve Codina
2023-02-16 13:42 ` Herve Codina
2023-02-16 13:42 ` Herve Codina
2023-02-16 13:42 ` [PATCH v5 01/10] dt-bindings: soc: fsl: cpm_qe: Add TSA controller Herve Codina
2023-02-16 13:42 ` Herve Codina
2023-02-16 13:42 ` Herve Codina
2023-02-17 9:14 ` Krzysztof Kozlowski
2023-02-17 9:14 ` Krzysztof Kozlowski
2023-02-17 9:14 ` Krzysztof Kozlowski
2023-02-17 13:50 ` Herve Codina [this message]
2023-02-17 13:50 ` Herve Codina
2023-02-17 13:50 ` Herve Codina
2023-02-17 13:50 ` Herve Codina
2023-02-17 14:24 ` Krzysztof Kozlowski
2023-02-17 14:24 ` Krzysztof Kozlowski
2023-02-17 14:24 ` Krzysztof Kozlowski
2023-02-17 14:24 ` Krzysztof Kozlowski
2023-02-16 13:42 ` [PATCH v5 02/10] soc: fsl: cpm1: Add support for TSA Herve Codina
2023-02-16 13:42 ` Herve Codina
2023-02-16 13:42 ` Herve Codina
2023-02-16 22:11 ` Leo Li
2023-02-16 22:11 ` Leo Li
2023-02-16 22:11 ` Leo Li
2023-02-16 13:42 ` [PATCH v5 03/10] MAINTAINERS: add the Freescale TSA controller entry Herve Codina
2023-02-16 13:42 ` Herve Codina
2023-02-16 13:42 ` Herve Codina
2023-02-16 13:42 ` [PATCH v5 04/10] powerpc/8xx: Use a larger CPM1 command check mask Herve Codina
2023-02-16 13:42 ` Herve Codina
2023-02-16 13:42 ` Herve Codina
2023-02-16 13:42 ` [PATCH v5 05/10] dt-bindings: soc: fsl: cpm_qe: Add QMC controller Herve Codina
2023-02-16 13:42 ` Herve Codina
2023-02-16 13:42 ` Herve Codina
2023-02-17 9:22 ` Krzysztof Kozlowski
2023-02-17 9:22 ` Krzysztof Kozlowski
2023-02-17 9:22 ` Krzysztof Kozlowski
2023-02-16 13:42 ` [PATCH v5 06/10] soc: fsl: cpm1: Add support for QMC Herve Codina
2023-02-16 13:42 ` Herve Codina
2023-02-16 13:42 ` Herve Codina
2023-02-16 13:42 ` [PATCH v5 07/10] MAINTAINERS: add the Freescale QMC controller entry Herve Codina
2023-02-16 13:42 ` Herve Codina
2023-02-16 13:42 ` Herve Codina
2023-02-16 13:42 ` [PATCH v5 08/10] dt-bindings: sound: Add support for QMC audio Herve Codina
2023-02-16 13:42 ` Herve Codina
2023-02-16 13:42 ` Herve Codina
2023-02-16 13:42 ` [PATCH v5 09/10] ASoC: fsl: " Herve Codina
2023-02-16 13:42 ` Herve Codina
2023-02-16 13:42 ` Herve Codina
2023-02-16 13:42 ` [PATCH v5 10/10] MAINTAINERS: add the Freescale QMC audio entry Herve Codina
2023-02-16 13:42 ` Herve Codina
2023-02-16 13:42 ` Herve Codina
2023-02-16 23:52 ` [PATCH v5 00/10] Add the PowerQUICC audio support using the QMC Michael Ellerman
2023-02-16 23:52 ` Michael Ellerman
2023-02-16 23:52 ` Michael Ellerman
2023-02-17 6:32 ` Christophe Leroy
2023-02-17 6:32 ` Christophe Leroy
2023-02-17 6:32 ` Christophe Leroy
2023-02-17 6:32 ` Christophe Leroy
2023-02-17 19:15 ` Mark Brown
2023-02-17 19:15 ` Mark Brown
2023-02-17 19:15 ` Mark Brown
2023-02-17 19:15 ` Mark Brown
2023-02-17 20:18 ` Herve Codina
2023-02-17 20:18 ` Herve Codina
2023-02-17 20:18 ` Herve Codina
2023-02-17 20:18 ` Herve Codina
2023-02-17 20:27 ` Herve Codina
2023-02-17 20:27 ` Herve Codina
2023-02-17 20:27 ` Herve Codina
2023-02-17 20:27 ` Herve Codina
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