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From: Andrew Jones <ajones@ventanamicro.com>
To: Sunil V L <sunilvl@ventanamicro.com>
Cc: Palmer Dabbelt <palmer@dabbelt.com>,
	Albert Ou <aou@eecs.berkeley.edu>,
	Paul Walmsley <paul.walmsley@sifive.com>,
	"Rafael J . Wysocki" <rafael@kernel.org>,
	Len Brown <lenb@kernel.org>, Thomas Gleixner <tglx@linutronix.de>,
	Marc Zyngier <maz@kernel.org>, Jonathan Corbet <corbet@lwn.net>,
	linux-riscv@lists.infradead.org, linux-acpi@vger.kernel.org,
	linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org,
	Conor Dooley <conor.dooley@microchip.com>,
	Anup Patel <apatel@ventanamicro.com>,
	Atish Patra <atishp@rivosinc.com>,
	"Rafael J . Wysocki" <rafael.j.wysocki@intel.com>
Subject: Re: [PATCH V2 08/21] drivers/acpi: RISC-V: Add RHCT related code
Date: Mon, 20 Feb 2023 17:36:48 +0100	[thread overview]
Message-ID: <20230220163648.72bw7ujwzkx42far@orel> (raw)
In-Reply-To: <20230216182043.1946553-9-sunilvl@ventanamicro.com>

On Thu, Feb 16, 2023 at 11:50:30PM +0530, Sunil V L wrote:
> RHCT is a new table defined for RISC-V to communicate the
> features of the CPU to the OS. Create a new architecture folder
> in drivers/acpi and add RHCT parsing code.
> 
> Signed-off-by: Sunil V L <sunilvl@ventanamicro.com>
> Acked-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
> ---
>  arch/riscv/include/asm/acpi.h |  9 ++++
>  drivers/acpi/Makefile         |  2 +
>  drivers/acpi/riscv/Makefile   |  2 +
>  drivers/acpi/riscv/rhct.c     | 92 +++++++++++++++++++++++++++++++++++
>  4 files changed, 105 insertions(+)
>  create mode 100644 drivers/acpi/riscv/Makefile
>  create mode 100644 drivers/acpi/riscv/rhct.c
> 
> diff --git a/arch/riscv/include/asm/acpi.h b/arch/riscv/include/asm/acpi.h
> index 4a3622b38159..7bc49f65c86b 100644
> --- a/arch/riscv/include/asm/acpi.h
> +++ b/arch/riscv/include/asm/acpi.h
> @@ -58,6 +58,15 @@ static inline bool acpi_has_cpu_in_madt(void)
>  
>  static inline void arch_fix_phys_package_id(int num, u32 slot) { }
>  
> +int acpi_get_riscv_isa(struct acpi_table_header *table,
> +		       unsigned int cpu, const char **isa);
> +#else
> +static inline int acpi_get_riscv_isa(struct acpi_table_header *table,
> +				     unsigned int cpu, const char **isa)
> +{
> +	return -EINVAL;
> +}
> +
>  #endif /* CONFIG_ACPI */
>  
>  #endif /*_ASM_ACPI_H*/
> diff --git a/drivers/acpi/Makefile b/drivers/acpi/Makefile
> index feb36c0b9446..3fc5a0d54f6e 100644
> --- a/drivers/acpi/Makefile
> +++ b/drivers/acpi/Makefile
> @@ -131,3 +131,5 @@ obj-y				+= dptf/
>  obj-$(CONFIG_ARM64)		+= arm64/
>  
>  obj-$(CONFIG_ACPI_VIOT)		+= viot.o
> +
> +obj-$(CONFIG_RISCV)		+= riscv/
> diff --git a/drivers/acpi/riscv/Makefile b/drivers/acpi/riscv/Makefile
> new file mode 100644
> index 000000000000..8b3b126e0b94
> --- /dev/null
> +++ b/drivers/acpi/riscv/Makefile
> @@ -0,0 +1,2 @@
> +# SPDX-License-Identifier: GPL-2.0-only
> +obj-y 	+= rhct.o
> diff --git a/drivers/acpi/riscv/rhct.c b/drivers/acpi/riscv/rhct.c
> new file mode 100644
> index 000000000000..5bafc236d627
> --- /dev/null
> +++ b/drivers/acpi/riscv/rhct.c
> @@ -0,0 +1,92 @@
> +// SPDX-License-Identifier: GPL-2.0-only
> +/*
> + * Copyright (C) 2022-2023, Ventana Micro Systems Inc
> + *	Author: Sunil V L <sunilvl@ventanamicro.com>
> + *
> + */
> +
> +#define pr_fmt(fmt)	"ACPI: RHCT: " fmt
> +
> +#include <linux/acpi.h>
> +
> +static void acpi_rhct_warn_missing(void)
> +{
> +	pr_warn_once("No RHCT table found\n");
> +}
> +
> +static struct acpi_table_header *acpi_get_rhct(void)
> +{
> +	static struct acpi_table_header *rhct;
> +	acpi_status status;
> +
> +	/*
> +	 * RHCT will be used at runtime on every CPU, so we
> +	 * don't need to call acpi_put_table() to release the table mapping.
> +	 */
> +	if (!rhct) {
> +		status = acpi_get_table(ACPI_SIG_RHCT, 0, &rhct);
> +		if (ACPI_FAILURE(status))
> +			acpi_rhct_warn_missing();

Probably don't need the wrapper function for this one callsite. Also,
returning NULL here, rather than relying on acpi_get_table() to set
rhct to NULL would be a bit more robust.

> +	}
> +
> +	return rhct;
> +}
> +
> +/*
> + * During early boot, the caller should call acpi_get_table() and pass its pointer to
> + * these functions(and free up later). At run time, since this table can be used
> + * multiple times, pass NULL so that the table remains in memory

...multiple times, NULL may be passed in order to use the cached table.

> + */
> +int acpi_get_riscv_isa(struct acpi_table_header *table, unsigned int acpi_cpu_id, const char **isa)
> +{
> +	struct acpi_rhct_node_header *node, *ref_node, *end;
> +	struct acpi_table_rhct *rhct;
> +	struct acpi_rhct_hart_info *hart_info;
> +	struct acpi_rhct_isa_string *isa_node;
> +	u32 *hart_info_node_offset;
> +	int i, j;
> +	u32 size_hdr = sizeof(struct acpi_rhct_node_header);
> +	u32 size_hartinfo = sizeof(struct acpi_rhct_hart_info);
> +
> +	if (acpi_disabled) {
> +		pr_debug("%s: acpi is disabled\n", __func__);
> +		return -1;

This seems like something that should never happen and easy to catch
and fix with a BUG_ON. Is there any chance that BUG'ing here would
be a bad idea?

> +	}
> +
> +	if (!table) {
> +		rhct = (struct acpi_table_rhct *)acpi_get_rhct();
> +		if (!rhct)
> +			return -ENOENT;
> +	} else {
> +		rhct = (struct acpi_table_rhct *)table;
> +	}
> +
> +	node = ACPI_ADD_PTR(struct acpi_rhct_node_header, rhct, rhct->node_offset);
> +	end = ACPI_ADD_PTR(struct acpi_rhct_node_header, rhct, rhct->header.length);
> +
> +	for (i = 0; i < rhct->node_count; i++) {
> +		if (node >= end)
> +			break;

for (node = ACPI_ADD_PTR(struct acpi_rhct_node_header, rhct, rhct->node_offset);
     node < end;
     node = ACPI_ADD_PTR(struct acpi_rhct_node_header, node node->length))

> +		switch (node->type) {
> +		case ACPI_RHCT_NODE_TYPE_HART_INFO:

if (node->type == ACPI_RHCT_NODE_TYPE_HART_INFO)

> +			hart_info = ACPI_ADD_PTR(struct acpi_rhct_hart_info, node, size_hdr);
> +			hart_info_node_offset = ACPI_ADD_PTR(u32, hart_info, size_hartinfo);
> +			if (acpi_cpu_id != hart_info->uid)
> +				break;

With the above suggested changes, this 'break' becomes 'continue'.

> +			for (j = 0; j < hart_info->num_offsets; j++) {
> +				ref_node = ACPI_ADD_PTR(struct acpi_rhct_node_header,
> +							rhct, hart_info_node_offset[j]);
> +				if (ref_node->type == ACPI_RHCT_NODE_TYPE_ISA_STRING) {
> +					isa_node = ACPI_ADD_PTR(struct acpi_rhct_isa_string,
> +								ref_node, size_hdr);
> +					*isa = isa_node->isa;
> +					return 0;
> +				}
> +			}
> +			break;
> +		}
> +		node = ACPI_ADD_PTR(struct acpi_rhct_node_header, node, node->length);
> +	}
> +
> +	return -1;
> +}
> -- 
> 2.34.1
> 

Other than the nits,

Reviewed-by: Andrew Jones <ajones@ventanamicro.com>

Thanks,
drew

WARNING: multiple messages have this Message-ID (diff)
From: Andrew Jones <ajones@ventanamicro.com>
To: Sunil V L <sunilvl@ventanamicro.com>
Cc: Palmer Dabbelt <palmer@dabbelt.com>,
	Albert Ou <aou@eecs.berkeley.edu>,
	Paul Walmsley <paul.walmsley@sifive.com>,
	"Rafael J . Wysocki" <rafael@kernel.org>,
	Len Brown <lenb@kernel.org>, Thomas Gleixner <tglx@linutronix.de>,
	Marc Zyngier <maz@kernel.org>, Jonathan Corbet <corbet@lwn.net>,
	linux-riscv@lists.infradead.org, linux-acpi@vger.kernel.org,
	linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org,
	Conor Dooley <conor.dooley@microchip.com>,
	Anup Patel <apatel@ventanamicro.com>,
	Atish Patra <atishp@rivosinc.com>,
	"Rafael J . Wysocki" <rafael.j.wysocki@intel.com>
Subject: Re: [PATCH V2 08/21] drivers/acpi: RISC-V: Add RHCT related code
Date: Mon, 20 Feb 2023 17:36:48 +0100	[thread overview]
Message-ID: <20230220163648.72bw7ujwzkx42far@orel> (raw)
In-Reply-To: <20230216182043.1946553-9-sunilvl@ventanamicro.com>

On Thu, Feb 16, 2023 at 11:50:30PM +0530, Sunil V L wrote:
> RHCT is a new table defined for RISC-V to communicate the
> features of the CPU to the OS. Create a new architecture folder
> in drivers/acpi and add RHCT parsing code.
> 
> Signed-off-by: Sunil V L <sunilvl@ventanamicro.com>
> Acked-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
> ---
>  arch/riscv/include/asm/acpi.h |  9 ++++
>  drivers/acpi/Makefile         |  2 +
>  drivers/acpi/riscv/Makefile   |  2 +
>  drivers/acpi/riscv/rhct.c     | 92 +++++++++++++++++++++++++++++++++++
>  4 files changed, 105 insertions(+)
>  create mode 100644 drivers/acpi/riscv/Makefile
>  create mode 100644 drivers/acpi/riscv/rhct.c
> 
> diff --git a/arch/riscv/include/asm/acpi.h b/arch/riscv/include/asm/acpi.h
> index 4a3622b38159..7bc49f65c86b 100644
> --- a/arch/riscv/include/asm/acpi.h
> +++ b/arch/riscv/include/asm/acpi.h
> @@ -58,6 +58,15 @@ static inline bool acpi_has_cpu_in_madt(void)
>  
>  static inline void arch_fix_phys_package_id(int num, u32 slot) { }
>  
> +int acpi_get_riscv_isa(struct acpi_table_header *table,
> +		       unsigned int cpu, const char **isa);
> +#else
> +static inline int acpi_get_riscv_isa(struct acpi_table_header *table,
> +				     unsigned int cpu, const char **isa)
> +{
> +	return -EINVAL;
> +}
> +
>  #endif /* CONFIG_ACPI */
>  
>  #endif /*_ASM_ACPI_H*/
> diff --git a/drivers/acpi/Makefile b/drivers/acpi/Makefile
> index feb36c0b9446..3fc5a0d54f6e 100644
> --- a/drivers/acpi/Makefile
> +++ b/drivers/acpi/Makefile
> @@ -131,3 +131,5 @@ obj-y				+= dptf/
>  obj-$(CONFIG_ARM64)		+= arm64/
>  
>  obj-$(CONFIG_ACPI_VIOT)		+= viot.o
> +
> +obj-$(CONFIG_RISCV)		+= riscv/
> diff --git a/drivers/acpi/riscv/Makefile b/drivers/acpi/riscv/Makefile
> new file mode 100644
> index 000000000000..8b3b126e0b94
> --- /dev/null
> +++ b/drivers/acpi/riscv/Makefile
> @@ -0,0 +1,2 @@
> +# SPDX-License-Identifier: GPL-2.0-only
> +obj-y 	+= rhct.o
> diff --git a/drivers/acpi/riscv/rhct.c b/drivers/acpi/riscv/rhct.c
> new file mode 100644
> index 000000000000..5bafc236d627
> --- /dev/null
> +++ b/drivers/acpi/riscv/rhct.c
> @@ -0,0 +1,92 @@
> +// SPDX-License-Identifier: GPL-2.0-only
> +/*
> + * Copyright (C) 2022-2023, Ventana Micro Systems Inc
> + *	Author: Sunil V L <sunilvl@ventanamicro.com>
> + *
> + */
> +
> +#define pr_fmt(fmt)	"ACPI: RHCT: " fmt
> +
> +#include <linux/acpi.h>
> +
> +static void acpi_rhct_warn_missing(void)
> +{
> +	pr_warn_once("No RHCT table found\n");
> +}
> +
> +static struct acpi_table_header *acpi_get_rhct(void)
> +{
> +	static struct acpi_table_header *rhct;
> +	acpi_status status;
> +
> +	/*
> +	 * RHCT will be used at runtime on every CPU, so we
> +	 * don't need to call acpi_put_table() to release the table mapping.
> +	 */
> +	if (!rhct) {
> +		status = acpi_get_table(ACPI_SIG_RHCT, 0, &rhct);
> +		if (ACPI_FAILURE(status))
> +			acpi_rhct_warn_missing();

Probably don't need the wrapper function for this one callsite. Also,
returning NULL here, rather than relying on acpi_get_table() to set
rhct to NULL would be a bit more robust.

> +	}
> +
> +	return rhct;
> +}
> +
> +/*
> + * During early boot, the caller should call acpi_get_table() and pass its pointer to
> + * these functions(and free up later). At run time, since this table can be used
> + * multiple times, pass NULL so that the table remains in memory

...multiple times, NULL may be passed in order to use the cached table.

> + */
> +int acpi_get_riscv_isa(struct acpi_table_header *table, unsigned int acpi_cpu_id, const char **isa)
> +{
> +	struct acpi_rhct_node_header *node, *ref_node, *end;
> +	struct acpi_table_rhct *rhct;
> +	struct acpi_rhct_hart_info *hart_info;
> +	struct acpi_rhct_isa_string *isa_node;
> +	u32 *hart_info_node_offset;
> +	int i, j;
> +	u32 size_hdr = sizeof(struct acpi_rhct_node_header);
> +	u32 size_hartinfo = sizeof(struct acpi_rhct_hart_info);
> +
> +	if (acpi_disabled) {
> +		pr_debug("%s: acpi is disabled\n", __func__);
> +		return -1;

This seems like something that should never happen and easy to catch
and fix with a BUG_ON. Is there any chance that BUG'ing here would
be a bad idea?

> +	}
> +
> +	if (!table) {
> +		rhct = (struct acpi_table_rhct *)acpi_get_rhct();
> +		if (!rhct)
> +			return -ENOENT;
> +	} else {
> +		rhct = (struct acpi_table_rhct *)table;
> +	}
> +
> +	node = ACPI_ADD_PTR(struct acpi_rhct_node_header, rhct, rhct->node_offset);
> +	end = ACPI_ADD_PTR(struct acpi_rhct_node_header, rhct, rhct->header.length);
> +
> +	for (i = 0; i < rhct->node_count; i++) {
> +		if (node >= end)
> +			break;

for (node = ACPI_ADD_PTR(struct acpi_rhct_node_header, rhct, rhct->node_offset);
     node < end;
     node = ACPI_ADD_PTR(struct acpi_rhct_node_header, node node->length))

> +		switch (node->type) {
> +		case ACPI_RHCT_NODE_TYPE_HART_INFO:

if (node->type == ACPI_RHCT_NODE_TYPE_HART_INFO)

> +			hart_info = ACPI_ADD_PTR(struct acpi_rhct_hart_info, node, size_hdr);
> +			hart_info_node_offset = ACPI_ADD_PTR(u32, hart_info, size_hartinfo);
> +			if (acpi_cpu_id != hart_info->uid)
> +				break;

With the above suggested changes, this 'break' becomes 'continue'.

> +			for (j = 0; j < hart_info->num_offsets; j++) {
> +				ref_node = ACPI_ADD_PTR(struct acpi_rhct_node_header,
> +							rhct, hart_info_node_offset[j]);
> +				if (ref_node->type == ACPI_RHCT_NODE_TYPE_ISA_STRING) {
> +					isa_node = ACPI_ADD_PTR(struct acpi_rhct_isa_string,
> +								ref_node, size_hdr);
> +					*isa = isa_node->isa;
> +					return 0;
> +				}
> +			}
> +			break;
> +		}
> +		node = ACPI_ADD_PTR(struct acpi_rhct_node_header, node, node->length);
> +	}
> +
> +	return -1;
> +}
> -- 
> 2.34.1
> 

Other than the nits,

Reviewed-by: Andrew Jones <ajones@ventanamicro.com>

Thanks,
drew

_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv

  reply	other threads:[~2023-02-20 16:36 UTC|newest]

Thread overview: 106+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-02-16 18:20 [PATCH V2 00/21] Add basic ACPI support for RISC-V Sunil V L
2023-02-16 18:20 ` Sunil V L
2023-02-16 18:20 ` [PATCH V2 01/21] riscv: move sbi_init() earlier before jump_label_init() Sunil V L
2023-02-16 18:20   ` Sunil V L
2023-02-16 18:20 ` [PATCH V2 02/21] ACPICA: MADT: Add RISC-V INTC interrupt controller Sunil V L
2023-02-16 18:20   ` Sunil V L
2023-02-16 18:20 ` [PATCH V2 03/21] ACPICA: Add structure definitions for RISC-V RHCT Sunil V L
2023-02-16 18:20   ` Sunil V L
2023-02-16 18:20 ` [PATCH V2 04/21] RISC-V: Add support to build the ACPI core Sunil V L
2023-02-16 18:20   ` Sunil V L
2023-02-20 15:44   ` Andrew Jones
2023-02-20 15:44     ` Andrew Jones
2023-02-24  9:00     ` Sunil V L
2023-02-24  9:00       ` Sunil V L
2023-02-16 18:20 ` [PATCH V2 05/21] ACPI: Kconfig: Enable ACPI_PROCESSOR for RISC-V Sunil V L
2023-02-16 18:20   ` Sunil V L
2023-02-20 16:05   ` Andrew Jones
2023-02-20 16:05     ` Andrew Jones
2023-02-24  8:45     ` Sunil V L
2023-02-24  8:45       ` Sunil V L
2023-02-16 18:20 ` [PATCH V2 06/21] ACPI: OSL: Make should_use_kmap() 0 " Sunil V L
2023-02-16 18:20   ` Sunil V L
2023-02-16 18:20 ` [PATCH V2 07/21] ACPI: processor_core: RISC-V: Enable mapping processor to the hartid Sunil V L
2023-02-16 18:20   ` Sunil V L
2023-02-20 16:10   ` Andrew Jones
2023-02-20 16:10     ` Andrew Jones
2023-02-16 18:20 ` [PATCH V2 08/21] drivers/acpi: RISC-V: Add RHCT related code Sunil V L
2023-02-16 18:20   ` Sunil V L
2023-02-20 16:36   ` Andrew Jones [this message]
2023-02-20 16:36     ` Andrew Jones
2023-02-24 12:03     ` Sunil V L
2023-02-24 12:03       ` Sunil V L
2023-02-16 18:20 ` [PATCH V2 09/21] RISC-V: smpboot: Create wrapper smp_setup() Sunil V L
2023-02-16 18:20   ` Sunil V L
2023-02-20 16:37   ` Andrew Jones
2023-02-20 16:37     ` Andrew Jones
2023-02-16 18:20 ` [PATCH V2 10/21] RISC-V: smpboot: Add ACPI support in smp_setup() Sunil V L
2023-02-16 18:20   ` Sunil V L
2023-02-20 17:08   ` Andrew Jones
2023-02-20 17:08     ` Andrew Jones
2023-02-24 16:50     ` Sunil V L
2023-02-24 16:50       ` Sunil V L
2023-02-24 17:06       ` Andrew Jones
2023-02-24 17:06         ` Andrew Jones
2023-02-16 18:20 ` [PATCH V2 11/21] RISC-V: ACPI: Add a function to retrieve the hartid Sunil V L
2023-02-16 18:20   ` Sunil V L
2023-02-20 17:34   ` Andrew Jones
2023-02-20 17:34     ` Andrew Jones
2023-02-16 18:20 ` [PATCH V2 12/21] RISC-V: cpufeature: Add ACPI support in riscv_fill_hwcap() Sunil V L
2023-02-16 18:20   ` Sunil V L
2023-02-20 17:45   ` Andrew Jones
2023-02-20 17:45     ` Andrew Jones
2023-02-16 18:20 ` [PATCH V2 13/21] RISC-V: cpu: Enable cpuinfo for ACPI systems Sunil V L
2023-02-16 18:20   ` Sunil V L
2023-02-20 17:54   ` Andrew Jones
2023-02-20 17:54     ` Andrew Jones
2023-02-24 12:27     ` Sunil V L
2023-02-24 12:27       ` Sunil V L
2023-02-16 18:20 ` [PATCH V2 14/21] irqchip/riscv-intc: Add ACPI support Sunil V L
2023-02-16 18:20   ` Sunil V L
2023-02-20 19:37   ` Andrew Jones
2023-02-20 19:37     ` Andrew Jones
2023-02-24 12:29     ` Sunil V L
2023-02-24 12:29       ` Sunil V L
2023-02-16 18:20 ` [PATCH V2 15/21] clocksource/timer-riscv: Refactor riscv_timer_init_dt() Sunil V L
2023-02-16 18:20   ` Sunil V L
2023-02-20 19:47   ` Andrew Jones
2023-02-20 19:47     ` Andrew Jones
2023-02-16 18:20 ` [PATCH V2 16/21] clocksource/timer-riscv: Add ACPI support Sunil V L
2023-02-16 18:20   ` Sunil V L
2023-02-20 19:51   ` Andrew Jones
2023-02-20 19:51     ` Andrew Jones
2023-02-16 18:20 ` [PATCH V2 17/21] RISC-V: time.c: Add ACPI support for time_init() Sunil V L
2023-02-16 18:20   ` Sunil V L
2023-02-20 19:58   ` Andrew Jones
2023-02-20 19:58     ` Andrew Jones
2023-02-24 12:33     ` Sunil V L
2023-02-24 12:33       ` Sunil V L
2023-02-16 18:20 ` [PATCH V2 18/21] RISC-V: Add ACPI initialization in setup_arch() Sunil V L
2023-02-16 18:20   ` Sunil V L
2023-02-20 20:07   ` Andrew Jones
2023-02-20 20:07     ` Andrew Jones
2023-02-24 12:36     ` Sunil V L
2023-02-24 12:36       ` Sunil V L
2023-02-24 13:07       ` Andrew Jones
2023-02-24 13:07         ` Andrew Jones
2023-02-24 14:44         ` Sunil V L
2023-02-24 14:44           ` Sunil V L
2023-02-16 18:20 ` [PATCH V2 19/21] RISC-V: Enable ACPI in defconfig Sunil V L
2023-02-16 18:20   ` Sunil V L
2023-02-20 20:09   ` Andrew Jones
2023-02-20 20:09     ` Andrew Jones
2023-02-24  8:46     ` Sunil V L
2023-02-24  8:46       ` Sunil V L
2023-02-16 18:20 ` [PATCH V2 20/21] MAINTAINERS: Add entry for drivers/acpi/riscv Sunil V L
2023-02-16 18:20   ` Sunil V L
2023-02-20 20:14   ` Andrew Jones
2023-02-20 20:14     ` Andrew Jones
2023-02-24 12:38     ` Sunil V L
2023-02-24 12:38       ` Sunil V L
2023-02-16 18:20 ` [PATCH V2 21/21] Documentation/kernel-parameters.txt: Add RISC-V for ACPI parameter Sunil V L
2023-02-16 18:20   ` Sunil V L
2023-02-20 20:15   ` Andrew Jones
2023-02-20 20:15     ` Andrew Jones
2023-02-24 12:37     ` Sunil V L
2023-02-24 12:37       ` Sunil V L

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