From: Andrew Jones <ajones@ventanamicro.com>
To: Sunil V L <sunilvl@ventanamicro.com>
Cc: Palmer Dabbelt <palmer@dabbelt.com>,
Albert Ou <aou@eecs.berkeley.edu>,
Paul Walmsley <paul.walmsley@sifive.com>,
"Rafael J . Wysocki" <rafael@kernel.org>,
Len Brown <lenb@kernel.org>, Thomas Gleixner <tglx@linutronix.de>,
Marc Zyngier <maz@kernel.org>, Jonathan Corbet <corbet@lwn.net>,
linux-riscv@lists.infradead.org, linux-acpi@vger.kernel.org,
linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org,
Conor Dooley <conor.dooley@microchip.com>,
Anup Patel <apatel@ventanamicro.com>,
Atish Patra <atishp@rivosinc.com>,
"Rafael J . Wysocki" <rafael.j.wysocki@intel.com>
Subject: Re: [PATCH V2 13/21] RISC-V: cpu: Enable cpuinfo for ACPI systems
Date: Mon, 20 Feb 2023 18:54:29 +0100 [thread overview]
Message-ID: <20230220175429.dzojoryw2dhhbodl@orel> (raw)
In-Reply-To: <20230216182043.1946553-14-sunilvl@ventanamicro.com>
On Thu, Feb 16, 2023 at 11:50:35PM +0530, Sunil V L wrote:
> On ACPI based platforms, few details like ISA need to be read
> from the ACPI table. Enable cpuinfo on ACPI based systems.
>
> Signed-off-by: Sunil V L <sunilvl@ventanamicro.com>
> Acked-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
> ---
> arch/riscv/kernel/cpu.c | 31 ++++++++++++++++++++++++-------
> 1 file changed, 24 insertions(+), 7 deletions(-)
>
> diff --git a/arch/riscv/kernel/cpu.c b/arch/riscv/kernel/cpu.c
> index 1b9a5a66e55a..a227c0661b19 100644
> --- a/arch/riscv/kernel/cpu.c
> +++ b/arch/riscv/kernel/cpu.c
> @@ -3,10 +3,12 @@
> * Copyright (C) 2012 Regents of the University of California
> */
>
> +#include <linux/acpi.h>
> #include <linux/cpu.h>
> #include <linux/init.h>
> #include <linux/seq_file.h>
> #include <linux/of.h>
> +#include <asm/acpi.h>
> #include <asm/csr.h>
> #include <asm/hwcap.h>
> #include <asm/sbi.h>
> @@ -256,26 +258,41 @@ static void c_stop(struct seq_file *m, void *v)
> {
> }
>
> +static void acpi_print_hart_info(struct seq_file *m, unsigned long cpu)
> +{
> + const char *isa;
> +
> + if (!acpi_get_riscv_isa(NULL, get_acpi_id_for_cpu(cpu), &isa))
> + print_isa(m, isa);
> +}
> +
> static int c_show(struct seq_file *m, void *v)
> {
> unsigned long cpu_id = (unsigned long)v - 1;
> - struct device_node *node = of_get_cpu_node(cpu_id, NULL);
> struct riscv_cpuinfo *ci = per_cpu_ptr(&riscv_cpuinfo, cpu_id);
> + struct device_node *node;
> const char *compat, *isa;
>
> seq_printf(m, "processor\t: %lu\n", cpu_id);
> seq_printf(m, "hart\t\t: %lu\n", cpuid_to_hartid_map(cpu_id));
> - if (!of_property_read_string(node, "riscv,isa", &isa))
> - print_isa(m, isa);
> +
> + if (acpi_disabled) {
> + node = of_get_cpu_node(cpu_id, NULL);
> + if (!of_property_read_string(node, "riscv,isa", &isa))
> + print_isa(m, isa);
> + if (!of_property_read_string(node, "compatible", &compat) &&
> + strcmp(compat, "riscv"))
> + seq_printf(m, "uarch\t\t: %s\n", compat);
> + of_node_put(node);
> + } else {
> + acpi_print_hart_info(m, cpu_id);
I don't think we need the helper function for the two lines which would
otherwise nicely complement the two similar DT lines above.
> + }
> +
> print_mmu(m);
> - if (!of_property_read_string(node, "compatible", &compat)
> - && strcmp(compat, "riscv"))
> - seq_printf(m, "uarch\t\t: %s\n", compat);
This will now print uarch before mmu for DT systems.
> seq_printf(m, "mvendorid\t: 0x%lx\n", ci->mvendorid);
> seq_printf(m, "marchid\t\t: 0x%lx\n", ci->marchid);
> seq_printf(m, "mimpid\t\t: 0x%lx\n", ci->mimpid);
> seq_puts(m, "\n");
> - of_node_put(node);
>
> return 0;
> }
> --
> 2.34.1
>
Thanks,
drew
WARNING: multiple messages have this Message-ID (diff)
From: Andrew Jones <ajones@ventanamicro.com>
To: Sunil V L <sunilvl@ventanamicro.com>
Cc: Palmer Dabbelt <palmer@dabbelt.com>,
Albert Ou <aou@eecs.berkeley.edu>,
Paul Walmsley <paul.walmsley@sifive.com>,
"Rafael J . Wysocki" <rafael@kernel.org>,
Len Brown <lenb@kernel.org>, Thomas Gleixner <tglx@linutronix.de>,
Marc Zyngier <maz@kernel.org>, Jonathan Corbet <corbet@lwn.net>,
linux-riscv@lists.infradead.org, linux-acpi@vger.kernel.org,
linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org,
Conor Dooley <conor.dooley@microchip.com>,
Anup Patel <apatel@ventanamicro.com>,
Atish Patra <atishp@rivosinc.com>,
"Rafael J . Wysocki" <rafael.j.wysocki@intel.com>
Subject: Re: [PATCH V2 13/21] RISC-V: cpu: Enable cpuinfo for ACPI systems
Date: Mon, 20 Feb 2023 18:54:29 +0100 [thread overview]
Message-ID: <20230220175429.dzojoryw2dhhbodl@orel> (raw)
In-Reply-To: <20230216182043.1946553-14-sunilvl@ventanamicro.com>
On Thu, Feb 16, 2023 at 11:50:35PM +0530, Sunil V L wrote:
> On ACPI based platforms, few details like ISA need to be read
> from the ACPI table. Enable cpuinfo on ACPI based systems.
>
> Signed-off-by: Sunil V L <sunilvl@ventanamicro.com>
> Acked-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
> ---
> arch/riscv/kernel/cpu.c | 31 ++++++++++++++++++++++++-------
> 1 file changed, 24 insertions(+), 7 deletions(-)
>
> diff --git a/arch/riscv/kernel/cpu.c b/arch/riscv/kernel/cpu.c
> index 1b9a5a66e55a..a227c0661b19 100644
> --- a/arch/riscv/kernel/cpu.c
> +++ b/arch/riscv/kernel/cpu.c
> @@ -3,10 +3,12 @@
> * Copyright (C) 2012 Regents of the University of California
> */
>
> +#include <linux/acpi.h>
> #include <linux/cpu.h>
> #include <linux/init.h>
> #include <linux/seq_file.h>
> #include <linux/of.h>
> +#include <asm/acpi.h>
> #include <asm/csr.h>
> #include <asm/hwcap.h>
> #include <asm/sbi.h>
> @@ -256,26 +258,41 @@ static void c_stop(struct seq_file *m, void *v)
> {
> }
>
> +static void acpi_print_hart_info(struct seq_file *m, unsigned long cpu)
> +{
> + const char *isa;
> +
> + if (!acpi_get_riscv_isa(NULL, get_acpi_id_for_cpu(cpu), &isa))
> + print_isa(m, isa);
> +}
> +
> static int c_show(struct seq_file *m, void *v)
> {
> unsigned long cpu_id = (unsigned long)v - 1;
> - struct device_node *node = of_get_cpu_node(cpu_id, NULL);
> struct riscv_cpuinfo *ci = per_cpu_ptr(&riscv_cpuinfo, cpu_id);
> + struct device_node *node;
> const char *compat, *isa;
>
> seq_printf(m, "processor\t: %lu\n", cpu_id);
> seq_printf(m, "hart\t\t: %lu\n", cpuid_to_hartid_map(cpu_id));
> - if (!of_property_read_string(node, "riscv,isa", &isa))
> - print_isa(m, isa);
> +
> + if (acpi_disabled) {
> + node = of_get_cpu_node(cpu_id, NULL);
> + if (!of_property_read_string(node, "riscv,isa", &isa))
> + print_isa(m, isa);
> + if (!of_property_read_string(node, "compatible", &compat) &&
> + strcmp(compat, "riscv"))
> + seq_printf(m, "uarch\t\t: %s\n", compat);
> + of_node_put(node);
> + } else {
> + acpi_print_hart_info(m, cpu_id);
I don't think we need the helper function for the two lines which would
otherwise nicely complement the two similar DT lines above.
> + }
> +
> print_mmu(m);
> - if (!of_property_read_string(node, "compatible", &compat)
> - && strcmp(compat, "riscv"))
> - seq_printf(m, "uarch\t\t: %s\n", compat);
This will now print uarch before mmu for DT systems.
> seq_printf(m, "mvendorid\t: 0x%lx\n", ci->mvendorid);
> seq_printf(m, "marchid\t\t: 0x%lx\n", ci->marchid);
> seq_printf(m, "mimpid\t\t: 0x%lx\n", ci->mimpid);
> seq_puts(m, "\n");
> - of_node_put(node);
>
> return 0;
> }
> --
> 2.34.1
>
Thanks,
drew
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next prev parent reply other threads:[~2023-02-20 17:54 UTC|newest]
Thread overview: 106+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-02-16 18:20 [PATCH V2 00/21] Add basic ACPI support for RISC-V Sunil V L
2023-02-16 18:20 ` Sunil V L
2023-02-16 18:20 ` [PATCH V2 01/21] riscv: move sbi_init() earlier before jump_label_init() Sunil V L
2023-02-16 18:20 ` Sunil V L
2023-02-16 18:20 ` [PATCH V2 02/21] ACPICA: MADT: Add RISC-V INTC interrupt controller Sunil V L
2023-02-16 18:20 ` Sunil V L
2023-02-16 18:20 ` [PATCH V2 03/21] ACPICA: Add structure definitions for RISC-V RHCT Sunil V L
2023-02-16 18:20 ` Sunil V L
2023-02-16 18:20 ` [PATCH V2 04/21] RISC-V: Add support to build the ACPI core Sunil V L
2023-02-16 18:20 ` Sunil V L
2023-02-20 15:44 ` Andrew Jones
2023-02-20 15:44 ` Andrew Jones
2023-02-24 9:00 ` Sunil V L
2023-02-24 9:00 ` Sunil V L
2023-02-16 18:20 ` [PATCH V2 05/21] ACPI: Kconfig: Enable ACPI_PROCESSOR for RISC-V Sunil V L
2023-02-16 18:20 ` Sunil V L
2023-02-20 16:05 ` Andrew Jones
2023-02-20 16:05 ` Andrew Jones
2023-02-24 8:45 ` Sunil V L
2023-02-24 8:45 ` Sunil V L
2023-02-16 18:20 ` [PATCH V2 06/21] ACPI: OSL: Make should_use_kmap() 0 " Sunil V L
2023-02-16 18:20 ` Sunil V L
2023-02-16 18:20 ` [PATCH V2 07/21] ACPI: processor_core: RISC-V: Enable mapping processor to the hartid Sunil V L
2023-02-16 18:20 ` Sunil V L
2023-02-20 16:10 ` Andrew Jones
2023-02-20 16:10 ` Andrew Jones
2023-02-16 18:20 ` [PATCH V2 08/21] drivers/acpi: RISC-V: Add RHCT related code Sunil V L
2023-02-16 18:20 ` Sunil V L
2023-02-20 16:36 ` Andrew Jones
2023-02-20 16:36 ` Andrew Jones
2023-02-24 12:03 ` Sunil V L
2023-02-24 12:03 ` Sunil V L
2023-02-16 18:20 ` [PATCH V2 09/21] RISC-V: smpboot: Create wrapper smp_setup() Sunil V L
2023-02-16 18:20 ` Sunil V L
2023-02-20 16:37 ` Andrew Jones
2023-02-20 16:37 ` Andrew Jones
2023-02-16 18:20 ` [PATCH V2 10/21] RISC-V: smpboot: Add ACPI support in smp_setup() Sunil V L
2023-02-16 18:20 ` Sunil V L
2023-02-20 17:08 ` Andrew Jones
2023-02-20 17:08 ` Andrew Jones
2023-02-24 16:50 ` Sunil V L
2023-02-24 16:50 ` Sunil V L
2023-02-24 17:06 ` Andrew Jones
2023-02-24 17:06 ` Andrew Jones
2023-02-16 18:20 ` [PATCH V2 11/21] RISC-V: ACPI: Add a function to retrieve the hartid Sunil V L
2023-02-16 18:20 ` Sunil V L
2023-02-20 17:34 ` Andrew Jones
2023-02-20 17:34 ` Andrew Jones
2023-02-16 18:20 ` [PATCH V2 12/21] RISC-V: cpufeature: Add ACPI support in riscv_fill_hwcap() Sunil V L
2023-02-16 18:20 ` Sunil V L
2023-02-20 17:45 ` Andrew Jones
2023-02-20 17:45 ` Andrew Jones
2023-02-16 18:20 ` [PATCH V2 13/21] RISC-V: cpu: Enable cpuinfo for ACPI systems Sunil V L
2023-02-16 18:20 ` Sunil V L
2023-02-20 17:54 ` Andrew Jones [this message]
2023-02-20 17:54 ` Andrew Jones
2023-02-24 12:27 ` Sunil V L
2023-02-24 12:27 ` Sunil V L
2023-02-16 18:20 ` [PATCH V2 14/21] irqchip/riscv-intc: Add ACPI support Sunil V L
2023-02-16 18:20 ` Sunil V L
2023-02-20 19:37 ` Andrew Jones
2023-02-20 19:37 ` Andrew Jones
2023-02-24 12:29 ` Sunil V L
2023-02-24 12:29 ` Sunil V L
2023-02-16 18:20 ` [PATCH V2 15/21] clocksource/timer-riscv: Refactor riscv_timer_init_dt() Sunil V L
2023-02-16 18:20 ` Sunil V L
2023-02-20 19:47 ` Andrew Jones
2023-02-20 19:47 ` Andrew Jones
2023-02-16 18:20 ` [PATCH V2 16/21] clocksource/timer-riscv: Add ACPI support Sunil V L
2023-02-16 18:20 ` Sunil V L
2023-02-20 19:51 ` Andrew Jones
2023-02-20 19:51 ` Andrew Jones
2023-02-16 18:20 ` [PATCH V2 17/21] RISC-V: time.c: Add ACPI support for time_init() Sunil V L
2023-02-16 18:20 ` Sunil V L
2023-02-20 19:58 ` Andrew Jones
2023-02-20 19:58 ` Andrew Jones
2023-02-24 12:33 ` Sunil V L
2023-02-24 12:33 ` Sunil V L
2023-02-16 18:20 ` [PATCH V2 18/21] RISC-V: Add ACPI initialization in setup_arch() Sunil V L
2023-02-16 18:20 ` Sunil V L
2023-02-20 20:07 ` Andrew Jones
2023-02-20 20:07 ` Andrew Jones
2023-02-24 12:36 ` Sunil V L
2023-02-24 12:36 ` Sunil V L
2023-02-24 13:07 ` Andrew Jones
2023-02-24 13:07 ` Andrew Jones
2023-02-24 14:44 ` Sunil V L
2023-02-24 14:44 ` Sunil V L
2023-02-16 18:20 ` [PATCH V2 19/21] RISC-V: Enable ACPI in defconfig Sunil V L
2023-02-16 18:20 ` Sunil V L
2023-02-20 20:09 ` Andrew Jones
2023-02-20 20:09 ` Andrew Jones
2023-02-24 8:46 ` Sunil V L
2023-02-24 8:46 ` Sunil V L
2023-02-16 18:20 ` [PATCH V2 20/21] MAINTAINERS: Add entry for drivers/acpi/riscv Sunil V L
2023-02-16 18:20 ` Sunil V L
2023-02-20 20:14 ` Andrew Jones
2023-02-20 20:14 ` Andrew Jones
2023-02-24 12:38 ` Sunil V L
2023-02-24 12:38 ` Sunil V L
2023-02-16 18:20 ` [PATCH V2 21/21] Documentation/kernel-parameters.txt: Add RISC-V for ACPI parameter Sunil V L
2023-02-16 18:20 ` Sunil V L
2023-02-20 20:15 ` Andrew Jones
2023-02-20 20:15 ` Andrew Jones
2023-02-24 12:37 ` Sunil V L
2023-02-24 12:37 ` Sunil V L
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