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From: Rob Herring <robh@kernel.org>
To: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Cc: andersson@kernel.org, lpieralisi@kernel.org, kw@linux.com,
	krzysztof.kozlowski+dt@linaro.org, vkoul@kernel.org,
	konrad.dybcio@linaro.org, bhelgaas@google.com, kishon@kernel.org,
	linux-arm-msm@vger.kernel.org, linux-phy@lists.infradead.org,
	linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org,
	devicetree@vger.kernel.org
Subject: Re: [PATCH v2 02/13] dt-bindings: PCI: qcom: Add iommu properties
Date: Mon, 27 Feb 2023 13:55:35 -0600	[thread overview]
Message-ID: <20230227195535.GA749409-robh@kernel.org> (raw)
In-Reply-To: <20230224105906.16540-3-manivannan.sadhasivam@linaro.org>

On Fri, Feb 24, 2023 at 04:28:55PM +0530, Manivannan Sadhasivam wrote:
> Most of the PCIe controllers require iommu support to function properly.
> So let's add them to the binding.
> 
> Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
> ---
>  Documentation/devicetree/bindings/pci/qcom,pcie.yaml | 5 +++++
>  1 file changed, 5 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie.yaml b/Documentation/devicetree/bindings/pci/qcom,pcie.yaml
> index a3639920fcbb..f48d0792aa57 100644
> --- a/Documentation/devicetree/bindings/pci/qcom,pcie.yaml
> +++ b/Documentation/devicetree/bindings/pci/qcom,pcie.yaml
> @@ -64,6 +64,11 @@ properties:
>  
>    dma-coherent: true
>  
> +  iommus:
> +    maxItems: 1
> +
> +  iommu-map: true
> +

I think both properties together doesn't make sense unless the PCI host 
itself does DMA in addition to PCI bus devices doing DMA.

Rob

WARNING: multiple messages have this Message-ID (diff)
From: Rob Herring <robh@kernel.org>
To: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Cc: andersson@kernel.org, lpieralisi@kernel.org, kw@linux.com,
	krzysztof.kozlowski+dt@linaro.org, vkoul@kernel.org,
	konrad.dybcio@linaro.org, bhelgaas@google.com, kishon@kernel.org,
	linux-arm-msm@vger.kernel.org, linux-phy@lists.infradead.org,
	linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org,
	devicetree@vger.kernel.org
Subject: Re: [PATCH v2 02/13] dt-bindings: PCI: qcom: Add iommu properties
Date: Mon, 27 Feb 2023 13:55:35 -0600	[thread overview]
Message-ID: <20230227195535.GA749409-robh@kernel.org> (raw)
In-Reply-To: <20230224105906.16540-3-manivannan.sadhasivam@linaro.org>

On Fri, Feb 24, 2023 at 04:28:55PM +0530, Manivannan Sadhasivam wrote:
> Most of the PCIe controllers require iommu support to function properly.
> So let's add them to the binding.
> 
> Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
> ---
>  Documentation/devicetree/bindings/pci/qcom,pcie.yaml | 5 +++++
>  1 file changed, 5 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie.yaml b/Documentation/devicetree/bindings/pci/qcom,pcie.yaml
> index a3639920fcbb..f48d0792aa57 100644
> --- a/Documentation/devicetree/bindings/pci/qcom,pcie.yaml
> +++ b/Documentation/devicetree/bindings/pci/qcom,pcie.yaml
> @@ -64,6 +64,11 @@ properties:
>  
>    dma-coherent: true
>  
> +  iommus:
> +    maxItems: 1
> +
> +  iommu-map: true
> +

I think both properties together doesn't make sense unless the PCI host 
itself does DMA in addition to PCI bus devices doing DMA.

Rob

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linux-phy@lists.infradead.org
https://lists.infradead.org/mailman/listinfo/linux-phy

  reply	other threads:[~2023-02-27 19:56 UTC|newest]

Thread overview: 44+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-02-24 10:58 [PATCH v2 00/13] Add PCIe RC support to Qcom SDX55 SoC Manivannan Sadhasivam
2023-02-24 10:58 ` Manivannan Sadhasivam
2023-02-24 10:58 ` [PATCH v2 01/13] dt-bindings: PCI: qcom: Update maintainers entry Manivannan Sadhasivam
2023-02-24 10:58   ` Manivannan Sadhasivam
2023-02-24 10:58 ` [PATCH v2 02/13] dt-bindings: PCI: qcom: Add iommu properties Manivannan Sadhasivam
2023-02-24 10:58   ` Manivannan Sadhasivam
2023-02-27 19:55   ` Rob Herring [this message]
2023-02-27 19:55     ` Rob Herring
2023-02-28  8:20     ` Manivannan Sadhasivam
2023-02-28  8:20       ` Manivannan Sadhasivam
2023-03-01 14:58       ` Rob Herring
2023-03-01 14:58         ` Rob Herring
2023-03-08  8:00         ` Manivannan Sadhasivam
2023-03-08  8:00           ` Manivannan Sadhasivam
2023-02-24 10:58 ` [PATCH v2 03/13] dt-bindings: PCI: qcom: Add SDX55 SoC Manivannan Sadhasivam
2023-02-24 10:58   ` Manivannan Sadhasivam
2023-02-24 10:58 ` [PATCH v2 04/13] dt-bindings: PCI: qcom-ep: Fix the unit address used in example Manivannan Sadhasivam
2023-02-24 10:58   ` Manivannan Sadhasivam
2023-02-24 10:58 ` [PATCH v2 05/13] ARM: dts: qcom: sdx55: Fix the unit address of PCIe EP node Manivannan Sadhasivam
2023-02-24 10:58   ` Manivannan Sadhasivam
2023-02-24 10:58 ` [PATCH v2 06/13] ARM: dts: qcom: sdx55: Rename pcie0_{phy/lane} to pcie_{phy/lane} Manivannan Sadhasivam
2023-02-24 10:58   ` Manivannan Sadhasivam
2023-02-24 10:59 ` [PATCH v2 07/13] ARM: dts: qcom: sdx55: Add support for PCIe RC controller Manivannan Sadhasivam
2023-02-24 10:59   ` Manivannan Sadhasivam
2023-02-27  8:46   ` Konrad Dybcio
2023-02-27  8:46     ` Konrad Dybcio
2023-02-24 10:59 ` [PATCH v2 08/13] ARM: dts: qcom: sdx55: List the property values vertically Manivannan Sadhasivam
2023-02-24 10:59   ` Manivannan Sadhasivam
2023-02-27  8:46   ` Konrad Dybcio
2023-02-27  8:46     ` Konrad Dybcio
2023-02-24 10:59 ` [PATCH v2 09/13] ARM: dts: qcom: sdx55-t55: Enable PCIe RC support Manivannan Sadhasivam
2023-02-24 10:59   ` Manivannan Sadhasivam
2023-02-27  8:47   ` Konrad Dybcio
2023-02-27  8:47     ` Konrad Dybcio
2023-02-24 10:59 ` [PATCH v2 10/13] ARM: dts: qcom: sdx55-t55: Move "status" property down Manivannan Sadhasivam
2023-02-24 10:59   ` Manivannan Sadhasivam
2023-02-27  8:47   ` Konrad Dybcio
2023-02-27  8:47     ` Konrad Dybcio
2023-02-24 10:59 ` [PATCH v2 11/13] phy: qcom-qmp-pcie: Split out EP related init sequence for SDX55 Manivannan Sadhasivam
2023-02-24 10:59   ` Manivannan Sadhasivam
2023-02-24 10:59 ` [PATCH v2 12/13] phy: qcom-qmp-pcie: Add RC " Manivannan Sadhasivam
2023-02-24 10:59   ` Manivannan Sadhasivam
2023-02-24 10:59 ` [PATCH v2 13/13] PCI: qcom: Add support for SDX55 SoC Manivannan Sadhasivam
2023-02-24 10:59   ` Manivannan Sadhasivam

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