Re: [PATCH v2 02/13] dt-bindings: PCI: qcom: Add iommu properties

From: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
To: Rob Herring <robh@kernel.org>
Cc: Robin Murphy <Robin.Murphy@arm.com>,
	andersson@kernel.org, lpieralisi@kernel.org, kw@linux.com,
	krzysztof.kozlowski+dt@linaro.org, vkoul@kernel.org,
	konrad.dybcio@linaro.org, bhelgaas@google.com, kishon@kernel.org,
	linux-arm-msm@vger.kernel.org, linux-phy@lists.infradead.org,
	linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org,
	devicetree@vger.kernel.org
Subject: Re: [PATCH v2 02/13] dt-bindings: PCI: qcom: Add iommu properties
Date: Wed, 8 Mar 2023 13:30:22 +0530	[thread overview]
Message-ID: <20230308080022.GA134293@thinkpad> (raw)
In-Reply-To: <CAL_JsqJXb1junhU+56ZcqHzAq8g0VN8BzQ2A1C9rB80pZDWJ-w@mail.gmail.com>

On Wed, Mar 01, 2023 at 08:58:51AM -0600, Rob Herring wrote:
> +Robin
> 
> On Tue, Feb 28, 2023 at 2:20 AM Manivannan Sadhasivam
> <manivannan.sadhasivam@linaro.org> wrote:
> >
> > On Mon, Feb 27, 2023 at 01:55:35PM -0600, Rob Herring wrote:
> > > On Fri, Feb 24, 2023 at 04:28:55PM +0530, Manivannan Sadhasivam wrote:
> > > > Most of the PCIe controllers require iommu support to function properly.
> > > > So let's add them to the binding.
> > > >
> > > > Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
> > > > ---
> > > >  Documentation/devicetree/bindings/pci/qcom,pcie.yaml | 5 +++++
> > > >  1 file changed, 5 insertions(+)
> > > >
> > > > diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie.yaml b/Documentation/devicetree/bindings/pci/qcom,pcie.yaml
> > > > index a3639920fcbb..f48d0792aa57 100644
> > > > --- a/Documentation/devicetree/bindings/pci/qcom,pcie.yaml
> > > > +++ b/Documentation/devicetree/bindings/pci/qcom,pcie.yaml
> > > > @@ -64,6 +64,11 @@ properties:
> > > >
> > > >    dma-coherent: true
> > > >
> > > > +  iommus:
> > > > +    maxItems: 1
> > > > +
> > > > +  iommu-map: true
> > > > +
> > >
> > > I think both properties together doesn't make sense unless the PCI host
> > > itself does DMA in addition to PCI bus devices doing DMA.
> > >
> >
> > How? With "iommus", we specify the SMR mask along with the starting SID and with
> > iommu-map, the individual SID<->BDF mapping is specified. This has nothing to
> > do with host DMA capabilities.
> 
> I spoke with Robin offline and he agrees that having both is broken at
> least in RC mode. He pointed out the issue is similar to this one on
> Tegra[1].
> 

Looked into that thread and concluded that "iommus" property should go away.
Submitted a patch [1] to remove that property from PCIe nodes of all Qualcomm
SoCs.

Thanks for pointing out! Will update this bindings patch in next revision.

- Mani

[1] https://lore.kernel.org/linux-arm-msm/20230308075648.134119-1-manivannan.sadhasivam@linaro.org/

> Rob
> 
> [1] https://lore.kernel.org/all/AS8P193MB2095640357779A7F9B6026F8D2A19@AS8P193MB2095.EURP193.PROD.OUTLOOK.COM/

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