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From: Jacob Pan <jacob.jun.pan@linux.intel.com>
To: Jason Gunthorpe <jgg@nvidia.com>
Cc: LKML <linux-kernel@vger.kernel.org>,
	iommu@lists.linux.dev, Lu Baolu <baolu.lu@linux.intel.com>,
	Joerg Roedel <joro@8bytes.org>,
	dmaengine@vger.kernel.org, vkoul@kernel.org,
	Robin Murphy <robin.murphy@arm.com>,
	Will Deacon <will@kernel.org>,
	David Woodhouse <dwmw2@infradead.org>,
	Raj Ashok <ashok.raj@intel.com>,
	"Tian, Kevin" <kevin.tian@intel.com>, Yi Liu <yi.l.liu@intel.com>,
	"Yu, Fenghua" <fenghua.yu@intel.com>,
	Dave Jiang <dave.jiang@intel.com>,
	Tony Luck <tony.luck@intel.com>,
	"Zanussi, Tom" <tom.zanussi@intel.com>,
	jacob.jun.pan@linux.intel.com
Subject: Re: [PATCH 1/4] iommu/vt-d: Implement set device pasid op for default domain
Date: Mon, 6 Mar 2023 09:36:26 -0800	[thread overview]
Message-ID: <20230306093626.31c1573e@jacob-builder> (raw)
In-Reply-To: <ZAXjVaucrkEvrfsw@nvidia.com>

Hi Jason,

On Mon, 6 Mar 2023 08:57:57 -0400, Jason Gunthorpe <jgg@nvidia.com> wrote:

> On Wed, Mar 01, 2023 at 04:59:56PM -0800, Jacob Pan wrote:
> > On VT-d platforms, legacy DMA requests without PASID use device’s
> > default domain, where RID_PASID is always attached. Device drivers
> > can then use the DMA API for all in-kernel DMA on the RID.
> > 
> > Ideally, devices capable of using ENQCMDS can also transparently use the
> > default domain, consequently DMA API. However, VT-d architecture
> > dictates that the PASID used by ENQCMDS must be different from the
> > RID_PASID value.
> > 
> > To provide support for transparent use of DMA API with non-RID_PASID
> > value, this patch implements the set_dev_pasid() function for the
> > default domain. The idea is that device drivers wishing to use ENQCMDS
> > to submit work on buffers mapped by DMA API will call
> > iommu_attach_device_pasid() beforehand.
> > 
> > Signed-off-by: Jacob Pan <jacob.jun.pan@linux.intel.com>
> > ---
> >  drivers/iommu/intel/iommu.c | 32 ++++++++++++++++++++++++++++++++
> >  1 file changed, 32 insertions(+)
> > 
> > diff --git a/drivers/iommu/intel/iommu.c b/drivers/iommu/intel/iommu.c
> > index 10f657828d3a..a0cb3bc851ac 100644
> > --- a/drivers/iommu/intel/iommu.c
> > +++ b/drivers/iommu/intel/iommu.c
> > @@ -4665,6 +4665,10 @@ static void intel_iommu_remove_dev_pasid(struct
> > device *dev, ioasid_t pasid) case IOMMU_DOMAIN_SVA:
> >  			intel_svm_remove_dev_pasid(dev, pasid);
> >  			break;
> > +		case IOMMU_DOMAIN_DMA:
> > +		case IOMMU_DOMAIN_DMA_FQ:
> > +		case IOMMU_DOMAIN_IDENTITY:  
> 
> Why do we need this switch statement anyhow?
For DMA API pasid, there is nothing special just let it fall through and
call 
	intel_pasid_tear_down_entry(iommu, dev, pasid, false);

> Something seems to have
> gone wrong here.. SVM shouldn't be special, 
I think all the trouble is caused by  the asymmetrical setup of
iommu_op.remove_dev_pasid() and iommu_domain_ops.set_dev_pasid()
Perhaps, we should "demote" remove_dev_pasid to iommu_domain_ops then we
don't have to check SVA specific things.

> and why does this call intel_pasid_tear_down_entry() twice on the SVA
> path?
Good catch, that seems to be unnecessary.

> It seems like all this is doing is flushing the PRI queue.
> A domain should have a dedicated flag unrelated to the type if it is
> using PRI and all PRI using domains should have the PRI queue flushed
> here, using the same code as flushing the PRI for a RID attachment.
Yes, or if the teardown op is domain-specific, then it works too?


Thanks,

Jacob

  reply	other threads:[~2023-03-06 17:35 UTC|newest]

Thread overview: 50+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-03-02  0:59 [PATCH 0/4] Re-enable IDXD kernel workqueue under DMA API Jacob Pan
2023-03-02  0:59 ` [PATCH 1/4] iommu/vt-d: Implement set device pasid op for default domain Jacob Pan
2023-03-02  9:37   ` Tian, Kevin
2023-03-02 19:25     ` Jacob Pan
2023-03-02 14:06   ` Baolu Lu
2023-03-03  2:36     ` Tian, Kevin
2023-03-03  2:48       ` Baolu Lu
2023-03-03  3:02         ` Tian, Kevin
2023-03-03  4:38           ` Baolu Lu
2023-03-03  5:35             ` Tian, Kevin
2023-03-06 19:04               ` Jacob Pan
2023-03-06 19:02                 ` Jason Gunthorpe
2023-03-06 23:45                   ` Jacob Pan
2023-03-07  0:45                     ` Jacob Pan
2023-03-03  5:38     ` Tian, Kevin
2023-03-03 16:35       ` Jacob Pan
2023-03-05  3:05         ` Baolu Lu
2023-03-06  8:18           ` Tian, Kevin
2023-03-06 18:43             ` Jacob Pan
2023-03-06 18:29           ` Jacob Pan
2023-03-06 12:57   ` Jason Gunthorpe
2023-03-06 17:36     ` Jacob Pan [this message]
2023-03-06 17:41       ` Jason Gunthorpe
2023-03-07  2:15         ` Baolu Lu
2023-03-02  0:59 ` [PATCH 2/4] iommu/vt-d: Use non-privileged mode for all PASIDs Jacob Pan
2023-03-02 14:11   ` Baolu Lu
2023-03-03 21:40     ` Jacob Pan
2023-03-02  0:59 ` [PATCH 3/4] iommu/sva: Support reservation of global PASIDs Jacob Pan
2023-03-02  3:06   ` kernel test robot
2023-03-02  3:19   ` kernel test robot
2023-03-02  9:43   ` Tian, Kevin
2023-03-03 21:47     ` Jacob Pan
2023-03-06 13:01       ` Jason Gunthorpe
2023-03-06 17:44         ` Jacob Pan
2023-03-06 17:43           ` Jason Gunthorpe
2023-03-06 17:57             ` Jacob Pan
2023-03-06 18:19               ` Jason Gunthorpe
2023-03-06 18:48                 ` Luck, Tony
2023-03-06 19:05                   ` Jason Gunthorpe
2023-03-09 17:06                     ` Jacob Pan
2023-03-16  7:25                       ` Tian, Kevin
2023-03-20 17:22                         ` Jason Gunthorpe
2023-03-02  0:59 ` [PATCH 4/4] dmaengine/idxd: Re-enable kernel workqueue under DMA API Jacob Pan
2023-03-02  1:03   ` Dave Jiang
2023-03-02  9:47   ` Tian, Kevin
2023-03-02 12:57     ` Jason Gunthorpe
2023-03-03 21:49       ` Jacob Pan
2023-03-03 22:12     ` Jacob Pan
2023-03-03  1:19   ` Baolu Lu
2023-03-03 21:52     ` Jacob Pan

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