From: Jason Gunthorpe <jgg@nvidia.com>
To: Jacob Pan <jacob.jun.pan@linux.intel.com>
Cc: "Tian, Kevin" <kevin.tian@intel.com>,
LKML <linux-kernel@vger.kernel.org>,
"iommu@lists.linux.dev" <iommu@lists.linux.dev>,
Lu Baolu <baolu.lu@linux.intel.com>,
Joerg Roedel <joro@8bytes.org>,
"dmaengine@vger.kernel.org" <dmaengine@vger.kernel.org>,
"vkoul@kernel.org" <vkoul@kernel.org>,
Robin Murphy <robin.murphy@arm.com>,
Will Deacon <will@kernel.org>,
David Woodhouse <dwmw2@infradead.org>,
"Raj, Ashok" <ashok.raj@intel.com>,
"Liu, Yi L" <yi.l.liu@intel.com>,
"Yu, Fenghua" <fenghua.yu@intel.com>,
"Jiang, Dave" <dave.jiang@intel.com>,
"Luck, Tony" <tony.luck@intel.com>,
"Zanussi, Tom" <tom.zanussi@intel.com>
Subject: Re: [PATCH 3/4] iommu/sva: Support reservation of global PASIDs
Date: Mon, 6 Mar 2023 14:19:08 -0400 [thread overview]
Message-ID: <ZAYunPcgSOGFK8Qi@nvidia.com> (raw)
In-Reply-To: <20230306095759.1dd65cca@jacob-builder>
On Mon, Mar 06, 2023 at 09:57:59AM -0800, Jacob Pan wrote:
> ENQCMDS does not have the restriction of using a single CPU MSR to store
> PASIDs, PASID is supplied to the instruction operand.
Huh? That isn't what it says in the programming manual. It says the
PASID only comes from the IA32_PASID msr and the only two operands are
the destination MMIO and the memory source for the rest of the payload.
Jason
next prev parent reply other threads:[~2023-03-06 18:20 UTC|newest]
Thread overview: 50+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-03-02 0:59 [PATCH 0/4] Re-enable IDXD kernel workqueue under DMA API Jacob Pan
2023-03-02 0:59 ` [PATCH 1/4] iommu/vt-d: Implement set device pasid op for default domain Jacob Pan
2023-03-02 9:37 ` Tian, Kevin
2023-03-02 19:25 ` Jacob Pan
2023-03-02 14:06 ` Baolu Lu
2023-03-03 2:36 ` Tian, Kevin
2023-03-03 2:48 ` Baolu Lu
2023-03-03 3:02 ` Tian, Kevin
2023-03-03 4:38 ` Baolu Lu
2023-03-03 5:35 ` Tian, Kevin
2023-03-06 19:04 ` Jacob Pan
2023-03-06 19:02 ` Jason Gunthorpe
2023-03-06 23:45 ` Jacob Pan
2023-03-07 0:45 ` Jacob Pan
2023-03-03 5:38 ` Tian, Kevin
2023-03-03 16:35 ` Jacob Pan
2023-03-05 3:05 ` Baolu Lu
2023-03-06 8:18 ` Tian, Kevin
2023-03-06 18:43 ` Jacob Pan
2023-03-06 18:29 ` Jacob Pan
2023-03-06 12:57 ` Jason Gunthorpe
2023-03-06 17:36 ` Jacob Pan
2023-03-06 17:41 ` Jason Gunthorpe
2023-03-07 2:15 ` Baolu Lu
2023-03-02 0:59 ` [PATCH 2/4] iommu/vt-d: Use non-privileged mode for all PASIDs Jacob Pan
2023-03-02 14:11 ` Baolu Lu
2023-03-03 21:40 ` Jacob Pan
2023-03-02 0:59 ` [PATCH 3/4] iommu/sva: Support reservation of global PASIDs Jacob Pan
2023-03-02 3:06 ` kernel test robot
2023-03-02 3:19 ` kernel test robot
2023-03-02 9:43 ` Tian, Kevin
2023-03-03 21:47 ` Jacob Pan
2023-03-06 13:01 ` Jason Gunthorpe
2023-03-06 17:44 ` Jacob Pan
2023-03-06 17:43 ` Jason Gunthorpe
2023-03-06 17:57 ` Jacob Pan
2023-03-06 18:19 ` Jason Gunthorpe [this message]
2023-03-06 18:48 ` Luck, Tony
2023-03-06 19:05 ` Jason Gunthorpe
2023-03-09 17:06 ` Jacob Pan
2023-03-16 7:25 ` Tian, Kevin
2023-03-20 17:22 ` Jason Gunthorpe
2023-03-02 0:59 ` [PATCH 4/4] dmaengine/idxd: Re-enable kernel workqueue under DMA API Jacob Pan
2023-03-02 1:03 ` Dave Jiang
2023-03-02 9:47 ` Tian, Kevin
2023-03-02 12:57 ` Jason Gunthorpe
2023-03-03 21:49 ` Jacob Pan
2023-03-03 22:12 ` Jacob Pan
2023-03-03 1:19 ` Baolu Lu
2023-03-03 21:52 ` Jacob Pan
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