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From: Minda Chen <minda.chen@starfivetech.com>
To: Emil Renner Berthing <emil.renner.berthing@canonical.com>,
	Conor Dooley <conor@kernel.org>, Vinod Koul <vkoul@kernel.org>,
	Kishon Vijay Abraham I <kishon@kernel.org>,
	Rob Herring <robh+dt@kernel.org>,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
	Pawel Laszczak <pawell@cadence.com>,
	Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
	Peter Chen <peter.chen@kernel.org>,
	Roger Quadros <rogerq@kernel.org>,
	Philipp Zabel <p.zabel@pengutronix.de>
Cc: <devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
	<linux-phy@lists.infradead.org>, <linux-usb@vger.kernel.org>,
	<linux-riscv@lists.infradead.org>,
	Paul Walmsley <paul.walmsley@sifive.com>,
	Palmer Dabbelt <palmer@dabbelt.com>,
	Albert Ou <aou@eecs.berkeley.edu>,
	"Minda Chen" <minda.chen@starfivetech.com>
Subject: [PATCH v3 1/5] dt-bindings: phy: Add StarFive JH7110 USB/PCIe document
Date: Wed, 15 Mar 2023 18:44:07 +0800	[thread overview]
Message-ID: <20230315104411.73614-2-minda.chen@starfivetech.com> (raw)
In-Reply-To: <20230315104411.73614-1-minda.chen@starfivetech.com>

Add StarFive JH7110 SoC USB 2.0/3.0 and PCIe 2.0 PHY dt-binding.
PCIe 2.0 phy can use as USB 3.0 PHY.

Signed-off-by: Minda Chen <minda.chen@starfivetech.com>
---
 .../phy/starfive,jh7110-usb-pcie-phy.yaml     | 62 +++++++++++++++++++
 1 file changed, 62 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/phy/starfive,jh7110-usb-pcie-phy.yaml

diff --git a/Documentation/devicetree/bindings/phy/starfive,jh7110-usb-pcie-phy.yaml b/Documentation/devicetree/bindings/phy/starfive,jh7110-usb-pcie-phy.yaml
new file mode 100644
index 000000000000..aa1c3fe93100
--- /dev/null
+++ b/Documentation/devicetree/bindings/phy/starfive,jh7110-usb-pcie-phy.yaml
@@ -0,0 +1,62 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/phy/starfive,jh7110-usb-pcie-phy.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: StarFive USB 2.0 and PCIe 2.0 PHY
+
+maintainers:
+  - Minda Chen <minda.chen@starfivetech.com>
+
+properties:
+  compatible:
+    enum:
+      - starfive,jh7110-usb-phy
+      - starfive,jh7110-pcie-phy
+
+  reg:
+    maxItems: 1
+
+  "#phy-cells":
+    const: 0
+
+  clocks:
+    items:
+      - description: usb 125m clock
+      - description: app 125m clock
+
+  clock-names:
+    items:
+      - const: 125m
+      - const: app_125
+
+required:
+  - compatible
+  - reg
+  - "#phy-cells"
+
+additionalProperties: false
+
+examples:
+  - |
+    phy@10200000 {
+      compatible = "starfive,jh7110-usb-phy";
+      reg = <0x10200000 0x10000>;
+      clocks = <&syscrg 95>,
+               <&stgcrg 6>;
+      clock-names = "125m", "app_125";
+      #phy-cells = <0>;
+    };
+
+    phy@10210000 {
+      compatible = "starfive,jh7110-pcie-phy";
+      reg = <0x10210000 0x10000>;
+      #phy-cells = <0>;
+    };
+
+    phy@10220000 {
+      compatible = "starfive,jh7110-pcie-phy";
+      reg = <0x10220000 0x10000>;
+      #phy-cells = <0>;
+    };
-- 
2.17.1


-- 
linux-phy mailing list
linux-phy@lists.infradead.org
https://lists.infradead.org/mailman/listinfo/linux-phy

WARNING: multiple messages have this Message-ID (diff)
From: Minda Chen <minda.chen@starfivetech.com>
To: Emil Renner Berthing <emil.renner.berthing@canonical.com>,
	Conor Dooley <conor@kernel.org>, Vinod Koul <vkoul@kernel.org>,
	Kishon Vijay Abraham I <kishon@kernel.org>,
	Rob Herring <robh+dt@kernel.org>,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
	Pawel Laszczak <pawell@cadence.com>,
	Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
	Peter Chen <peter.chen@kernel.org>,
	Roger Quadros <rogerq@kernel.org>,
	Philipp Zabel <p.zabel@pengutronix.de>
Cc: <devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
	<linux-phy@lists.infradead.org>, <linux-usb@vger.kernel.org>,
	<linux-riscv@lists.infradead.org>,
	Paul Walmsley <paul.walmsley@sifive.com>,
	Palmer Dabbelt <palmer@dabbelt.com>,
	Albert Ou <aou@eecs.berkeley.edu>,
	"Minda Chen" <minda.chen@starfivetech.com>
Subject: [PATCH v3 1/5] dt-bindings: phy: Add StarFive JH7110 USB/PCIe document
Date: Wed, 15 Mar 2023 18:44:07 +0800	[thread overview]
Message-ID: <20230315104411.73614-2-minda.chen@starfivetech.com> (raw)
In-Reply-To: <20230315104411.73614-1-minda.chen@starfivetech.com>

Add StarFive JH7110 SoC USB 2.0/3.0 and PCIe 2.0 PHY dt-binding.
PCIe 2.0 phy can use as USB 3.0 PHY.

Signed-off-by: Minda Chen <minda.chen@starfivetech.com>
---
 .../phy/starfive,jh7110-usb-pcie-phy.yaml     | 62 +++++++++++++++++++
 1 file changed, 62 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/phy/starfive,jh7110-usb-pcie-phy.yaml

diff --git a/Documentation/devicetree/bindings/phy/starfive,jh7110-usb-pcie-phy.yaml b/Documentation/devicetree/bindings/phy/starfive,jh7110-usb-pcie-phy.yaml
new file mode 100644
index 000000000000..aa1c3fe93100
--- /dev/null
+++ b/Documentation/devicetree/bindings/phy/starfive,jh7110-usb-pcie-phy.yaml
@@ -0,0 +1,62 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/phy/starfive,jh7110-usb-pcie-phy.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: StarFive USB 2.0 and PCIe 2.0 PHY
+
+maintainers:
+  - Minda Chen <minda.chen@starfivetech.com>
+
+properties:
+  compatible:
+    enum:
+      - starfive,jh7110-usb-phy
+      - starfive,jh7110-pcie-phy
+
+  reg:
+    maxItems: 1
+
+  "#phy-cells":
+    const: 0
+
+  clocks:
+    items:
+      - description: usb 125m clock
+      - description: app 125m clock
+
+  clock-names:
+    items:
+      - const: 125m
+      - const: app_125
+
+required:
+  - compatible
+  - reg
+  - "#phy-cells"
+
+additionalProperties: false
+
+examples:
+  - |
+    phy@10200000 {
+      compatible = "starfive,jh7110-usb-phy";
+      reg = <0x10200000 0x10000>;
+      clocks = <&syscrg 95>,
+               <&stgcrg 6>;
+      clock-names = "125m", "app_125";
+      #phy-cells = <0>;
+    };
+
+    phy@10210000 {
+      compatible = "starfive,jh7110-pcie-phy";
+      reg = <0x10210000 0x10000>;
+      #phy-cells = <0>;
+    };
+
+    phy@10220000 {
+      compatible = "starfive,jh7110-pcie-phy";
+      reg = <0x10220000 0x10000>;
+      #phy-cells = <0>;
+    };
-- 
2.17.1


_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv

WARNING: multiple messages have this Message-ID (diff)
From: Minda Chen <minda.chen@starfivetech.com>
To: Emil Renner Berthing <emil.renner.berthing@canonical.com>,
	Conor Dooley <conor@kernel.org>, Vinod Koul <vkoul@kernel.org>,
	Kishon Vijay Abraham I <kishon@kernel.org>,
	Rob Herring <robh+dt@kernel.org>,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
	Pawel Laszczak <pawell@cadence.com>,
	Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
	Peter Chen <peter.chen@kernel.org>,
	Roger Quadros <rogerq@kernel.org>,
	Philipp Zabel <p.zabel@pengutronix.de>
Cc: <devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
	<linux-phy@lists.infradead.org>, <linux-usb@vger.kernel.org>,
	<linux-riscv@lists.infradead.org>,
	Paul Walmsley <paul.walmsley@sifive.com>,
	Palmer Dabbelt <palmer@dabbelt.com>,
	Albert Ou <aou@eecs.berkeley.edu>,
	"Minda Chen" <minda.chen@starfivetech.com>
Subject: [PATCH v3 1/5] dt-bindings: phy: Add StarFive JH7110 USB/PCIe document
Date: Wed, 15 Mar 2023 18:44:07 +0800	[thread overview]
Message-ID: <20230315104411.73614-2-minda.chen@starfivetech.com> (raw)
In-Reply-To: <20230315104411.73614-1-minda.chen@starfivetech.com>

Add StarFive JH7110 SoC USB 2.0/3.0 and PCIe 2.0 PHY dt-binding.
PCIe 2.0 phy can use as USB 3.0 PHY.

Signed-off-by: Minda Chen <minda.chen@starfivetech.com>
---
 .../phy/starfive,jh7110-usb-pcie-phy.yaml     | 62 +++++++++++++++++++
 1 file changed, 62 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/phy/starfive,jh7110-usb-pcie-phy.yaml

diff --git a/Documentation/devicetree/bindings/phy/starfive,jh7110-usb-pcie-phy.yaml b/Documentation/devicetree/bindings/phy/starfive,jh7110-usb-pcie-phy.yaml
new file mode 100644
index 000000000000..aa1c3fe93100
--- /dev/null
+++ b/Documentation/devicetree/bindings/phy/starfive,jh7110-usb-pcie-phy.yaml
@@ -0,0 +1,62 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/phy/starfive,jh7110-usb-pcie-phy.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: StarFive USB 2.0 and PCIe 2.0 PHY
+
+maintainers:
+  - Minda Chen <minda.chen@starfivetech.com>
+
+properties:
+  compatible:
+    enum:
+      - starfive,jh7110-usb-phy
+      - starfive,jh7110-pcie-phy
+
+  reg:
+    maxItems: 1
+
+  "#phy-cells":
+    const: 0
+
+  clocks:
+    items:
+      - description: usb 125m clock
+      - description: app 125m clock
+
+  clock-names:
+    items:
+      - const: 125m
+      - const: app_125
+
+required:
+  - compatible
+  - reg
+  - "#phy-cells"
+
+additionalProperties: false
+
+examples:
+  - |
+    phy@10200000 {
+      compatible = "starfive,jh7110-usb-phy";
+      reg = <0x10200000 0x10000>;
+      clocks = <&syscrg 95>,
+               <&stgcrg 6>;
+      clock-names = "125m", "app_125";
+      #phy-cells = <0>;
+    };
+
+    phy@10210000 {
+      compatible = "starfive,jh7110-pcie-phy";
+      reg = <0x10210000 0x10000>;
+      #phy-cells = <0>;
+    };
+
+    phy@10220000 {
+      compatible = "starfive,jh7110-pcie-phy";
+      reg = <0x10220000 0x10000>;
+      #phy-cells = <0>;
+    };
-- 
2.17.1


  reply	other threads:[~2023-03-15 10:44 UTC|newest]

Thread overview: 93+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-03-15 10:44 [PATCH v3 0/5] Add JH7110 USB and USB PHY driver support Minda Chen
2023-03-15 10:44 ` Minda Chen
2023-03-15 10:44 ` Minda Chen
2023-03-15 10:44 ` Minda Chen [this message]
2023-03-15 10:44   ` [PATCH v3 1/5] dt-bindings: phy: Add StarFive JH7110 USB/PCIe document Minda Chen
2023-03-15 10:44   ` Minda Chen
2023-03-17  8:39   ` Krzysztof Kozlowski
2023-03-17  8:39     ` Krzysztof Kozlowski
2023-03-17  8:39     ` Krzysztof Kozlowski
2023-03-17 10:29     ` Minda Chen
2023-03-17 10:29       ` Minda Chen
2023-03-17 10:29       ` Minda Chen
2023-03-15 10:44 ` [PATCH v3 2/5] phy: starfive: add JH7110 PCIE 2.0 and USB 2.0 PHY driver Minda Chen
2023-03-15 10:44   ` Minda Chen
2023-03-15 10:44   ` Minda Chen
2023-03-20  8:55   ` Vinod Koul
2023-03-20  8:55     ` Vinod Koul
2023-03-20  8:55     ` Vinod Koul
2023-03-20 11:00     ` Minda Chen
2023-03-20 11:00       ` Minda Chen
2023-03-20 11:00       ` Minda Chen
2023-03-15 10:44 ` [PATCH v3 3/5] dt-binding: Add JH7110 USB wrapper layer doc Minda Chen
2023-03-15 10:44   ` Minda Chen
2023-03-15 10:44   ` Minda Chen
2023-03-16  2:43   ` Peter Chen
2023-03-16  2:43     ` Peter Chen
2023-03-16  2:43     ` Peter Chen
2023-03-17  8:43   ` Krzysztof Kozlowski
2023-03-17  8:43     ` Krzysztof Kozlowski
2023-03-17  8:43     ` Krzysztof Kozlowski
2023-03-17 10:30     ` Minda Chen
2023-03-17 10:30       ` Minda Chen
2023-03-17 10:30       ` Minda Chen
2023-03-23  9:23   ` Philipp Zabel
2023-03-23  9:23     ` Philipp Zabel
2023-03-23  9:23     ` Philipp Zabel
2023-03-27 11:04     ` Minda Chen
2023-03-27 11:04       ` Minda Chen
2023-03-27 11:04       ` Minda Chen
2023-03-15 10:44 ` [PATCH v3 4/5] usb: cdns3: add StarFive JH7110 USB driver Minda Chen
2023-03-15 10:44   ` Minda Chen
2023-03-15 10:44   ` Minda Chen
2023-03-15 13:32   ` Dongliang Mu
2023-03-15 13:32     ` Dongliang Mu
2023-03-15 13:32     ` Dongliang Mu
2023-03-16 11:17     ` Minda Chen
2023-03-16 11:17       ` Minda Chen
2023-03-16 11:17       ` Minda Chen
2023-03-16  2:46   ` Peter Chen
2023-03-16  2:46     ` Peter Chen
2023-03-16  2:46     ` Peter Chen
2023-03-16 11:16     ` Minda Chen
2023-03-16 11:16       ` Minda Chen
2023-03-16 11:16       ` Minda Chen
2023-03-20 15:26   ` Rob Herring
2023-03-20 15:26     ` Rob Herring
2023-03-20 15:26     ` Rob Herring
2023-03-21 11:50     ` Minda Chen
2023-03-21 11:50       ` Minda Chen
2023-03-21 11:50       ` Minda Chen
2023-03-23  9:29   ` Philipp Zabel
2023-03-23  9:29     ` Philipp Zabel
2023-03-23  9:29     ` Philipp Zabel
2023-03-27 11:04     ` Minda Chen
2023-03-27 11:04       ` Minda Chen
2023-03-27 11:04       ` Minda Chen
2023-03-15 10:44 ` [PATCH v3 5/5] dts: usb: add StarFive JH7110 USB dts configuration Minda Chen
2023-03-15 10:44   ` Minda Chen
2023-03-15 10:44   ` Minda Chen
2023-03-16  2:43   ` Peter Chen
2023-03-16  2:43     ` Peter Chen
2023-03-16  2:43     ` Peter Chen
2023-03-16  3:02     ` Minda Chen
2023-03-16  3:02       ` Minda Chen
2023-03-16  3:02       ` Minda Chen
2023-03-17  8:44   ` Krzysztof Kozlowski
2023-03-17  8:44     ` Krzysztof Kozlowski
2023-03-17  8:44     ` Krzysztof Kozlowski
2023-03-17 10:59     ` Minda Chen
2023-03-17 10:59       ` Minda Chen
2023-03-17 10:59       ` Minda Chen
2023-03-20 15:34   ` Rob Herring
2023-03-20 15:34     ` Rob Herring
2023-03-20 15:34     ` Rob Herring
2023-03-21 12:35     ` Minda Chen
2023-03-21 12:35       ` Minda Chen
2023-03-21 12:35       ` Minda Chen
2023-03-22  8:00       ` Roger Quadros
2023-03-22  8:00         ` Roger Quadros
2023-03-22  8:00         ` Roger Quadros
2023-03-22 10:50         ` Minda Chen
2023-03-22 10:50           ` Minda Chen
2023-03-22 10:50           ` Minda Chen

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