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From: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
To: Arnd Bergmann <arnd@kernel.org>
Cc: Arnd Bergmann <arnd@arndb.de>,
	Mauro Carvalho Chehab <mchehab@kernel.org>,
	Shawn Guo <shawnguo@kernel.org>,
	Sascha Hauer <s.hauer@pengutronix.de>,
	Pengutronix Kernel Team <kernel@pengutronix.de>,
	Fabio Estevam <festevam@gmail.com>,
	NXP Linux Team <linux-imx@nxp.com>,
	Jacopo Mondi <jacopo.mondi@ideasonboard.com>,
	Dong Aisheng <aisheng.dong@nxp.com>,
	Guoniu Zhou <guoniu.zhou@nxp.com>,
	Christian Hemp <c.hemp@phytec.de>,
	linux-media@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org
Subject: Re: [PATCH] [v2] media: nxp: imx8-isi: fix buiding on 32-bit
Date: Tue, 18 Apr 2023 09:47:07 +0300	[thread overview]
Message-ID: <20230418064707.GC4703@pendragon.ideasonboard.com> (raw)
In-Reply-To: <20230418061155.2923515-1-arnd@kernel.org>

Hi Arnd,

Thank you for the patch.

On Tue, Apr 18, 2023 at 08:11:43AM +0200, Arnd Bergmann wrote:
> From: Arnd Bergmann <arnd@arndb.de>
> 
> The #if check is wrong, leading to a build failure:
> 
> drivers/media/platform/nxp/imx8-isi/imx8-isi-hw.c: In function 'mxc_isi_channel_set_inbuf':
> drivers/media/platform/nxp/imx8-isi/imx8-isi-hw.c:33:5: error: "CONFIG_ARCH_DMA_ADDR_T_64BIT" is not defined, evaluates to 0 [-Werror=undef]
>    33 | #if CONFIG_ARCH_DMA_ADDR_T_64BIT
>       |     ^~~~~~~~~~~~~~~~~~~~~~~~~~~~
> 
> This could just be an #ifdef, but it seems nicer to just remove
> the check entirely. Apparently the only reason for the #ifdef
> is to avoid another warning:
> 
> drivers/media/platform/nxp/imx8-isi/imx8-isi-hw.c:55:24: error: right shift count >= width of type [-Werror=shift-count-overflow]
> 
> But this is best avoided by using the lower_32_bits()/upper_32_bits()
> helpers.
> 
> Fixes: cf21f328fcaf ("media: nxp: Add i.MX8 ISI driver")
> Signed-off-by: Arnd Bergmann <arnd@arndb.de>

Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>

Mauro, could you please pick this up for v6.4 ?

> ---
> v2: whitespace fixup
> ---
>  .../media/platform/nxp/imx8-isi/imx8-isi-hw.c | 41 ++++++++++---------
>  1 file changed, 21 insertions(+), 20 deletions(-)
> 
> diff --git a/drivers/media/platform/nxp/imx8-isi/imx8-isi-hw.c b/drivers/media/platform/nxp/imx8-isi/imx8-isi-hw.c
> index db538f3d88ec..19e80b95ffea 100644
> --- a/drivers/media/platform/nxp/imx8-isi/imx8-isi-hw.c
> +++ b/drivers/media/platform/nxp/imx8-isi/imx8-isi-hw.c
> @@ -29,11 +29,10 @@ static inline void mxc_isi_write(struct mxc_isi_pipe *pipe, u32 reg, u32 val)
>  
>  void mxc_isi_channel_set_inbuf(struct mxc_isi_pipe *pipe, dma_addr_t dma_addr)
>  {
> -	mxc_isi_write(pipe, CHNL_IN_BUF_ADDR, dma_addr);
> -#if CONFIG_ARCH_DMA_ADDR_T_64BIT
> +	mxc_isi_write(pipe, CHNL_IN_BUF_ADDR, lower_32_bits(dma_addr));
>  	if (pipe->isi->pdata->has_36bit_dma)
> -		mxc_isi_write(pipe, CHNL_IN_BUF_XTND_ADDR, dma_addr >> 32);
> -#endif
> +		mxc_isi_write(pipe, CHNL_IN_BUF_XTND_ADDR,
> +			      upper_32_bits(dma_addr));
>  }
>  
>  void mxc_isi_channel_set_outbuf(struct mxc_isi_pipe *pipe,
> @@ -45,34 +44,36 @@ void mxc_isi_channel_set_outbuf(struct mxc_isi_pipe *pipe,
>  	val = mxc_isi_read(pipe, CHNL_OUT_BUF_CTRL);
>  
>  	if (buf_id == MXC_ISI_BUF1) {
> -		mxc_isi_write(pipe, CHNL_OUT_BUF1_ADDR_Y, dma_addrs[0]);
> -		mxc_isi_write(pipe, CHNL_OUT_BUF1_ADDR_U, dma_addrs[1]);
> -		mxc_isi_write(pipe, CHNL_OUT_BUF1_ADDR_V, dma_addrs[2]);
> -#if CONFIG_ARCH_DMA_ADDR_T_64BIT
> +		mxc_isi_write(pipe, CHNL_OUT_BUF1_ADDR_Y,
> +			      lower_32_bits(dma_addrs[0]));
> +		mxc_isi_write(pipe, CHNL_OUT_BUF1_ADDR_U,
> +			      lower_32_bits(dma_addrs[1]));
> +		mxc_isi_write(pipe, CHNL_OUT_BUF1_ADDR_V,
> +			      lower_32_bits(dma_addrs[2]));
>  		if (pipe->isi->pdata->has_36bit_dma) {
>  			mxc_isi_write(pipe, CHNL_Y_BUF1_XTND_ADDR,
> -				      dma_addrs[0] >> 32);
> +				      upper_32_bits(dma_addrs[0]));
>  			mxc_isi_write(pipe, CHNL_U_BUF1_XTND_ADDR,
> -				      dma_addrs[1] >> 32);
> +				      upper_32_bits(dma_addrs[1]));
>  			mxc_isi_write(pipe, CHNL_V_BUF1_XTND_ADDR,
> -				      dma_addrs[2] >> 32);
> +				      upper_32_bits(dma_addrs[2]));
>  		}
> -#endif
>  		val ^= CHNL_OUT_BUF_CTRL_LOAD_BUF1_ADDR;
>  	} else  {
> -		mxc_isi_write(pipe, CHNL_OUT_BUF2_ADDR_Y, dma_addrs[0]);
> -		mxc_isi_write(pipe, CHNL_OUT_BUF2_ADDR_U, dma_addrs[1]);
> -		mxc_isi_write(pipe, CHNL_OUT_BUF2_ADDR_V, dma_addrs[2]);
> -#if CONFIG_ARCH_DMA_ADDR_T_64BIT
> +		mxc_isi_write(pipe, CHNL_OUT_BUF2_ADDR_Y,
> +			      lower_32_bits(dma_addrs[0]));
> +		mxc_isi_write(pipe, CHNL_OUT_BUF2_ADDR_U,
> +			      lower_32_bits(dma_addrs[1]));
> +		mxc_isi_write(pipe, CHNL_OUT_BUF2_ADDR_V,
> +			      lower_32_bits(dma_addrs[2]));
>  		if (pipe->isi->pdata->has_36bit_dma) {
>  			mxc_isi_write(pipe, CHNL_Y_BUF2_XTND_ADDR,
> -				      dma_addrs[0] >> 32);
> +				      upper_32_bits(dma_addrs[0]));
>  			mxc_isi_write(pipe, CHNL_U_BUF2_XTND_ADDR,
> -				      dma_addrs[1] >> 32);
> +				      upper_32_bits(dma_addrs[1]));
>  			mxc_isi_write(pipe, CHNL_V_BUF2_XTND_ADDR,
> -				      dma_addrs[2] >> 32);
> +				      upper_32_bits(dma_addrs[2]));
>  		}
> -#endif
>  		val ^= CHNL_OUT_BUF_CTRL_LOAD_BUF2_ADDR;
>  	}
>  

-- 
Regards,

Laurent Pinchart

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

WARNING: multiple messages have this Message-ID (diff)
From: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
To: Arnd Bergmann <arnd@kernel.org>
Cc: Arnd Bergmann <arnd@arndb.de>,
	Mauro Carvalho Chehab <mchehab@kernel.org>,
	Shawn Guo <shawnguo@kernel.org>,
	Sascha Hauer <s.hauer@pengutronix.de>,
	Pengutronix Kernel Team <kernel@pengutronix.de>,
	Fabio Estevam <festevam@gmail.com>,
	NXP Linux Team <linux-imx@nxp.com>,
	Jacopo Mondi <jacopo.mondi@ideasonboard.com>,
	Dong Aisheng <aisheng.dong@nxp.com>,
	Guoniu Zhou <guoniu.zhou@nxp.com>,
	Christian Hemp <c.hemp@phytec.de>,
	linux-media@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org
Subject: Re: [PATCH] [v2] media: nxp: imx8-isi: fix buiding on 32-bit
Date: Tue, 18 Apr 2023 09:47:07 +0300	[thread overview]
Message-ID: <20230418064707.GC4703@pendragon.ideasonboard.com> (raw)
In-Reply-To: <20230418061155.2923515-1-arnd@kernel.org>

Hi Arnd,

Thank you for the patch.

On Tue, Apr 18, 2023 at 08:11:43AM +0200, Arnd Bergmann wrote:
> From: Arnd Bergmann <arnd@arndb.de>
> 
> The #if check is wrong, leading to a build failure:
> 
> drivers/media/platform/nxp/imx8-isi/imx8-isi-hw.c: In function 'mxc_isi_channel_set_inbuf':
> drivers/media/platform/nxp/imx8-isi/imx8-isi-hw.c:33:5: error: "CONFIG_ARCH_DMA_ADDR_T_64BIT" is not defined, evaluates to 0 [-Werror=undef]
>    33 | #if CONFIG_ARCH_DMA_ADDR_T_64BIT
>       |     ^~~~~~~~~~~~~~~~~~~~~~~~~~~~
> 
> This could just be an #ifdef, but it seems nicer to just remove
> the check entirely. Apparently the only reason for the #ifdef
> is to avoid another warning:
> 
> drivers/media/platform/nxp/imx8-isi/imx8-isi-hw.c:55:24: error: right shift count >= width of type [-Werror=shift-count-overflow]
> 
> But this is best avoided by using the lower_32_bits()/upper_32_bits()
> helpers.
> 
> Fixes: cf21f328fcaf ("media: nxp: Add i.MX8 ISI driver")
> Signed-off-by: Arnd Bergmann <arnd@arndb.de>

Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>

Mauro, could you please pick this up for v6.4 ?

> ---
> v2: whitespace fixup
> ---
>  .../media/platform/nxp/imx8-isi/imx8-isi-hw.c | 41 ++++++++++---------
>  1 file changed, 21 insertions(+), 20 deletions(-)
> 
> diff --git a/drivers/media/platform/nxp/imx8-isi/imx8-isi-hw.c b/drivers/media/platform/nxp/imx8-isi/imx8-isi-hw.c
> index db538f3d88ec..19e80b95ffea 100644
> --- a/drivers/media/platform/nxp/imx8-isi/imx8-isi-hw.c
> +++ b/drivers/media/platform/nxp/imx8-isi/imx8-isi-hw.c
> @@ -29,11 +29,10 @@ static inline void mxc_isi_write(struct mxc_isi_pipe *pipe, u32 reg, u32 val)
>  
>  void mxc_isi_channel_set_inbuf(struct mxc_isi_pipe *pipe, dma_addr_t dma_addr)
>  {
> -	mxc_isi_write(pipe, CHNL_IN_BUF_ADDR, dma_addr);
> -#if CONFIG_ARCH_DMA_ADDR_T_64BIT
> +	mxc_isi_write(pipe, CHNL_IN_BUF_ADDR, lower_32_bits(dma_addr));
>  	if (pipe->isi->pdata->has_36bit_dma)
> -		mxc_isi_write(pipe, CHNL_IN_BUF_XTND_ADDR, dma_addr >> 32);
> -#endif
> +		mxc_isi_write(pipe, CHNL_IN_BUF_XTND_ADDR,
> +			      upper_32_bits(dma_addr));
>  }
>  
>  void mxc_isi_channel_set_outbuf(struct mxc_isi_pipe *pipe,
> @@ -45,34 +44,36 @@ void mxc_isi_channel_set_outbuf(struct mxc_isi_pipe *pipe,
>  	val = mxc_isi_read(pipe, CHNL_OUT_BUF_CTRL);
>  
>  	if (buf_id == MXC_ISI_BUF1) {
> -		mxc_isi_write(pipe, CHNL_OUT_BUF1_ADDR_Y, dma_addrs[0]);
> -		mxc_isi_write(pipe, CHNL_OUT_BUF1_ADDR_U, dma_addrs[1]);
> -		mxc_isi_write(pipe, CHNL_OUT_BUF1_ADDR_V, dma_addrs[2]);
> -#if CONFIG_ARCH_DMA_ADDR_T_64BIT
> +		mxc_isi_write(pipe, CHNL_OUT_BUF1_ADDR_Y,
> +			      lower_32_bits(dma_addrs[0]));
> +		mxc_isi_write(pipe, CHNL_OUT_BUF1_ADDR_U,
> +			      lower_32_bits(dma_addrs[1]));
> +		mxc_isi_write(pipe, CHNL_OUT_BUF1_ADDR_V,
> +			      lower_32_bits(dma_addrs[2]));
>  		if (pipe->isi->pdata->has_36bit_dma) {
>  			mxc_isi_write(pipe, CHNL_Y_BUF1_XTND_ADDR,
> -				      dma_addrs[0] >> 32);
> +				      upper_32_bits(dma_addrs[0]));
>  			mxc_isi_write(pipe, CHNL_U_BUF1_XTND_ADDR,
> -				      dma_addrs[1] >> 32);
> +				      upper_32_bits(dma_addrs[1]));
>  			mxc_isi_write(pipe, CHNL_V_BUF1_XTND_ADDR,
> -				      dma_addrs[2] >> 32);
> +				      upper_32_bits(dma_addrs[2]));
>  		}
> -#endif
>  		val ^= CHNL_OUT_BUF_CTRL_LOAD_BUF1_ADDR;
>  	} else  {
> -		mxc_isi_write(pipe, CHNL_OUT_BUF2_ADDR_Y, dma_addrs[0]);
> -		mxc_isi_write(pipe, CHNL_OUT_BUF2_ADDR_U, dma_addrs[1]);
> -		mxc_isi_write(pipe, CHNL_OUT_BUF2_ADDR_V, dma_addrs[2]);
> -#if CONFIG_ARCH_DMA_ADDR_T_64BIT
> +		mxc_isi_write(pipe, CHNL_OUT_BUF2_ADDR_Y,
> +			      lower_32_bits(dma_addrs[0]));
> +		mxc_isi_write(pipe, CHNL_OUT_BUF2_ADDR_U,
> +			      lower_32_bits(dma_addrs[1]));
> +		mxc_isi_write(pipe, CHNL_OUT_BUF2_ADDR_V,
> +			      lower_32_bits(dma_addrs[2]));
>  		if (pipe->isi->pdata->has_36bit_dma) {
>  			mxc_isi_write(pipe, CHNL_Y_BUF2_XTND_ADDR,
> -				      dma_addrs[0] >> 32);
> +				      upper_32_bits(dma_addrs[0]));
>  			mxc_isi_write(pipe, CHNL_U_BUF2_XTND_ADDR,
> -				      dma_addrs[1] >> 32);
> +				      upper_32_bits(dma_addrs[1]));
>  			mxc_isi_write(pipe, CHNL_V_BUF2_XTND_ADDR,
> -				      dma_addrs[2] >> 32);
> +				      upper_32_bits(dma_addrs[2]));
>  		}
> -#endif
>  		val ^= CHNL_OUT_BUF_CTRL_LOAD_BUF2_ADDR;
>  	}
>  

-- 
Regards,

Laurent Pinchart

  reply	other threads:[~2023-04-18  6:47 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-04-18  6:11 [PATCH] [v2] media: nxp: imx8-isi: fix buiding on 32-bit Arnd Bergmann
2023-04-18  6:11 ` Arnd Bergmann
2023-04-18  6:47 ` Laurent Pinchart [this message]
2023-04-18  6:47   ` Laurent Pinchart
2023-04-18  6:52   ` Hans Verkuil
2023-04-18  6:52     ` Hans Verkuil

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