* [PATCH V3 0/3] drm/panel: Add Anbernic RG353V-V2 Panel
@ 2023-04-26 14:32 ` Chris Morgan
0 siblings, 0 replies; 15+ messages in thread
From: Chris Morgan @ 2023-04-26 14:32 UTC (permalink / raw)
To: dri-devel
Cc: devicetree, krzysztof.kozlowski+dt, robh+dt, daniel, airlied, sam,
neil.armstrong, megous, kernel, agx, Chris Morgan
From: Chris Morgan <macromorgan@hotmail.com>
Add the NewVision NV3051D panel as found on the second revision of the
RG353V. The underlying LCD panel itself is unknown (ST7703 is the
controller IC).
Changes from V2:
- Rebased patch series (to address removal of dsi_dcs_write_seq custom
macro).
Changes from V1:
- Split redefinition of CMD_UNKNOWN_C6 into separate patch.
Chris Morgan (3):
dt-bindings: panel: Add Anbernic RG353V-V2 panel compatible
drm/panel: st7703: Rename CMD_UNKNOWN_C6 to CMD_SETECO
drm/panel: st7703: Add Anbernic RG353V-V2 Panel Support
.../display/panel/rocktech,jh057n00900.yaml | 2 +
drivers/gpu/drm/panel/panel-sitronix-st7703.c | 102 +++++++++++++++++-
2 files changed, 101 insertions(+), 3 deletions(-)
--
2.34.1
^ permalink raw reply [flat|nested] 15+ messages in thread
* [PATCH V3 0/3] drm/panel: Add Anbernic RG353V-V2 Panel
@ 2023-04-26 14:32 ` Chris Morgan
0 siblings, 0 replies; 15+ messages in thread
From: Chris Morgan @ 2023-04-26 14:32 UTC (permalink / raw)
To: dri-devel
Cc: megous, devicetree, krzysztof.kozlowski+dt, neil.armstrong, agx,
Chris Morgan, robh+dt, sam, kernel
From: Chris Morgan <macromorgan@hotmail.com>
Add the NewVision NV3051D panel as found on the second revision of the
RG353V. The underlying LCD panel itself is unknown (ST7703 is the
controller IC).
Changes from V2:
- Rebased patch series (to address removal of dsi_dcs_write_seq custom
macro).
Changes from V1:
- Split redefinition of CMD_UNKNOWN_C6 into separate patch.
Chris Morgan (3):
dt-bindings: panel: Add Anbernic RG353V-V2 panel compatible
drm/panel: st7703: Rename CMD_UNKNOWN_C6 to CMD_SETECO
drm/panel: st7703: Add Anbernic RG353V-V2 Panel Support
.../display/panel/rocktech,jh057n00900.yaml | 2 +
drivers/gpu/drm/panel/panel-sitronix-st7703.c | 102 +++++++++++++++++-
2 files changed, 101 insertions(+), 3 deletions(-)
--
2.34.1
^ permalink raw reply [flat|nested] 15+ messages in thread
* [PATCH V3 1/3] dt-bindings: panel: Add Anbernic RG353V-V2 panel compatible
2023-04-26 14:32 ` Chris Morgan
@ 2023-04-26 14:32 ` Chris Morgan
-1 siblings, 0 replies; 15+ messages in thread
From: Chris Morgan @ 2023-04-26 14:32 UTC (permalink / raw)
To: dri-devel
Cc: devicetree, krzysztof.kozlowski+dt, robh+dt, daniel, airlied, sam,
neil.armstrong, megous, kernel, agx, Chris Morgan,
Krzysztof Kozlowski
From: Chris Morgan <macromorgan@hotmail.com>
The Anbernic RG353V-V2 panel is a 3.5 inch 640x480 MIPI-DSI LCD panel.
It's based on the ST7703 LCD controller just like rocktech,jh057n00900.
It's used in a 2nd revision of the Anbernic RG353V handheld gaming
device. Like the first revision of the RG353V the control chip is known
but the panel itself is unknown, so name it for the device.
Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Acked-by: Guido Günther <agx@sigxcpu.org>
---
.../devicetree/bindings/display/panel/rocktech,jh057n00900.yaml | 2 ++
1 file changed, 2 insertions(+)
diff --git a/Documentation/devicetree/bindings/display/panel/rocktech,jh057n00900.yaml b/Documentation/devicetree/bindings/display/panel/rocktech,jh057n00900.yaml
index 09b5eb7542f8..150e81090af2 100644
--- a/Documentation/devicetree/bindings/display/panel/rocktech,jh057n00900.yaml
+++ b/Documentation/devicetree/bindings/display/panel/rocktech,jh057n00900.yaml
@@ -20,6 +20,8 @@ allOf:
properties:
compatible:
enum:
+ # Anberic RG353V-V2 5.0" 640x480 TFT LCD panel
+ - anbernic,rg353v-panel-v2
# Rocktech JH057N00900 5.5" 720x1440 TFT LCD panel
- rocktech,jh057n00900
# Xingbangda XBD599 5.99" 720x1440 TFT LCD panel
--
2.34.1
^ permalink raw reply related [flat|nested] 15+ messages in thread
* [PATCH V3 1/3] dt-bindings: panel: Add Anbernic RG353V-V2 panel compatible
@ 2023-04-26 14:32 ` Chris Morgan
0 siblings, 0 replies; 15+ messages in thread
From: Chris Morgan @ 2023-04-26 14:32 UTC (permalink / raw)
To: dri-devel
Cc: megous, devicetree, krzysztof.kozlowski+dt, neil.armstrong, agx,
Chris Morgan, Krzysztof Kozlowski, robh+dt, sam, kernel
From: Chris Morgan <macromorgan@hotmail.com>
The Anbernic RG353V-V2 panel is a 3.5 inch 640x480 MIPI-DSI LCD panel.
It's based on the ST7703 LCD controller just like rocktech,jh057n00900.
It's used in a 2nd revision of the Anbernic RG353V handheld gaming
device. Like the first revision of the RG353V the control chip is known
but the panel itself is unknown, so name it for the device.
Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Acked-by: Guido Günther <agx@sigxcpu.org>
---
.../devicetree/bindings/display/panel/rocktech,jh057n00900.yaml | 2 ++
1 file changed, 2 insertions(+)
diff --git a/Documentation/devicetree/bindings/display/panel/rocktech,jh057n00900.yaml b/Documentation/devicetree/bindings/display/panel/rocktech,jh057n00900.yaml
index 09b5eb7542f8..150e81090af2 100644
--- a/Documentation/devicetree/bindings/display/panel/rocktech,jh057n00900.yaml
+++ b/Documentation/devicetree/bindings/display/panel/rocktech,jh057n00900.yaml
@@ -20,6 +20,8 @@ allOf:
properties:
compatible:
enum:
+ # Anberic RG353V-V2 5.0" 640x480 TFT LCD panel
+ - anbernic,rg353v-panel-v2
# Rocktech JH057N00900 5.5" 720x1440 TFT LCD panel
- rocktech,jh057n00900
# Xingbangda XBD599 5.99" 720x1440 TFT LCD panel
--
2.34.1
^ permalink raw reply related [flat|nested] 15+ messages in thread
* [PATCH V3 2/3] drm/panel: st7703: Rename CMD_UNKNOWN_C6 to CMD_SETECO
2023-04-26 14:32 ` Chris Morgan
@ 2023-04-26 14:32 ` Chris Morgan
-1 siblings, 0 replies; 15+ messages in thread
From: Chris Morgan @ 2023-04-26 14:32 UTC (permalink / raw)
To: dri-devel
Cc: devicetree, krzysztof.kozlowski+dt, robh+dt, daniel, airlied, sam,
neil.armstrong, megous, kernel, agx, Chris Morgan
From: Chris Morgan <macromorgan@hotmail.com>
A later revision of the datasheet for the ST7703 refers to this command
as "SETECO".
Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
Reviewed-by: Guido Günther <agx@sigxcpu.org>
---
drivers/gpu/drm/panel/panel-sitronix-st7703.c | 5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/panel/panel-sitronix-st7703.c b/drivers/gpu/drm/panel/panel-sitronix-st7703.c
index 6747ca237ced..fc55b5fbb67f 100644
--- a/drivers/gpu/drm/panel/panel-sitronix-st7703.c
+++ b/drivers/gpu/drm/panel/panel-sitronix-st7703.c
@@ -41,8 +41,8 @@
#define ST7703_CMD_UNKNOWN_BF 0xBF
#define ST7703_CMD_SETSCR 0xC0
#define ST7703_CMD_SETPOWER 0xC1
+#define ST7703_CMD_SETECO 0xC6
#define ST7703_CMD_SETPANEL 0xCC
-#define ST7703_CMD_UNKNOWN_C6 0xC6
#define ST7703_CMD_SETGAMMA 0xE0
#define ST7703_CMD_SETEQ 0xE3
#define ST7703_CMD_SETGIP1 0xE9
@@ -249,8 +249,7 @@ static int xbd599_init_sequence(struct st7703 *ctx)
* ESD_DET_TIME_SEL = 0 frames
*/);
- /* Undocumented command. */
- mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_UNKNOWN_C6, 0x01, 0x00, 0xFF, 0xFF, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_SETECO, 0x01, 0x00, 0xFF, 0xFF, 0x00);
mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_SETPOWER,
0x74, /* VBTHS, VBTLS: VGH = 17V, VBL = -11V */
--
2.34.1
^ permalink raw reply related [flat|nested] 15+ messages in thread
* [PATCH V3 2/3] drm/panel: st7703: Rename CMD_UNKNOWN_C6 to CMD_SETECO
@ 2023-04-26 14:32 ` Chris Morgan
0 siblings, 0 replies; 15+ messages in thread
From: Chris Morgan @ 2023-04-26 14:32 UTC (permalink / raw)
To: dri-devel
Cc: megous, devicetree, krzysztof.kozlowski+dt, neil.armstrong, agx,
Chris Morgan, robh+dt, sam, kernel
From: Chris Morgan <macromorgan@hotmail.com>
A later revision of the datasheet for the ST7703 refers to this command
as "SETECO".
Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
Reviewed-by: Guido Günther <agx@sigxcpu.org>
---
drivers/gpu/drm/panel/panel-sitronix-st7703.c | 5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/panel/panel-sitronix-st7703.c b/drivers/gpu/drm/panel/panel-sitronix-st7703.c
index 6747ca237ced..fc55b5fbb67f 100644
--- a/drivers/gpu/drm/panel/panel-sitronix-st7703.c
+++ b/drivers/gpu/drm/panel/panel-sitronix-st7703.c
@@ -41,8 +41,8 @@
#define ST7703_CMD_UNKNOWN_BF 0xBF
#define ST7703_CMD_SETSCR 0xC0
#define ST7703_CMD_SETPOWER 0xC1
+#define ST7703_CMD_SETECO 0xC6
#define ST7703_CMD_SETPANEL 0xCC
-#define ST7703_CMD_UNKNOWN_C6 0xC6
#define ST7703_CMD_SETGAMMA 0xE0
#define ST7703_CMD_SETEQ 0xE3
#define ST7703_CMD_SETGIP1 0xE9
@@ -249,8 +249,7 @@ static int xbd599_init_sequence(struct st7703 *ctx)
* ESD_DET_TIME_SEL = 0 frames
*/);
- /* Undocumented command. */
- mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_UNKNOWN_C6, 0x01, 0x00, 0xFF, 0xFF, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_SETECO, 0x01, 0x00, 0xFF, 0xFF, 0x00);
mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_SETPOWER,
0x74, /* VBTHS, VBTLS: VGH = 17V, VBL = -11V */
--
2.34.1
^ permalink raw reply related [flat|nested] 15+ messages in thread
* [PATCH V3 3/3] drm/panel: st7703: Add Anbernic RG353V-V2 Panel Support
2023-04-26 14:32 ` Chris Morgan
@ 2023-04-26 14:32 ` Chris Morgan
-1 siblings, 0 replies; 15+ messages in thread
From: Chris Morgan @ 2023-04-26 14:32 UTC (permalink / raw)
To: dri-devel
Cc: devicetree, krzysztof.kozlowski+dt, robh+dt, daniel, airlied, sam,
neil.armstrong, megous, kernel, agx, Chris Morgan
From: Chris Morgan <macromorgan@hotmail.com>
The Anbernic RG353V-V2 is a 5 inch panel used in a new revision of the
Anbernic RG353V handheld gaming device. Add support for it.
Unfortunately it appears this controller is not able to support 120hz
or 100hz mode like the first revision panel.
Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
Reviewed-by: Guido Günther <agx@sigxcpu.org>
---
drivers/gpu/drm/panel/panel-sitronix-st7703.c | 97 +++++++++++++++++++
1 file changed, 97 insertions(+)
diff --git a/drivers/gpu/drm/panel/panel-sitronix-st7703.c b/drivers/gpu/drm/panel/panel-sitronix-st7703.c
index fc55b5fbb67f..3aa31f3d6157 100644
--- a/drivers/gpu/drm/panel/panel-sitronix-st7703.c
+++ b/drivers/gpu/drm/panel/panel-sitronix-st7703.c
@@ -28,6 +28,7 @@
/* Manufacturer specific Commands send via DSI */
#define ST7703_CMD_ALL_PIXEL_OFF 0x22
#define ST7703_CMD_ALL_PIXEL_ON 0x23
+#define ST7703_CMD_SETAPID 0xB1
#define ST7703_CMD_SETDISP 0xB2
#define ST7703_CMD_SETRGBIF 0xB3
#define ST7703_CMD_SETCYC 0xB4
@@ -42,11 +43,14 @@
#define ST7703_CMD_SETSCR 0xC0
#define ST7703_CMD_SETPOWER 0xC1
#define ST7703_CMD_SETECO 0xC6
+#define ST7703_CMD_SETIO 0xC7
+#define ST7703_CMD_SETCABC 0xC8
#define ST7703_CMD_SETPANEL 0xCC
#define ST7703_CMD_SETGAMMA 0xE0
#define ST7703_CMD_SETEQ 0xE3
#define ST7703_CMD_SETGIP1 0xE9
#define ST7703_CMD_SETGIP2 0xEA
+#define ST7703_CMD_UNKNOWN_EF 0xEF
struct st7703 {
struct device *dev;
@@ -337,6 +341,98 @@ static const struct st7703_panel_desc xbd599_desc = {
.init_sequence = xbd599_init_sequence,
};
+static int rg353v2_init_sequence(struct st7703 *ctx)
+{
+ struct mipi_dsi_device *dsi = to_mipi_dsi_device(ctx->dev);
+
+ /*
+ * Init sequence was supplied by the panel vendor.
+ */
+
+ mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_SETEXTC, 0xf1, 0x12, 0x83);
+ mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_SETAPID, 0x00, 0x00, 0x00,
+ 0xda, 0x80);
+ mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_SETDISP, 0x00, 0x13, 0x70);
+ mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_SETRGBIF, 0x10, 0x10, 0x28,
+ 0x28, 0x03, 0xff, 0x00, 0x00, 0x00, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_SETCYC, 0x80);
+ mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_SETBGP, 0x0a, 0x0a);
+ mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_SETVCOM, 0x92, 0x92);
+ mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_SETPOWER_EXT, 0x25, 0x22,
+ 0xf0, 0x63);
+ mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_SETMIPI, 0x33, 0x81, 0x05,
+ 0xf9, 0x0e, 0x0e, 0x20, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x44, 0x25, 0x00, 0x90, 0x0a,
+ 0x00, 0x00, 0x01, 0x4f, 0x01, 0x00, 0x00, 0x37);
+ mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_SETVDC, 0x47);
+ mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_UNKNOWN_BF, 0x02, 0x11, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_SETSCR, 0x73, 0x73, 0x50, 0x50,
+ 0x00, 0x00, 0x12, 0x50, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_SETPOWER, 0x53, 0xc0, 0x32,
+ 0x32, 0x77, 0xe1, 0xdd, 0xdd, 0x77, 0x77, 0x33,
+ 0x33);
+ mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_SETECO, 0x82, 0x00, 0xbf, 0xff,
+ 0x00, 0xff);
+ mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_SETIO, 0xb8, 0x00, 0x0a, 0x00,
+ 0x00, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_SETCABC, 0x10, 0x40, 0x1e,
+ 0x02);
+ mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_SETPANEL, 0x0b);
+ mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_SETGAMMA, 0x00, 0x07, 0x0d,
+ 0x37, 0x35, 0x3f, 0x41, 0x44, 0x06, 0x0c, 0x0d,
+ 0x0f, 0x11, 0x10, 0x12, 0x14, 0x1a, 0x00, 0x07,
+ 0x0d, 0x37, 0x35, 0x3f, 0x41, 0x44, 0x06, 0x0c,
+ 0x0d, 0x0f, 0x11, 0x10, 0x12, 0x14, 0x1a);
+ mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_SETEQ, 0x07, 0x07, 0x0b, 0x0b,
+ 0x0b, 0x0b, 0x00, 0x00, 0x00, 0x00, 0xff, 0x00,
+ 0xc0, 0x10);
+ mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_SETGIP1, 0xc8, 0x10, 0x02, 0x00,
+ 0x00, 0xb0, 0xb1, 0x11, 0x31, 0x23, 0x28, 0x80,
+ 0xb0, 0xb1, 0x27, 0x08, 0x00, 0x04, 0x02, 0x00,
+ 0x00, 0x00, 0x00, 0x04, 0x02, 0x00, 0x00, 0x00,
+ 0x88, 0x88, 0xba, 0x60, 0x24, 0x08, 0x88, 0x88,
+ 0x88, 0x88, 0x88, 0x88, 0x88, 0xba, 0x71, 0x35,
+ 0x18, 0x88, 0x88, 0x88, 0x88, 0x88, 0x00, 0x00,
+ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_SETGIP2, 0x97, 0x0a, 0x82, 0x02,
+ 0x03, 0x07, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x81, 0x88, 0xba, 0x17, 0x53, 0x88, 0x88, 0x88,
+ 0x88, 0x88, 0x88, 0x80, 0x88, 0xba, 0x06, 0x42,
+ 0x88, 0x88, 0x88, 0x88, 0x88, 0x88, 0x23, 0x00,
+ 0x00, 0x02, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00);
+ mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_UNKNOWN_EF, 0xff, 0xff, 0x01);
+
+ return 0;
+}
+
+static const struct drm_display_mode rg353v2_mode = {
+ .hdisplay = 640,
+ .hsync_start = 640 + 40,
+ .hsync_end = 640 + 40 + 2,
+ .htotal = 640 + 40 + 2 + 80,
+ .vdisplay = 480,
+ .vsync_start = 480 + 18,
+ .vsync_end = 480 + 18 + 2,
+ .vtotal = 480 + 18 + 2 + 28,
+ .clock = 24150,
+ .flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC,
+ .width_mm = 70,
+ .height_mm = 57,
+};
+
+static const struct st7703_panel_desc rg353v2_desc = {
+ .mode = &rg353v2_mode,
+ .lanes = 4,
+ .mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST |
+ MIPI_DSI_MODE_NO_EOT_PACKET | MIPI_DSI_MODE_LPM,
+ .format = MIPI_DSI_FMT_RGB888,
+ .init_sequence = rg353v2_init_sequence,
+};
+
static int st7703_enable(struct drm_panel *panel)
{
struct st7703 *ctx = panel_to_st7703(panel);
@@ -597,6 +693,7 @@ static void st7703_remove(struct mipi_dsi_device *dsi)
}
static const struct of_device_id st7703_of_match[] = {
+ { .compatible = "anbernic,rg353v-panel-v2", .data = &rg353v2_desc },
{ .compatible = "rocktech,jh057n00900", .data = &jh057n00900_panel_desc },
{ .compatible = "xingbangda,xbd599", .data = &xbd599_desc },
{ /* sentinel */ }
--
2.34.1
^ permalink raw reply related [flat|nested] 15+ messages in thread
* [PATCH V3 3/3] drm/panel: st7703: Add Anbernic RG353V-V2 Panel Support
@ 2023-04-26 14:32 ` Chris Morgan
0 siblings, 0 replies; 15+ messages in thread
From: Chris Morgan @ 2023-04-26 14:32 UTC (permalink / raw)
To: dri-devel
Cc: megous, devicetree, krzysztof.kozlowski+dt, neil.armstrong, agx,
Chris Morgan, robh+dt, sam, kernel
From: Chris Morgan <macromorgan@hotmail.com>
The Anbernic RG353V-V2 is a 5 inch panel used in a new revision of the
Anbernic RG353V handheld gaming device. Add support for it.
Unfortunately it appears this controller is not able to support 120hz
or 100hz mode like the first revision panel.
Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
Reviewed-by: Guido Günther <agx@sigxcpu.org>
---
drivers/gpu/drm/panel/panel-sitronix-st7703.c | 97 +++++++++++++++++++
1 file changed, 97 insertions(+)
diff --git a/drivers/gpu/drm/panel/panel-sitronix-st7703.c b/drivers/gpu/drm/panel/panel-sitronix-st7703.c
index fc55b5fbb67f..3aa31f3d6157 100644
--- a/drivers/gpu/drm/panel/panel-sitronix-st7703.c
+++ b/drivers/gpu/drm/panel/panel-sitronix-st7703.c
@@ -28,6 +28,7 @@
/* Manufacturer specific Commands send via DSI */
#define ST7703_CMD_ALL_PIXEL_OFF 0x22
#define ST7703_CMD_ALL_PIXEL_ON 0x23
+#define ST7703_CMD_SETAPID 0xB1
#define ST7703_CMD_SETDISP 0xB2
#define ST7703_CMD_SETRGBIF 0xB3
#define ST7703_CMD_SETCYC 0xB4
@@ -42,11 +43,14 @@
#define ST7703_CMD_SETSCR 0xC0
#define ST7703_CMD_SETPOWER 0xC1
#define ST7703_CMD_SETECO 0xC6
+#define ST7703_CMD_SETIO 0xC7
+#define ST7703_CMD_SETCABC 0xC8
#define ST7703_CMD_SETPANEL 0xCC
#define ST7703_CMD_SETGAMMA 0xE0
#define ST7703_CMD_SETEQ 0xE3
#define ST7703_CMD_SETGIP1 0xE9
#define ST7703_CMD_SETGIP2 0xEA
+#define ST7703_CMD_UNKNOWN_EF 0xEF
struct st7703 {
struct device *dev;
@@ -337,6 +341,98 @@ static const struct st7703_panel_desc xbd599_desc = {
.init_sequence = xbd599_init_sequence,
};
+static int rg353v2_init_sequence(struct st7703 *ctx)
+{
+ struct mipi_dsi_device *dsi = to_mipi_dsi_device(ctx->dev);
+
+ /*
+ * Init sequence was supplied by the panel vendor.
+ */
+
+ mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_SETEXTC, 0xf1, 0x12, 0x83);
+ mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_SETAPID, 0x00, 0x00, 0x00,
+ 0xda, 0x80);
+ mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_SETDISP, 0x00, 0x13, 0x70);
+ mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_SETRGBIF, 0x10, 0x10, 0x28,
+ 0x28, 0x03, 0xff, 0x00, 0x00, 0x00, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_SETCYC, 0x80);
+ mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_SETBGP, 0x0a, 0x0a);
+ mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_SETVCOM, 0x92, 0x92);
+ mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_SETPOWER_EXT, 0x25, 0x22,
+ 0xf0, 0x63);
+ mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_SETMIPI, 0x33, 0x81, 0x05,
+ 0xf9, 0x0e, 0x0e, 0x20, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x44, 0x25, 0x00, 0x90, 0x0a,
+ 0x00, 0x00, 0x01, 0x4f, 0x01, 0x00, 0x00, 0x37);
+ mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_SETVDC, 0x47);
+ mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_UNKNOWN_BF, 0x02, 0x11, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_SETSCR, 0x73, 0x73, 0x50, 0x50,
+ 0x00, 0x00, 0x12, 0x50, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_SETPOWER, 0x53, 0xc0, 0x32,
+ 0x32, 0x77, 0xe1, 0xdd, 0xdd, 0x77, 0x77, 0x33,
+ 0x33);
+ mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_SETECO, 0x82, 0x00, 0xbf, 0xff,
+ 0x00, 0xff);
+ mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_SETIO, 0xb8, 0x00, 0x0a, 0x00,
+ 0x00, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_SETCABC, 0x10, 0x40, 0x1e,
+ 0x02);
+ mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_SETPANEL, 0x0b);
+ mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_SETGAMMA, 0x00, 0x07, 0x0d,
+ 0x37, 0x35, 0x3f, 0x41, 0x44, 0x06, 0x0c, 0x0d,
+ 0x0f, 0x11, 0x10, 0x12, 0x14, 0x1a, 0x00, 0x07,
+ 0x0d, 0x37, 0x35, 0x3f, 0x41, 0x44, 0x06, 0x0c,
+ 0x0d, 0x0f, 0x11, 0x10, 0x12, 0x14, 0x1a);
+ mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_SETEQ, 0x07, 0x07, 0x0b, 0x0b,
+ 0x0b, 0x0b, 0x00, 0x00, 0x00, 0x00, 0xff, 0x00,
+ 0xc0, 0x10);
+ mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_SETGIP1, 0xc8, 0x10, 0x02, 0x00,
+ 0x00, 0xb0, 0xb1, 0x11, 0x31, 0x23, 0x28, 0x80,
+ 0xb0, 0xb1, 0x27, 0x08, 0x00, 0x04, 0x02, 0x00,
+ 0x00, 0x00, 0x00, 0x04, 0x02, 0x00, 0x00, 0x00,
+ 0x88, 0x88, 0xba, 0x60, 0x24, 0x08, 0x88, 0x88,
+ 0x88, 0x88, 0x88, 0x88, 0x88, 0xba, 0x71, 0x35,
+ 0x18, 0x88, 0x88, 0x88, 0x88, 0x88, 0x00, 0x00,
+ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_SETGIP2, 0x97, 0x0a, 0x82, 0x02,
+ 0x03, 0x07, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x81, 0x88, 0xba, 0x17, 0x53, 0x88, 0x88, 0x88,
+ 0x88, 0x88, 0x88, 0x80, 0x88, 0xba, 0x06, 0x42,
+ 0x88, 0x88, 0x88, 0x88, 0x88, 0x88, 0x23, 0x00,
+ 0x00, 0x02, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00);
+ mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_UNKNOWN_EF, 0xff, 0xff, 0x01);
+
+ return 0;
+}
+
+static const struct drm_display_mode rg353v2_mode = {
+ .hdisplay = 640,
+ .hsync_start = 640 + 40,
+ .hsync_end = 640 + 40 + 2,
+ .htotal = 640 + 40 + 2 + 80,
+ .vdisplay = 480,
+ .vsync_start = 480 + 18,
+ .vsync_end = 480 + 18 + 2,
+ .vtotal = 480 + 18 + 2 + 28,
+ .clock = 24150,
+ .flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC,
+ .width_mm = 70,
+ .height_mm = 57,
+};
+
+static const struct st7703_panel_desc rg353v2_desc = {
+ .mode = &rg353v2_mode,
+ .lanes = 4,
+ .mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST |
+ MIPI_DSI_MODE_NO_EOT_PACKET | MIPI_DSI_MODE_LPM,
+ .format = MIPI_DSI_FMT_RGB888,
+ .init_sequence = rg353v2_init_sequence,
+};
+
static int st7703_enable(struct drm_panel *panel)
{
struct st7703 *ctx = panel_to_st7703(panel);
@@ -597,6 +693,7 @@ static void st7703_remove(struct mipi_dsi_device *dsi)
}
static const struct of_device_id st7703_of_match[] = {
+ { .compatible = "anbernic,rg353v-panel-v2", .data = &rg353v2_desc },
{ .compatible = "rocktech,jh057n00900", .data = &jh057n00900_panel_desc },
{ .compatible = "xingbangda,xbd599", .data = &xbd599_desc },
{ /* sentinel */ }
--
2.34.1
^ permalink raw reply related [flat|nested] 15+ messages in thread
* Re: [PATCH V3 1/3] dt-bindings: panel: Add Anbernic RG353V-V2 panel compatible
2023-04-26 14:32 ` Chris Morgan
(?)
@ 2023-04-26 14:54 ` Guido Günther
2023-06-06 6:12 ` Frank Oltmanns
-1 siblings, 1 reply; 15+ messages in thread
From: Guido Günther @ 2023-04-26 14:54 UTC (permalink / raw)
To: Chris Morgan; +Cc: sam, Frank Oltmanns, dri-devel
Hi Chris,
could you check if these two modifications by Frank of the init sequence
https://lore.kernel.org/dri-devel/20230211171748.36692-2-frank@oltmanns.dev/
https://lore.kernel.org/dri-devel/20230213123238.76889-2-frank@oltmanns.dev/
work for your panel too?
Cheers,
-- Guido
On Wed, Apr 26, 2023 at 09:32:11AM -0500, Chris Morgan wrote:
> From: Chris Morgan <macromorgan@hotmail.com>
>
> The Anbernic RG353V-V2 panel is a 3.5 inch 640x480 MIPI-DSI LCD panel.
> It's based on the ST7703 LCD controller just like rocktech,jh057n00900.
> It's used in a 2nd revision of the Anbernic RG353V handheld gaming
> device. Like the first revision of the RG353V the control chip is known
> but the panel itself is unknown, so name it for the device.
>
> Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
> Acked-by: Guido Günther <agx@sigxcpu.org>
> ---
> .../devicetree/bindings/display/panel/rocktech,jh057n00900.yaml | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/display/panel/rocktech,jh057n00900.yaml b/Documentation/devicetree/bindings/display/panel/rocktech,jh057n00900.yaml
> index 09b5eb7542f8..150e81090af2 100644
> --- a/Documentation/devicetree/bindings/display/panel/rocktech,jh057n00900.yaml
> +++ b/Documentation/devicetree/bindings/display/panel/rocktech,jh057n00900.yaml
> @@ -20,6 +20,8 @@ allOf:
> properties:
> compatible:
> enum:
> + # Anberic RG353V-V2 5.0" 640x480 TFT LCD panel
> + - anbernic,rg353v-panel-v2
> # Rocktech JH057N00900 5.5" 720x1440 TFT LCD panel
> - rocktech,jh057n00900
> # Xingbangda XBD599 5.99" 720x1440 TFT LCD panel
> --
> 2.34.1
>
On Wed, Apr 26, 2023 at 09:32:12AM -0500, Chris Morgan wrote:
> From: Chris Morgan <macromorgan@hotmail.com>
>
> A later revision of the datasheet for the ST7703 refers to this command
> as "SETECO".
>
> Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
> Reviewed-by: Guido Günther <agx@sigxcpu.org>
> ---
> drivers/gpu/drm/panel/panel-sitronix-st7703.c | 5 ++---
> 1 file changed, 2 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/panel/panel-sitronix-st7703.c b/drivers/gpu/drm/panel/panel-sitronix-st7703.c
> index 6747ca237ced..fc55b5fbb67f 100644
> --- a/drivers/gpu/drm/panel/panel-sitronix-st7703.c
> +++ b/drivers/gpu/drm/panel/panel-sitronix-st7703.c
> @@ -41,8 +41,8 @@
> #define ST7703_CMD_UNKNOWN_BF 0xBF
> #define ST7703_CMD_SETSCR 0xC0
> #define ST7703_CMD_SETPOWER 0xC1
> +#define ST7703_CMD_SETECO 0xC6
> #define ST7703_CMD_SETPANEL 0xCC
> -#define ST7703_CMD_UNKNOWN_C6 0xC6
> #define ST7703_CMD_SETGAMMA 0xE0
> #define ST7703_CMD_SETEQ 0xE3
> #define ST7703_CMD_SETGIP1 0xE9
> @@ -249,8 +249,7 @@ static int xbd599_init_sequence(struct st7703 *ctx)
> * ESD_DET_TIME_SEL = 0 frames
> */);
>
> - /* Undocumented command. */
> - mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_UNKNOWN_C6, 0x01, 0x00, 0xFF, 0xFF, 0x00);
> + mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_SETECO, 0x01, 0x00, 0xFF, 0xFF, 0x00);
>
> mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_SETPOWER,
> 0x74, /* VBTHS, VBTLS: VGH = 17V, VBL = -11V */
> --
> 2.34.1
>
On Wed, Apr 26, 2023 at 09:32:13AM -0500, Chris Morgan wrote:
> From: Chris Morgan <macromorgan@hotmail.com>
>
> The Anbernic RG353V-V2 is a 5 inch panel used in a new revision of the
> Anbernic RG353V handheld gaming device. Add support for it.
>
> Unfortunately it appears this controller is not able to support 120hz
> or 100hz mode like the first revision panel.
>
> Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
> Reviewed-by: Guido Günther <agx@sigxcpu.org>
> ---
> drivers/gpu/drm/panel/panel-sitronix-st7703.c | 97 +++++++++++++++++++
> 1 file changed, 97 insertions(+)
>
> diff --git a/drivers/gpu/drm/panel/panel-sitronix-st7703.c b/drivers/gpu/drm/panel/panel-sitronix-st7703.c
> index fc55b5fbb67f..3aa31f3d6157 100644
> --- a/drivers/gpu/drm/panel/panel-sitronix-st7703.c
> +++ b/drivers/gpu/drm/panel/panel-sitronix-st7703.c
> @@ -28,6 +28,7 @@
> /* Manufacturer specific Commands send via DSI */
> #define ST7703_CMD_ALL_PIXEL_OFF 0x22
> #define ST7703_CMD_ALL_PIXEL_ON 0x23
> +#define ST7703_CMD_SETAPID 0xB1
> #define ST7703_CMD_SETDISP 0xB2
> #define ST7703_CMD_SETRGBIF 0xB3
> #define ST7703_CMD_SETCYC 0xB4
> @@ -42,11 +43,14 @@
> #define ST7703_CMD_SETSCR 0xC0
> #define ST7703_CMD_SETPOWER 0xC1
> #define ST7703_CMD_SETECO 0xC6
> +#define ST7703_CMD_SETIO 0xC7
> +#define ST7703_CMD_SETCABC 0xC8
> #define ST7703_CMD_SETPANEL 0xCC
> #define ST7703_CMD_SETGAMMA 0xE0
> #define ST7703_CMD_SETEQ 0xE3
> #define ST7703_CMD_SETGIP1 0xE9
> #define ST7703_CMD_SETGIP2 0xEA
> +#define ST7703_CMD_UNKNOWN_EF 0xEF
>
> struct st7703 {
> struct device *dev;
> @@ -337,6 +341,98 @@ static const struct st7703_panel_desc xbd599_desc = {
> .init_sequence = xbd599_init_sequence,
> };
>
> +static int rg353v2_init_sequence(struct st7703 *ctx)
> +{
> + struct mipi_dsi_device *dsi = to_mipi_dsi_device(ctx->dev);
> +
> + /*
> + * Init sequence was supplied by the panel vendor.
> + */
> +
> + mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_SETEXTC, 0xf1, 0x12, 0x83);
> + mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_SETAPID, 0x00, 0x00, 0x00,
> + 0xda, 0x80);
> + mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_SETDISP, 0x00, 0x13, 0x70);
> + mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_SETRGBIF, 0x10, 0x10, 0x28,
> + 0x28, 0x03, 0xff, 0x00, 0x00, 0x00, 0x00);
> + mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_SETCYC, 0x80);
> + mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_SETBGP, 0x0a, 0x0a);
> + mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_SETVCOM, 0x92, 0x92);
> + mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_SETPOWER_EXT, 0x25, 0x22,
> + 0xf0, 0x63);
> + mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_SETMIPI, 0x33, 0x81, 0x05,
> + 0xf9, 0x0e, 0x0e, 0x20, 0x00, 0x00, 0x00, 0x00,
> + 0x00, 0x00, 0x00, 0x44, 0x25, 0x00, 0x90, 0x0a,
> + 0x00, 0x00, 0x01, 0x4f, 0x01, 0x00, 0x00, 0x37);
> + mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_SETVDC, 0x47);
> + mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_UNKNOWN_BF, 0x02, 0x11, 0x00);
> + mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_SETSCR, 0x73, 0x73, 0x50, 0x50,
> + 0x00, 0x00, 0x12, 0x50, 0x00);
> + mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_SETPOWER, 0x53, 0xc0, 0x32,
> + 0x32, 0x77, 0xe1, 0xdd, 0xdd, 0x77, 0x77, 0x33,
> + 0x33);
> + mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_SETECO, 0x82, 0x00, 0xbf, 0xff,
> + 0x00, 0xff);
> + mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_SETIO, 0xb8, 0x00, 0x0a, 0x00,
> + 0x00, 0x00);
> + mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_SETCABC, 0x10, 0x40, 0x1e,
> + 0x02);
> + mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_SETPANEL, 0x0b);
> + mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_SETGAMMA, 0x00, 0x07, 0x0d,
> + 0x37, 0x35, 0x3f, 0x41, 0x44, 0x06, 0x0c, 0x0d,
> + 0x0f, 0x11, 0x10, 0x12, 0x14, 0x1a, 0x00, 0x07,
> + 0x0d, 0x37, 0x35, 0x3f, 0x41, 0x44, 0x06, 0x0c,
> + 0x0d, 0x0f, 0x11, 0x10, 0x12, 0x14, 0x1a);
> + mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_SETEQ, 0x07, 0x07, 0x0b, 0x0b,
> + 0x0b, 0x0b, 0x00, 0x00, 0x00, 0x00, 0xff, 0x00,
> + 0xc0, 0x10);
> + mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_SETGIP1, 0xc8, 0x10, 0x02, 0x00,
> + 0x00, 0xb0, 0xb1, 0x11, 0x31, 0x23, 0x28, 0x80,
> + 0xb0, 0xb1, 0x27, 0x08, 0x00, 0x04, 0x02, 0x00,
> + 0x00, 0x00, 0x00, 0x04, 0x02, 0x00, 0x00, 0x00,
> + 0x88, 0x88, 0xba, 0x60, 0x24, 0x08, 0x88, 0x88,
> + 0x88, 0x88, 0x88, 0x88, 0x88, 0xba, 0x71, 0x35,
> + 0x18, 0x88, 0x88, 0x88, 0x88, 0x88, 0x00, 0x00,
> + 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> + 0x00, 0x00, 0x00);
> + mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_SETGIP2, 0x97, 0x0a, 0x82, 0x02,
> + 0x03, 0x07, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> + 0x81, 0x88, 0xba, 0x17, 0x53, 0x88, 0x88, 0x88,
> + 0x88, 0x88, 0x88, 0x80, 0x88, 0xba, 0x06, 0x42,
> + 0x88, 0x88, 0x88, 0x88, 0x88, 0x88, 0x23, 0x00,
> + 0x00, 0x02, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00,
> + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> + 0x00);
> + mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_UNKNOWN_EF, 0xff, 0xff, 0x01);
> +
> + return 0;
> +}
> +
> +static const struct drm_display_mode rg353v2_mode = {
> + .hdisplay = 640,
> + .hsync_start = 640 + 40,
> + .hsync_end = 640 + 40 + 2,
> + .htotal = 640 + 40 + 2 + 80,
> + .vdisplay = 480,
> + .vsync_start = 480 + 18,
> + .vsync_end = 480 + 18 + 2,
> + .vtotal = 480 + 18 + 2 + 28,
> + .clock = 24150,
> + .flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC,
> + .width_mm = 70,
> + .height_mm = 57,
> +};
> +
> +static const struct st7703_panel_desc rg353v2_desc = {
> + .mode = &rg353v2_mode,
> + .lanes = 4,
> + .mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST |
> + MIPI_DSI_MODE_NO_EOT_PACKET | MIPI_DSI_MODE_LPM,
> + .format = MIPI_DSI_FMT_RGB888,
> + .init_sequence = rg353v2_init_sequence,
> +};
> +
> static int st7703_enable(struct drm_panel *panel)
> {
> struct st7703 *ctx = panel_to_st7703(panel);
> @@ -597,6 +693,7 @@ static void st7703_remove(struct mipi_dsi_device *dsi)
> }
>
> static const struct of_device_id st7703_of_match[] = {
> + { .compatible = "anbernic,rg353v-panel-v2", .data = &rg353v2_desc },
> { .compatible = "rocktech,jh057n00900", .data = &jh057n00900_panel_desc },
> { .compatible = "xingbangda,xbd599", .data = &xbd599_desc },
> { /* sentinel */ }
> --
> 2.34.1
>
^ permalink raw reply [flat|nested] 15+ messages in thread
* Re: [PATCH V3 0/3] drm/panel: Add Anbernic RG353V-V2 Panel
2023-04-26 14:32 ` Chris Morgan
@ 2023-04-27 11:47 ` Neil Armstrong
-1 siblings, 0 replies; 15+ messages in thread
From: Neil Armstrong @ 2023-04-27 11:47 UTC (permalink / raw)
To: dri-devel, Chris Morgan
Cc: devicetree, krzysztof.kozlowski+dt, robh+dt, daniel, airlied, sam,
megous, kernel, agx, Chris Morgan
Hi,
On Wed, 26 Apr 2023 09:32:10 -0500, Chris Morgan wrote:
> From: Chris Morgan <macromorgan@hotmail.com>
>
> Add the NewVision NV3051D panel as found on the second revision of the
> RG353V. The underlying LCD panel itself is unknown (ST7703 is the
> controller IC).
>
> Changes from V2:
> - Rebased patch series (to address removal of dsi_dcs_write_seq custom
> macro).
>
> [...]
Thanks, Applied to https://anongit.freedesktop.org/git/drm/drm-misc.git (drm-misc-next-fixes)
[1/3] dt-bindings: panel: Add Anbernic RG353V-V2 panel compatible
https://cgit.freedesktop.org/drm/drm-misc/commit/?id=e41fef1e43ae86aecc466e8c9e449d7bf71596a7
[2/3] drm/panel: st7703: Rename CMD_UNKNOWN_C6 to CMD_SETECO
https://cgit.freedesktop.org/drm/drm-misc/commit/?id=e0310564a7e31d7359a6831226aa9b559c6728a0
[3/3] drm/panel: st7703: Add Anbernic RG353V-V2 Panel Support
https://cgit.freedesktop.org/drm/drm-misc/commit/?id=0ed9208cb120086f1b600199c548f00544406fa5
--
Neil
^ permalink raw reply [flat|nested] 15+ messages in thread
* Re: [PATCH V3 0/3] drm/panel: Add Anbernic RG353V-V2 Panel
@ 2023-04-27 11:47 ` Neil Armstrong
0 siblings, 0 replies; 15+ messages in thread
From: Neil Armstrong @ 2023-04-27 11:47 UTC (permalink / raw)
To: dri-devel, Chris Morgan
Cc: megous, devicetree, krzysztof.kozlowski+dt, agx, Chris Morgan,
robh+dt, sam, kernel
Hi,
On Wed, 26 Apr 2023 09:32:10 -0500, Chris Morgan wrote:
> From: Chris Morgan <macromorgan@hotmail.com>
>
> Add the NewVision NV3051D panel as found on the second revision of the
> RG353V. The underlying LCD panel itself is unknown (ST7703 is the
> controller IC).
>
> Changes from V2:
> - Rebased patch series (to address removal of dsi_dcs_write_seq custom
> macro).
>
> [...]
Thanks, Applied to https://anongit.freedesktop.org/git/drm/drm-misc.git (drm-misc-next-fixes)
[1/3] dt-bindings: panel: Add Anbernic RG353V-V2 panel compatible
https://cgit.freedesktop.org/drm/drm-misc/commit/?id=e41fef1e43ae86aecc466e8c9e449d7bf71596a7
[2/3] drm/panel: st7703: Rename CMD_UNKNOWN_C6 to CMD_SETECO
https://cgit.freedesktop.org/drm/drm-misc/commit/?id=e0310564a7e31d7359a6831226aa9b559c6728a0
[3/3] drm/panel: st7703: Add Anbernic RG353V-V2 Panel Support
https://cgit.freedesktop.org/drm/drm-misc/commit/?id=0ed9208cb120086f1b600199c548f00544406fa5
--
Neil
^ permalink raw reply [flat|nested] 15+ messages in thread
* Re: [PATCH V3 0/3] drm/panel: Add Anbernic RG353V-V2 Panel
2023-04-27 11:47 ` Neil Armstrong
@ 2023-04-27 11:49 ` Neil Armstrong
-1 siblings, 0 replies; 15+ messages in thread
From: Neil Armstrong @ 2023-04-27 11:49 UTC (permalink / raw)
To: dri-devel, Chris Morgan
Cc: devicetree, krzysztof.kozlowski+dt, robh+dt, daniel, airlied, sam,
megous, kernel, agx, Chris Morgan
On 27/04/2023 13:47, Neil Armstrong wrote:
> Hi,
>
> On Wed, 26 Apr 2023 09:32:10 -0500, Chris Morgan wrote:
>> From: Chris Morgan <macromorgan@hotmail.com>
>>
>> Add the NewVision NV3051D panel as found on the second revision of the
>> RG353V. The underlying LCD panel itself is unknown (ST7703 is the
>> controller IC).
>>
>> Changes from V2:
>> - Rebased patch series (to address removal of dsi_dcs_write_seq custom
>> macro).
>>
>> [...]
>
> Thanks, Applied to https://anongit.freedesktop.org/git/drm/drm-misc.git (drm-misc-next-fixes)
Ok, again b4 picks the wrong branch name, it's drm-misc-next here.
Neil
>
> [1/3] dt-bindings: panel: Add Anbernic RG353V-V2 panel compatible
> https://cgit.freedesktop.org/drm/drm-misc/commit/?id=e41fef1e43ae86aecc466e8c9e449d7bf71596a7
> [2/3] drm/panel: st7703: Rename CMD_UNKNOWN_C6 to CMD_SETECO
> https://cgit.freedesktop.org/drm/drm-misc/commit/?id=e0310564a7e31d7359a6831226aa9b559c6728a0
> [3/3] drm/panel: st7703: Add Anbernic RG353V-V2 Panel Support
> https://cgit.freedesktop.org/drm/drm-misc/commit/?id=0ed9208cb120086f1b600199c548f00544406fa5
>
^ permalink raw reply [flat|nested] 15+ messages in thread
* Re: [PATCH V3 0/3] drm/panel: Add Anbernic RG353V-V2 Panel
@ 2023-04-27 11:49 ` Neil Armstrong
0 siblings, 0 replies; 15+ messages in thread
From: Neil Armstrong @ 2023-04-27 11:49 UTC (permalink / raw)
To: dri-devel, Chris Morgan
Cc: megous, devicetree, krzysztof.kozlowski+dt, agx, Chris Morgan,
robh+dt, sam, kernel
On 27/04/2023 13:47, Neil Armstrong wrote:
> Hi,
>
> On Wed, 26 Apr 2023 09:32:10 -0500, Chris Morgan wrote:
>> From: Chris Morgan <macromorgan@hotmail.com>
>>
>> Add the NewVision NV3051D panel as found on the second revision of the
>> RG353V. The underlying LCD panel itself is unknown (ST7703 is the
>> controller IC).
>>
>> Changes from V2:
>> - Rebased patch series (to address removal of dsi_dcs_write_seq custom
>> macro).
>>
>> [...]
>
> Thanks, Applied to https://anongit.freedesktop.org/git/drm/drm-misc.git (drm-misc-next-fixes)
Ok, again b4 picks the wrong branch name, it's drm-misc-next here.
Neil
>
> [1/3] dt-bindings: panel: Add Anbernic RG353V-V2 panel compatible
> https://cgit.freedesktop.org/drm/drm-misc/commit/?id=e41fef1e43ae86aecc466e8c9e449d7bf71596a7
> [2/3] drm/panel: st7703: Rename CMD_UNKNOWN_C6 to CMD_SETECO
> https://cgit.freedesktop.org/drm/drm-misc/commit/?id=e0310564a7e31d7359a6831226aa9b559c6728a0
> [3/3] drm/panel: st7703: Add Anbernic RG353V-V2 Panel Support
> https://cgit.freedesktop.org/drm/drm-misc/commit/?id=0ed9208cb120086f1b600199c548f00544406fa5
>
^ permalink raw reply [flat|nested] 15+ messages in thread
* Re: [PATCH V3 1/3] dt-bindings: panel: Add Anbernic RG353V-V2 panel compatible
2023-04-26 14:54 ` Guido Günther
@ 2023-06-06 6:12 ` Frank Oltmanns
2023-08-06 12:41 ` Frank Oltmanns
0 siblings, 1 reply; 15+ messages in thread
From: Frank Oltmanns @ 2023-06-06 6:12 UTC (permalink / raw)
To: Guido Günther; +Cc: neil.armstrong, sam, dri-devel, Chris Morgan
Hi Chris,
hi Guido,
On 2023-04-26 at 16:54:46 +0200, Guido Günther <guido.gunther@puri.sm> wrote:
> Hi Chris,
> could you check if these two modifications by Frank of the init sequence
>
> https://lore.kernel.org/dri-devel/20230211171748.36692-2-frank@oltmanns.dev/
> https://lore.kernel.org/dri-devel/20230213123238.76889-2-frank@oltmanns.dev/
>
> work for your panel too?
I saw that Chris' patchset got accepted into drm-next, and I'm glad that
more panels will therefore work out of the box. But: Did anyone check if
the modifications I submitted in February and that Guido referenced
above work with the new panel?
Thanks,
Frank
> Cheers,
> -- Guido
>
> On Wed, Apr 26, 2023 at 09:32:11AM -0500, Chris Morgan wrote:
>> From: Chris Morgan <macromorgan@hotmail.com>
>>
>> The Anbernic RG353V-V2 panel is a 3.5 inch 640x480 MIPI-DSI LCD panel.
>> It's based on the ST7703 LCD controller just like rocktech,jh057n00900.
>> It's used in a 2nd revision of the Anbernic RG353V handheld gaming
>> device. Like the first revision of the RG353V the control chip is known
>> but the panel itself is unknown, so name it for the device.
>>
>> Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
>> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
>> Acked-by: Guido Günther <agx@sigxcpu.org>
>> ---
>> .../devicetree/bindings/display/panel/rocktech,jh057n00900.yaml | 2 ++
>> 1 file changed, 2 insertions(+)
>>
>> diff --git a/Documentation/devicetree/bindings/display/panel/rocktech,jh057n00900.yaml b/Documentation/devicetree/bindings/display/panel/rocktech,jh057n00900.yaml
>> index 09b5eb7542f8..150e81090af2 100644
>> --- a/Documentation/devicetree/bindings/display/panel/rocktech,jh057n00900.yaml
>> +++ b/Documentation/devicetree/bindings/display/panel/rocktech,jh057n00900.yaml
>> @@ -20,6 +20,8 @@ allOf:
>> properties:
>> compatible:
>> enum:
>> + # Anberic RG353V-V2 5.0" 640x480 TFT LCD panel
>> + - anbernic,rg353v-panel-v2
>> # Rocktech JH057N00900 5.5" 720x1440 TFT LCD panel
>> - rocktech,jh057n00900
>> # Xingbangda XBD599 5.99" 720x1440 TFT LCD panel
>> --
>> 2.34.1
>>
>
> On Wed, Apr 26, 2023 at 09:32:12AM -0500, Chris Morgan wrote:
>> From: Chris Morgan <macromorgan@hotmail.com>
>>
>> A later revision of the datasheet for the ST7703 refers to this command
>> as "SETECO".
>>
>> Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
>> Reviewed-by: Guido Günther <agx@sigxcpu.org>
>> ---
>> drivers/gpu/drm/panel/panel-sitronix-st7703.c | 5 ++---
>> 1 file changed, 2 insertions(+), 3 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/panel/panel-sitronix-st7703.c b/drivers/gpu/drm/panel/panel-sitronix-st7703.c
>> index 6747ca237ced..fc55b5fbb67f 100644
>> --- a/drivers/gpu/drm/panel/panel-sitronix-st7703.c
>> +++ b/drivers/gpu/drm/panel/panel-sitronix-st7703.c
>> @@ -41,8 +41,8 @@
>> #define ST7703_CMD_UNKNOWN_BF 0xBF
>> #define ST7703_CMD_SETSCR 0xC0
>> #define ST7703_CMD_SETPOWER 0xC1
>> +#define ST7703_CMD_SETECO 0xC6
>> #define ST7703_CMD_SETPANEL 0xCC
>> -#define ST7703_CMD_UNKNOWN_C6 0xC6
>> #define ST7703_CMD_SETGAMMA 0xE0
>> #define ST7703_CMD_SETEQ 0xE3
>> #define ST7703_CMD_SETGIP1 0xE9
>> @@ -249,8 +249,7 @@ static int xbd599_init_sequence(struct st7703 *ctx)
>> * ESD_DET_TIME_SEL = 0 frames
>> */);
>>
>> - /* Undocumented command. */
>> - mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_UNKNOWN_C6, 0x01, 0x00, 0xFF, 0xFF, 0x00);
>> + mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_SETECO, 0x01, 0x00, 0xFF, 0xFF, 0x00);
>>
>> mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_SETPOWER,
>> 0x74, /* VBTHS, VBTLS: VGH = 17V, VBL = -11V */
>> --
>> 2.34.1
>>
>
> On Wed, Apr 26, 2023 at 09:32:13AM -0500, Chris Morgan wrote:
>> From: Chris Morgan <macromorgan@hotmail.com>
>>
>> The Anbernic RG353V-V2 is a 5 inch panel used in a new revision of the
>> Anbernic RG353V handheld gaming device. Add support for it.
>>
>> Unfortunately it appears this controller is not able to support 120hz
>> or 100hz mode like the first revision panel.
>>
>> Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
>> Reviewed-by: Guido Günther <agx@sigxcpu.org>
>> ---
>> drivers/gpu/drm/panel/panel-sitronix-st7703.c | 97 +++++++++++++++++++
>> 1 file changed, 97 insertions(+)
>>
>> diff --git a/drivers/gpu/drm/panel/panel-sitronix-st7703.c b/drivers/gpu/drm/panel/panel-sitronix-st7703.c
>> index fc55b5fbb67f..3aa31f3d6157 100644
>> --- a/drivers/gpu/drm/panel/panel-sitronix-st7703.c
>> +++ b/drivers/gpu/drm/panel/panel-sitronix-st7703.c
>> @@ -28,6 +28,7 @@
>> /* Manufacturer specific Commands send via DSI */
>> #define ST7703_CMD_ALL_PIXEL_OFF 0x22
>> #define ST7703_CMD_ALL_PIXEL_ON 0x23
>> +#define ST7703_CMD_SETAPID 0xB1
>> #define ST7703_CMD_SETDISP 0xB2
>> #define ST7703_CMD_SETRGBIF 0xB3
>> #define ST7703_CMD_SETCYC 0xB4
>> @@ -42,11 +43,14 @@
>> #define ST7703_CMD_SETSCR 0xC0
>> #define ST7703_CMD_SETPOWER 0xC1
>> #define ST7703_CMD_SETECO 0xC6
>> +#define ST7703_CMD_SETIO 0xC7
>> +#define ST7703_CMD_SETCABC 0xC8
>> #define ST7703_CMD_SETPANEL 0xCC
>> #define ST7703_CMD_SETGAMMA 0xE0
>> #define ST7703_CMD_SETEQ 0xE3
>> #define ST7703_CMD_SETGIP1 0xE9
>> #define ST7703_CMD_SETGIP2 0xEA
>> +#define ST7703_CMD_UNKNOWN_EF 0xEF
>>
>> struct st7703 {
>> struct device *dev;
>> @@ -337,6 +341,98 @@ static const struct st7703_panel_desc xbd599_desc = {
>> .init_sequence = xbd599_init_sequence,
>> };
>>
>> +static int rg353v2_init_sequence(struct st7703 *ctx)
>> +{
>> + struct mipi_dsi_device *dsi = to_mipi_dsi_device(ctx->dev);
>> +
>> + /*
>> + * Init sequence was supplied by the panel vendor.
>> + */
>> +
>> + mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_SETEXTC, 0xf1, 0x12, 0x83);
>> + mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_SETAPID, 0x00, 0x00, 0x00,
>> + 0xda, 0x80);
>> + mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_SETDISP, 0x00, 0x13, 0x70);
>> + mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_SETRGBIF, 0x10, 0x10, 0x28,
>> + 0x28, 0x03, 0xff, 0x00, 0x00, 0x00, 0x00);
>> + mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_SETCYC, 0x80);
>> + mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_SETBGP, 0x0a, 0x0a);
>> + mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_SETVCOM, 0x92, 0x92);
>> + mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_SETPOWER_EXT, 0x25, 0x22,
>> + 0xf0, 0x63);
>> + mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_SETMIPI, 0x33, 0x81, 0x05,
>> + 0xf9, 0x0e, 0x0e, 0x20, 0x00, 0x00, 0x00, 0x00,
>> + 0x00, 0x00, 0x00, 0x44, 0x25, 0x00, 0x90, 0x0a,
>> + 0x00, 0x00, 0x01, 0x4f, 0x01, 0x00, 0x00, 0x37);
>> + mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_SETVDC, 0x47);
>> + mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_UNKNOWN_BF, 0x02, 0x11, 0x00);
>> + mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_SETSCR, 0x73, 0x73, 0x50, 0x50,
>> + 0x00, 0x00, 0x12, 0x50, 0x00);
>> + mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_SETPOWER, 0x53, 0xc0, 0x32,
>> + 0x32, 0x77, 0xe1, 0xdd, 0xdd, 0x77, 0x77, 0x33,
>> + 0x33);
>> + mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_SETECO, 0x82, 0x00, 0xbf, 0xff,
>> + 0x00, 0xff);
>> + mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_SETIO, 0xb8, 0x00, 0x0a, 0x00,
>> + 0x00, 0x00);
>> + mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_SETCABC, 0x10, 0x40, 0x1e,
>> + 0x02);
>> + mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_SETPANEL, 0x0b);
>> + mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_SETGAMMA, 0x00, 0x07, 0x0d,
>> + 0x37, 0x35, 0x3f, 0x41, 0x44, 0x06, 0x0c, 0x0d,
>> + 0x0f, 0x11, 0x10, 0x12, 0x14, 0x1a, 0x00, 0x07,
>> + 0x0d, 0x37, 0x35, 0x3f, 0x41, 0x44, 0x06, 0x0c,
>> + 0x0d, 0x0f, 0x11, 0x10, 0x12, 0x14, 0x1a);
>> + mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_SETEQ, 0x07, 0x07, 0x0b, 0x0b,
>> + 0x0b, 0x0b, 0x00, 0x00, 0x00, 0x00, 0xff, 0x00,
>> + 0xc0, 0x10);
>> + mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_SETGIP1, 0xc8, 0x10, 0x02, 0x00,
>> + 0x00, 0xb0, 0xb1, 0x11, 0x31, 0x23, 0x28, 0x80,
>> + 0xb0, 0xb1, 0x27, 0x08, 0x00, 0x04, 0x02, 0x00,
>> + 0x00, 0x00, 0x00, 0x04, 0x02, 0x00, 0x00, 0x00,
>> + 0x88, 0x88, 0xba, 0x60, 0x24, 0x08, 0x88, 0x88,
>> + 0x88, 0x88, 0x88, 0x88, 0x88, 0xba, 0x71, 0x35,
>> + 0x18, 0x88, 0x88, 0x88, 0x88, 0x88, 0x00, 0x00,
>> + 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
>> + 0x00, 0x00, 0x00);
>> + mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_SETGIP2, 0x97, 0x0a, 0x82, 0x02,
>> + 0x03, 0x07, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
>> + 0x81, 0x88, 0xba, 0x17, 0x53, 0x88, 0x88, 0x88,
>> + 0x88, 0x88, 0x88, 0x80, 0x88, 0xba, 0x06, 0x42,
>> + 0x88, 0x88, 0x88, 0x88, 0x88, 0x88, 0x23, 0x00,
>> + 0x00, 0x02, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00,
>> + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
>> + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
>> + 0x00);
>> + mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_UNKNOWN_EF, 0xff, 0xff, 0x01);
>> +
>> + return 0;
>> +}
>> +
>> +static const struct drm_display_mode rg353v2_mode = {
>> + .hdisplay = 640,
>> + .hsync_start = 640 + 40,
>> + .hsync_end = 640 + 40 + 2,
>> + .htotal = 640 + 40 + 2 + 80,
>> + .vdisplay = 480,
>> + .vsync_start = 480 + 18,
>> + .vsync_end = 480 + 18 + 2,
>> + .vtotal = 480 + 18 + 2 + 28,
>> + .clock = 24150,
>> + .flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC,
>> + .width_mm = 70,
>> + .height_mm = 57,
>> +};
>> +
>> +static const struct st7703_panel_desc rg353v2_desc = {
>> + .mode = &rg353v2_mode,
>> + .lanes = 4,
>> + .mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST |
>> + MIPI_DSI_MODE_NO_EOT_PACKET | MIPI_DSI_MODE_LPM,
>> + .format = MIPI_DSI_FMT_RGB888,
>> + .init_sequence = rg353v2_init_sequence,
>> +};
>> +
>> static int st7703_enable(struct drm_panel *panel)
>> {
>> struct st7703 *ctx = panel_to_st7703(panel);
>> @@ -597,6 +693,7 @@ static void st7703_remove(struct mipi_dsi_device *dsi)
>> }
>>
>> static const struct of_device_id st7703_of_match[] = {
>> + { .compatible = "anbernic,rg353v-panel-v2", .data = &rg353v2_desc },
>> { .compatible = "rocktech,jh057n00900", .data = &jh057n00900_panel_desc },
>> { .compatible = "xingbangda,xbd599", .data = &xbd599_desc },
>> { /* sentinel */ }
>> --
>> 2.34.1
>>
^ permalink raw reply [flat|nested] 15+ messages in thread
* Re: [PATCH V3 1/3] dt-bindings: panel: Add Anbernic RG353V-V2 panel compatible
2023-06-06 6:12 ` Frank Oltmanns
@ 2023-08-06 12:41 ` Frank Oltmanns
0 siblings, 0 replies; 15+ messages in thread
From: Frank Oltmanns @ 2023-08-06 12:41 UTC (permalink / raw)
To: Guido Günther, Chris Morgan; +Cc: neil.armstrong, sam, dri-devel
Hi Chris,
hi Guido,
On 2023-06-06 at 08:12:36 +0200, Frank Oltmanns <frank@oltmanns.dev> wrote:
> Hi Chris,
> hi Guido,
>
> On 2023-04-26 at 16:54:46 +0200, Guido Günther <guido.gunther@puri.sm> wrote:
>> Hi Chris,
>> could you check if these two modifications by Frank of the init sequence
>>
>> https://lore.kernel.org/dri-devel/20230211171748.36692-2-frank@oltmanns.dev/
>> https://lore.kernel.org/dri-devel/20230213123238.76889-2-frank@oltmanns.dev/
>>
>> work for your panel too?
>
> I saw that Chris' patchset got accepted into drm-next, and I'm glad that
> more panels will therefore work out of the box. But: Did anyone check if
> the modifications I submitted in February and that Guido referenced
> above work with the new panel?
Chris, could you please check that the new rg353v-panel-v2 works with
the changes I proposed.
Guido, could you please check that the jh057n00900 panel works with the
changes I proposed.
Without these patches the XBD599 panel does not work reliably, so in the
long run it's desirable to include them in mainline. Currently, the only
user of the XBD599 panel that I'm aware of is the pinephone. Therefore,
all distributions supporting the pinephone rely on out-of-tree patches
to support the XDB599 panel.
I'd appreciate if we could rectify this situation.
Thank you both for your support,
Frank
> Thanks,
> Frank
>
>> Cheers,
>> -- Guido
>>
>> On Wed, Apr 26, 2023 at 09:32:11AM -0500, Chris Morgan wrote:
>>> From: Chris Morgan <macromorgan@hotmail.com>
>>>
>>> The Anbernic RG353V-V2 panel is a 3.5 inch 640x480 MIPI-DSI LCD panel.
>>> It's based on the ST7703 LCD controller just like rocktech,jh057n00900.
>>> It's used in a 2nd revision of the Anbernic RG353V handheld gaming
>>> device. Like the first revision of the RG353V the control chip is known
>>> but the panel itself is unknown, so name it for the device.
>>>
>>> Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
>>> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
>>> Acked-by: Guido Günther <agx@sigxcpu.org>
>>> ---
>>> .../devicetree/bindings/display/panel/rocktech,jh057n00900.yaml | 2 ++
>>> 1 file changed, 2 insertions(+)
>>>
>>> diff --git a/Documentation/devicetree/bindings/display/panel/rocktech,jh057n00900.yaml b/Documentation/devicetree/bindings/display/panel/rocktech,jh057n00900.yaml
>>> index 09b5eb7542f8..150e81090af2 100644
>>> --- a/Documentation/devicetree/bindings/display/panel/rocktech,jh057n00900.yaml
>>> +++ b/Documentation/devicetree/bindings/display/panel/rocktech,jh057n00900.yaml
>>> @@ -20,6 +20,8 @@ allOf:
>>> properties:
>>> compatible:
>>> enum:
>>> + # Anberic RG353V-V2 5.0" 640x480 TFT LCD panel
>>> + - anbernic,rg353v-panel-v2
>>> # Rocktech JH057N00900 5.5" 720x1440 TFT LCD panel
>>> - rocktech,jh057n00900
>>> # Xingbangda XBD599 5.99" 720x1440 TFT LCD panel
>>> --
>>> 2.34.1
>>>
>>
>> On Wed, Apr 26, 2023 at 09:32:12AM -0500, Chris Morgan wrote:
>>> From: Chris Morgan <macromorgan@hotmail.com>
>>>
>>> A later revision of the datasheet for the ST7703 refers to this command
>>> as "SETECO".
>>>
>>> Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
>>> Reviewed-by: Guido Günther <agx@sigxcpu.org>
>>> ---
>>> drivers/gpu/drm/panel/panel-sitronix-st7703.c | 5 ++---
>>> 1 file changed, 2 insertions(+), 3 deletions(-)
>>>
>>> diff --git a/drivers/gpu/drm/panel/panel-sitronix-st7703.c b/drivers/gpu/drm/panel/panel-sitronix-st7703.c
>>> index 6747ca237ced..fc55b5fbb67f 100644
>>> --- a/drivers/gpu/drm/panel/panel-sitronix-st7703.c
>>> +++ b/drivers/gpu/drm/panel/panel-sitronix-st7703.c
>>> @@ -41,8 +41,8 @@
>>> #define ST7703_CMD_UNKNOWN_BF 0xBF
>>> #define ST7703_CMD_SETSCR 0xC0
>>> #define ST7703_CMD_SETPOWER 0xC1
>>> +#define ST7703_CMD_SETECO 0xC6
>>> #define ST7703_CMD_SETPANEL 0xCC
>>> -#define ST7703_CMD_UNKNOWN_C6 0xC6
>>> #define ST7703_CMD_SETGAMMA 0xE0
>>> #define ST7703_CMD_SETEQ 0xE3
>>> #define ST7703_CMD_SETGIP1 0xE9
>>> @@ -249,8 +249,7 @@ static int xbd599_init_sequence(struct st7703 *ctx)
>>> * ESD_DET_TIME_SEL = 0 frames
>>> */);
>>>
>>> - /* Undocumented command. */
>>> - mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_UNKNOWN_C6, 0x01, 0x00, 0xFF, 0xFF, 0x00);
>>> + mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_SETECO, 0x01, 0x00, 0xFF, 0xFF, 0x00);
>>>
>>> mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_SETPOWER,
>>> 0x74, /* VBTHS, VBTLS: VGH = 17V, VBL = -11V */
>>> --
>>> 2.34.1
>>>
>>
>> On Wed, Apr 26, 2023 at 09:32:13AM -0500, Chris Morgan wrote:
>>> From: Chris Morgan <macromorgan@hotmail.com>
>>>
>>> The Anbernic RG353V-V2 is a 5 inch panel used in a new revision of the
>>> Anbernic RG353V handheld gaming device. Add support for it.
>>>
>>> Unfortunately it appears this controller is not able to support 120hz
>>> or 100hz mode like the first revision panel.
>>>
>>> Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
>>> Reviewed-by: Guido Günther <agx@sigxcpu.org>
>>> ---
>>> drivers/gpu/drm/panel/panel-sitronix-st7703.c | 97 +++++++++++++++++++
>>> 1 file changed, 97 insertions(+)
>>>
>>> diff --git a/drivers/gpu/drm/panel/panel-sitronix-st7703.c b/drivers/gpu/drm/panel/panel-sitronix-st7703.c
>>> index fc55b5fbb67f..3aa31f3d6157 100644
>>> --- a/drivers/gpu/drm/panel/panel-sitronix-st7703.c
>>> +++ b/drivers/gpu/drm/panel/panel-sitronix-st7703.c
>>> @@ -28,6 +28,7 @@
>>> /* Manufacturer specific Commands send via DSI */
>>> #define ST7703_CMD_ALL_PIXEL_OFF 0x22
>>> #define ST7703_CMD_ALL_PIXEL_ON 0x23
>>> +#define ST7703_CMD_SETAPID 0xB1
>>> #define ST7703_CMD_SETDISP 0xB2
>>> #define ST7703_CMD_SETRGBIF 0xB3
>>> #define ST7703_CMD_SETCYC 0xB4
>>> @@ -42,11 +43,14 @@
>>> #define ST7703_CMD_SETSCR 0xC0
>>> #define ST7703_CMD_SETPOWER 0xC1
>>> #define ST7703_CMD_SETECO 0xC6
>>> +#define ST7703_CMD_SETIO 0xC7
>>> +#define ST7703_CMD_SETCABC 0xC8
>>> #define ST7703_CMD_SETPANEL 0xCC
>>> #define ST7703_CMD_SETGAMMA 0xE0
>>> #define ST7703_CMD_SETEQ 0xE3
>>> #define ST7703_CMD_SETGIP1 0xE9
>>> #define ST7703_CMD_SETGIP2 0xEA
>>> +#define ST7703_CMD_UNKNOWN_EF 0xEF
>>>
>>> struct st7703 {
>>> struct device *dev;
>>> @@ -337,6 +341,98 @@ static const struct st7703_panel_desc xbd599_desc = {
>>> .init_sequence = xbd599_init_sequence,
>>> };
>>>
>>> +static int rg353v2_init_sequence(struct st7703 *ctx)
>>> +{
>>> + struct mipi_dsi_device *dsi = to_mipi_dsi_device(ctx->dev);
>>> +
>>> + /*
>>> + * Init sequence was supplied by the panel vendor.
>>> + */
>>> +
>>> + mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_SETEXTC, 0xf1, 0x12, 0x83);
>>> + mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_SETAPID, 0x00, 0x00, 0x00,
>>> + 0xda, 0x80);
>>> + mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_SETDISP, 0x00, 0x13, 0x70);
>>> + mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_SETRGBIF, 0x10, 0x10, 0x28,
>>> + 0x28, 0x03, 0xff, 0x00, 0x00, 0x00, 0x00);
>>> + mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_SETCYC, 0x80);
>>> + mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_SETBGP, 0x0a, 0x0a);
>>> + mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_SETVCOM, 0x92, 0x92);
>>> + mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_SETPOWER_EXT, 0x25, 0x22,
>>> + 0xf0, 0x63);
>>> + mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_SETMIPI, 0x33, 0x81, 0x05,
>>> + 0xf9, 0x0e, 0x0e, 0x20, 0x00, 0x00, 0x00, 0x00,
>>> + 0x00, 0x00, 0x00, 0x44, 0x25, 0x00, 0x90, 0x0a,
>>> + 0x00, 0x00, 0x01, 0x4f, 0x01, 0x00, 0x00, 0x37);
>>> + mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_SETVDC, 0x47);
>>> + mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_UNKNOWN_BF, 0x02, 0x11, 0x00);
>>> + mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_SETSCR, 0x73, 0x73, 0x50, 0x50,
>>> + 0x00, 0x00, 0x12, 0x50, 0x00);
>>> + mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_SETPOWER, 0x53, 0xc0, 0x32,
>>> + 0x32, 0x77, 0xe1, 0xdd, 0xdd, 0x77, 0x77, 0x33,
>>> + 0x33);
>>> + mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_SETECO, 0x82, 0x00, 0xbf, 0xff,
>>> + 0x00, 0xff);
>>> + mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_SETIO, 0xb8, 0x00, 0x0a, 0x00,
>>> + 0x00, 0x00);
>>> + mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_SETCABC, 0x10, 0x40, 0x1e,
>>> + 0x02);
>>> + mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_SETPANEL, 0x0b);
>>> + mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_SETGAMMA, 0x00, 0x07, 0x0d,
>>> + 0x37, 0x35, 0x3f, 0x41, 0x44, 0x06, 0x0c, 0x0d,
>>> + 0x0f, 0x11, 0x10, 0x12, 0x14, 0x1a, 0x00, 0x07,
>>> + 0x0d, 0x37, 0x35, 0x3f, 0x41, 0x44, 0x06, 0x0c,
>>> + 0x0d, 0x0f, 0x11, 0x10, 0x12, 0x14, 0x1a);
>>> + mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_SETEQ, 0x07, 0x07, 0x0b, 0x0b,
>>> + 0x0b, 0x0b, 0x00, 0x00, 0x00, 0x00, 0xff, 0x00,
>>> + 0xc0, 0x10);
>>> + mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_SETGIP1, 0xc8, 0x10, 0x02, 0x00,
>>> + 0x00, 0xb0, 0xb1, 0x11, 0x31, 0x23, 0x28, 0x80,
>>> + 0xb0, 0xb1, 0x27, 0x08, 0x00, 0x04, 0x02, 0x00,
>>> + 0x00, 0x00, 0x00, 0x04, 0x02, 0x00, 0x00, 0x00,
>>> + 0x88, 0x88, 0xba, 0x60, 0x24, 0x08, 0x88, 0x88,
>>> + 0x88, 0x88, 0x88, 0x88, 0x88, 0xba, 0x71, 0x35,
>>> + 0x18, 0x88, 0x88, 0x88, 0x88, 0x88, 0x00, 0x00,
>>> + 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
>>> + 0x00, 0x00, 0x00);
>>> + mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_SETGIP2, 0x97, 0x0a, 0x82, 0x02,
>>> + 0x03, 0x07, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
>>> + 0x81, 0x88, 0xba, 0x17, 0x53, 0x88, 0x88, 0x88,
>>> + 0x88, 0x88, 0x88, 0x80, 0x88, 0xba, 0x06, 0x42,
>>> + 0x88, 0x88, 0x88, 0x88, 0x88, 0x88, 0x23, 0x00,
>>> + 0x00, 0x02, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00,
>>> + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
>>> + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
>>> + 0x00);
>>> + mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_UNKNOWN_EF, 0xff, 0xff, 0x01);
>>> +
>>> + return 0;
>>> +}
>>> +
>>> +static const struct drm_display_mode rg353v2_mode = {
>>> + .hdisplay = 640,
>>> + .hsync_start = 640 + 40,
>>> + .hsync_end = 640 + 40 + 2,
>>> + .htotal = 640 + 40 + 2 + 80,
>>> + .vdisplay = 480,
>>> + .vsync_start = 480 + 18,
>>> + .vsync_end = 480 + 18 + 2,
>>> + .vtotal = 480 + 18 + 2 + 28,
>>> + .clock = 24150,
>>> + .flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC,
>>> + .width_mm = 70,
>>> + .height_mm = 57,
>>> +};
>>> +
>>> +static const struct st7703_panel_desc rg353v2_desc = {
>>> + .mode = &rg353v2_mode,
>>> + .lanes = 4,
>>> + .mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST |
>>> + MIPI_DSI_MODE_NO_EOT_PACKET | MIPI_DSI_MODE_LPM,
>>> + .format = MIPI_DSI_FMT_RGB888,
>>> + .init_sequence = rg353v2_init_sequence,
>>> +};
>>> +
>>> static int st7703_enable(struct drm_panel *panel)
>>> {
>>> struct st7703 *ctx = panel_to_st7703(panel);
>>> @@ -597,6 +693,7 @@ static void st7703_remove(struct mipi_dsi_device *dsi)
>>> }
>>>
>>> static const struct of_device_id st7703_of_match[] = {
>>> + { .compatible = "anbernic,rg353v-panel-v2", .data = &rg353v2_desc },
>>> { .compatible = "rocktech,jh057n00900", .data = &jh057n00900_panel_desc },
>>> { .compatible = "xingbangda,xbd599", .data = &xbd599_desc },
>>> { /* sentinel */ }
>>> --
>>> 2.34.1
>>>
^ permalink raw reply [flat|nested] 15+ messages in thread
end of thread, other threads:[~2023-08-06 12:49 UTC | newest]
Thread overview: 15+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2023-04-26 14:32 [PATCH V3 0/3] drm/panel: Add Anbernic RG353V-V2 Panel Chris Morgan
2023-04-26 14:32 ` Chris Morgan
2023-04-26 14:32 ` [PATCH V3 1/3] dt-bindings: panel: Add Anbernic RG353V-V2 panel compatible Chris Morgan
2023-04-26 14:32 ` Chris Morgan
2023-04-26 14:54 ` Guido Günther
2023-06-06 6:12 ` Frank Oltmanns
2023-08-06 12:41 ` Frank Oltmanns
2023-04-26 14:32 ` [PATCH V3 2/3] drm/panel: st7703: Rename CMD_UNKNOWN_C6 to CMD_SETECO Chris Morgan
2023-04-26 14:32 ` Chris Morgan
2023-04-26 14:32 ` [PATCH V3 3/3] drm/panel: st7703: Add Anbernic RG353V-V2 Panel Support Chris Morgan
2023-04-26 14:32 ` Chris Morgan
2023-04-27 11:47 ` [PATCH V3 0/3] drm/panel: Add Anbernic RG353V-V2 Panel Neil Armstrong
2023-04-27 11:47 ` Neil Armstrong
2023-04-27 11:49 ` Neil Armstrong
2023-04-27 11:49 ` Neil Armstrong
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