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From: Jisheng Zhang <jszhang@kernel.org>
To: Thomas Gleixner <tglx@linutronix.de>,
	Marc Zyngier <maz@kernel.org>, Rob Herring <robh+dt@kernel.org>,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
	Conor Dooley <conor+dt@kernel.org>,
	Palmer Dabbelt <palmer@dabbelt.com>,
	Paul Walmsley <paul.walmsley@sifive.com>,
	Albert Ou <aou@eecs.berkeley.edu>,
	Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
	Jiri Slaby <jirislaby@kernel.org>
Cc: linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org,
	devicetree@vger.kernel.org, linux-serial@vger.kernel.org
Subject: [PATCH v4 00/10] riscv: add Bouffalolab bl808 support
Date: Thu, 18 May 2023 23:22:34 +0800	[thread overview]
Message-ID: <20230518152244.2178-1-jszhang@kernel.org> (raw)

This series adds Bouffalolab uart driver and basic devicetrees for
Bouffalolab bl808 SoC and Sipeed M1s dock board.

Since v3:
  - fix build error reported by lkp@intel.com
  - fix earlycon compatible string
  - fix dtbs_check
  - collect Reviewed-by tag

Since v2:
  - fix dt_binding_check and dtbs_check warnings
  - use uart_port_tx_limited() helper in uart driver
  - collect Acked-by/Reviewed-by tag
  - uart0 -> uart3
  - update "riscv,ndev" property
  - mv vendor prefix binding as the first patch
  - add compatible string for bouffalolab bl808 plic

Since v1:
  - use FIELD_PREP and FIELD_GET macro
  - rewrite bflb_uart_tx_chars()
  - add vendor prefix for bouffalolab
  - add dt binding for bl808 compatibles
  - enable SOC_BOUFFALOLAB in defconfig
  - collect Reviewed-by tag
  - modify commit-msg as suggested


Jisheng Zhang (10):
  dt-bindings: vendor-prefixes: add bouffalolab
  dt-bindings: interrupt-controller: Add bouffalolab bl808 plic
  dt-bindings: serial: add documentation for Bouffalolab UART Driver
  serial: bflb_uart: add Bouffalolab UART Driver
  riscv: add the Bouffalolab SoC family Kconfig option
  dt-bindings: riscv: Add bouffalolab bl808 board compatibles
  riscv: dts: bouffalolab: add the bl808 SoC base device tree
  riscv: dts: bouffalolab: add Sipeed M1s SoM and Dock devicetree
  MAINTAINERS: riscv: add entry for Bouffalolab SoC
  riscv: defconfig: enable BOUFFALOLAB SoC

 .../sifive,plic-1.0.0.yaml                    |   1 +
 .../bindings/riscv/bouffalolab.yaml           |  29 +
 .../serial/bouffalolab,bl808-uart.yaml        |  47 ++
 .../devicetree/bindings/vendor-prefixes.yaml  |   2 +
 MAINTAINERS                                   |   7 +
 arch/riscv/Kconfig.socs                       |   5 +
 arch/riscv/boot/dts/Makefile                  |   1 +
 arch/riscv/boot/dts/bouffalolab/Makefile      |   2 +
 .../dts/bouffalolab/bl808-sipeed-m1s-dock.dts |  25 +
 .../dts/bouffalolab/bl808-sipeed-m1s.dtsi     |  21 +
 arch/riscv/boot/dts/bouffalolab/bl808.dtsi    |  73 +++
 arch/riscv/configs/defconfig                  |   1 +
 drivers/tty/serial/Kconfig                    |  18 +
 drivers/tty/serial/Makefile                   |   1 +
 drivers/tty/serial/bflb_uart.c                | 586 ++++++++++++++++++
 include/uapi/linux/serial_core.h              |   3 +
 16 files changed, 822 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/riscv/bouffalolab.yaml
 create mode 100644 Documentation/devicetree/bindings/serial/bouffalolab,bl808-uart.yaml
 create mode 100644 arch/riscv/boot/dts/bouffalolab/Makefile
 create mode 100644 arch/riscv/boot/dts/bouffalolab/bl808-sipeed-m1s-dock.dts
 create mode 100644 arch/riscv/boot/dts/bouffalolab/bl808-sipeed-m1s.dtsi
 create mode 100644 arch/riscv/boot/dts/bouffalolab/bl808.dtsi
 create mode 100644 drivers/tty/serial/bflb_uart.c

-- 
2.40.0


_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv

WARNING: multiple messages have this Message-ID (diff)
From: Jisheng Zhang <jszhang@kernel.org>
To: Thomas Gleixner <tglx@linutronix.de>,
	Marc Zyngier <maz@kernel.org>, Rob Herring <robh+dt@kernel.org>,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
	Conor Dooley <conor+dt@kernel.org>,
	Palmer Dabbelt <palmer@dabbelt.com>,
	Paul Walmsley <paul.walmsley@sifive.com>,
	Albert Ou <aou@eecs.berkeley.edu>,
	Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
	Jiri Slaby <jirislaby@kernel.org>
Cc: linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org,
	devicetree@vger.kernel.org, linux-serial@vger.kernel.org
Subject: [PATCH v4 00/10] riscv: add Bouffalolab bl808 support
Date: Thu, 18 May 2023 23:22:34 +0800	[thread overview]
Message-ID: <20230518152244.2178-1-jszhang@kernel.org> (raw)

This series adds Bouffalolab uart driver and basic devicetrees for
Bouffalolab bl808 SoC and Sipeed M1s dock board.

Since v3:
  - fix build error reported by lkp@intel.com
  - fix earlycon compatible string
  - fix dtbs_check
  - collect Reviewed-by tag

Since v2:
  - fix dt_binding_check and dtbs_check warnings
  - use uart_port_tx_limited() helper in uart driver
  - collect Acked-by/Reviewed-by tag
  - uart0 -> uart3
  - update "riscv,ndev" property
  - mv vendor prefix binding as the first patch
  - add compatible string for bouffalolab bl808 plic

Since v1:
  - use FIELD_PREP and FIELD_GET macro
  - rewrite bflb_uart_tx_chars()
  - add vendor prefix for bouffalolab
  - add dt binding for bl808 compatibles
  - enable SOC_BOUFFALOLAB in defconfig
  - collect Reviewed-by tag
  - modify commit-msg as suggested


Jisheng Zhang (10):
  dt-bindings: vendor-prefixes: add bouffalolab
  dt-bindings: interrupt-controller: Add bouffalolab bl808 plic
  dt-bindings: serial: add documentation for Bouffalolab UART Driver
  serial: bflb_uart: add Bouffalolab UART Driver
  riscv: add the Bouffalolab SoC family Kconfig option
  dt-bindings: riscv: Add bouffalolab bl808 board compatibles
  riscv: dts: bouffalolab: add the bl808 SoC base device tree
  riscv: dts: bouffalolab: add Sipeed M1s SoM and Dock devicetree
  MAINTAINERS: riscv: add entry for Bouffalolab SoC
  riscv: defconfig: enable BOUFFALOLAB SoC

 .../sifive,plic-1.0.0.yaml                    |   1 +
 .../bindings/riscv/bouffalolab.yaml           |  29 +
 .../serial/bouffalolab,bl808-uart.yaml        |  47 ++
 .../devicetree/bindings/vendor-prefixes.yaml  |   2 +
 MAINTAINERS                                   |   7 +
 arch/riscv/Kconfig.socs                       |   5 +
 arch/riscv/boot/dts/Makefile                  |   1 +
 arch/riscv/boot/dts/bouffalolab/Makefile      |   2 +
 .../dts/bouffalolab/bl808-sipeed-m1s-dock.dts |  25 +
 .../dts/bouffalolab/bl808-sipeed-m1s.dtsi     |  21 +
 arch/riscv/boot/dts/bouffalolab/bl808.dtsi    |  73 +++
 arch/riscv/configs/defconfig                  |   1 +
 drivers/tty/serial/Kconfig                    |  18 +
 drivers/tty/serial/Makefile                   |   1 +
 drivers/tty/serial/bflb_uart.c                | 586 ++++++++++++++++++
 include/uapi/linux/serial_core.h              |   3 +
 16 files changed, 822 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/riscv/bouffalolab.yaml
 create mode 100644 Documentation/devicetree/bindings/serial/bouffalolab,bl808-uart.yaml
 create mode 100644 arch/riscv/boot/dts/bouffalolab/Makefile
 create mode 100644 arch/riscv/boot/dts/bouffalolab/bl808-sipeed-m1s-dock.dts
 create mode 100644 arch/riscv/boot/dts/bouffalolab/bl808-sipeed-m1s.dtsi
 create mode 100644 arch/riscv/boot/dts/bouffalolab/bl808.dtsi
 create mode 100644 drivers/tty/serial/bflb_uart.c

-- 
2.40.0


             reply	other threads:[~2023-05-18 15:34 UTC|newest]

Thread overview: 64+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-05-18 15:22 Jisheng Zhang [this message]
2023-05-18 15:22 ` [PATCH v4 00/10] riscv: add Bouffalolab bl808 support Jisheng Zhang
2023-05-18 15:22 ` [PATCH v4 01/10] dt-bindings: vendor-prefixes: add bouffalolab Jisheng Zhang
2023-05-18 15:22   ` Jisheng Zhang
2023-05-19  2:53   ` Samuel Holland
2023-05-19  2:53     ` Samuel Holland
2023-05-21  9:02     ` Jisheng Zhang
2023-05-21  9:02       ` Jisheng Zhang
2023-05-21 13:55       ` Conor Dooley
2023-05-21 13:55         ` Conor Dooley
2023-06-07 19:50       ` Rob Herring
2023-06-07 19:50         ` Rob Herring
2023-05-18 15:22 ` [PATCH v4 02/10] dt-bindings: interrupt-controller: Add bouffalolab bl808 plic Jisheng Zhang
2023-05-18 15:22   ` Jisheng Zhang
2023-05-19  3:36   ` Samuel Holland
2023-05-19  3:36     ` Samuel Holland
2023-05-18 15:22 ` [PATCH v4 03/10] dt-bindings: serial: add documentation for Bouffalolab UART Driver Jisheng Zhang
2023-05-18 15:22   ` Jisheng Zhang
2023-05-18 19:34   ` Conor Dooley
2023-05-18 19:34     ` Conor Dooley
2023-05-19  3:00   ` Samuel Holland
2023-05-19  3:00     ` Samuel Holland
2023-05-21  9:13     ` Jisheng Zhang
2023-05-21  9:13       ` Jisheng Zhang
2023-05-22  7:13       ` Conor Dooley
2023-05-22  7:13         ` Conor Dooley
2023-05-18 15:22 ` [PATCH v4 04/10] serial: bflb_uart: add " Jisheng Zhang
2023-05-18 15:22   ` Jisheng Zhang
2023-05-30 10:36   ` Greg Kroah-Hartman
2023-05-30 10:36     ` Greg Kroah-Hartman
2023-05-31 14:09     ` Jisheng Zhang
2023-05-31 14:09       ` Jisheng Zhang
2023-05-31 14:34       ` Greg Kroah-Hartman
2023-05-31 14:34         ` Greg Kroah-Hartman
2023-05-31 15:05         ` Jisheng Zhang
2023-05-31 15:05           ` Jisheng Zhang
2023-05-18 15:22 ` [PATCH v4 05/10] riscv: add the Bouffalolab SoC family Kconfig option Jisheng Zhang
2023-05-18 15:22   ` Jisheng Zhang
2023-05-18 15:22 ` [PATCH v4 06/10] dt-bindings: riscv: Add bouffalolab bl808 board compatibles Jisheng Zhang
2023-05-18 15:22   ` Jisheng Zhang
2023-05-19  3:31   ` Samuel Holland
2023-05-19  3:31     ` Samuel Holland
2023-05-19 11:55     ` Conor Dooley
2023-05-19 11:55       ` Conor Dooley
2023-05-21  9:29       ` Jisheng Zhang
2023-05-21  9:29         ` Jisheng Zhang
2023-05-21  9:45         ` Jisheng Zhang
2023-05-21  9:45           ` Jisheng Zhang
2023-06-07 20:04     ` Rob Herring
2023-06-07 20:04       ` Rob Herring
2023-05-18 15:22 ` [PATCH v4 07/10] riscv: dts: bouffalolab: add the bl808 SoC base device tree Jisheng Zhang
2023-05-18 15:22   ` Jisheng Zhang
2023-05-19  3:51   ` Samuel Holland
2023-05-19  3:51     ` Samuel Holland
2023-05-18 15:22 ` [PATCH v4 08/10] riscv: dts: bouffalolab: add Sipeed M1s SoM and Dock devicetree Jisheng Zhang
2023-05-18 15:22   ` Jisheng Zhang
2023-05-19  3:55   ` Samuel Holland
2023-05-19  3:55     ` Samuel Holland
2023-05-21  9:40     ` Jisheng Zhang
2023-05-21  9:40       ` Jisheng Zhang
2023-05-18 15:22 ` [PATCH v4 09/10] MAINTAINERS: riscv: add entry for Bouffalolab SoC Jisheng Zhang
2023-05-18 15:22   ` Jisheng Zhang
2023-05-18 15:22 ` [PATCH v4 10/10] riscv: defconfig: enable BOUFFALOLAB SoC Jisheng Zhang
2023-05-18 15:22   ` Jisheng Zhang

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