From: Jisheng Zhang <jszhang@kernel.org>
To: Thomas Gleixner <tglx@linutronix.de>,
Marc Zyngier <maz@kernel.org>, Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Conor Dooley <conor+dt@kernel.org>,
Palmer Dabbelt <palmer@dabbelt.com>,
Paul Walmsley <paul.walmsley@sifive.com>,
Albert Ou <aou@eecs.berkeley.edu>,
Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
Jiri Slaby <jirislaby@kernel.org>
Cc: linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org,
devicetree@vger.kernel.org, linux-serial@vger.kernel.org,
Palmer Dabbelt <palmer@rivosinc.com>
Subject: [PATCH v4 08/10] riscv: dts: bouffalolab: add Sipeed M1s SoM and Dock devicetree
Date: Thu, 18 May 2023 23:22:42 +0800 [thread overview]
Message-ID: <20230518152244.2178-9-jszhang@kernel.org> (raw)
In-Reply-To: <20230518152244.2178-1-jszhang@kernel.org>
Sipeed manufactures a M1s system-on-module and dock board, add basic
support for them.
Signed-off-by: Jisheng Zhang <jszhang@kernel.org>
Acked-by: Palmer Dabbelt <palmer@rivosinc.com>
---
arch/riscv/boot/dts/Makefile | 1 +
arch/riscv/boot/dts/bouffalolab/Makefile | 2 ++
.../dts/bouffalolab/bl808-sipeed-m1s-dock.dts | 25 +++++++++++++++++++
.../dts/bouffalolab/bl808-sipeed-m1s.dtsi | 21 ++++++++++++++++
4 files changed, 49 insertions(+)
create mode 100644 arch/riscv/boot/dts/bouffalolab/Makefile
create mode 100644 arch/riscv/boot/dts/bouffalolab/bl808-sipeed-m1s-dock.dts
create mode 100644 arch/riscv/boot/dts/bouffalolab/bl808-sipeed-m1s.dtsi
diff --git a/arch/riscv/boot/dts/Makefile b/arch/riscv/boot/dts/Makefile
index f0d9f89054f8..133e6c38c9b0 100644
--- a/arch/riscv/boot/dts/Makefile
+++ b/arch/riscv/boot/dts/Makefile
@@ -1,5 +1,6 @@
# SPDX-License-Identifier: GPL-2.0
subdir-y += allwinner
+subdir-y += bouffalolab
subdir-y += sifive
subdir-y += starfive
subdir-y += canaan
diff --git a/arch/riscv/boot/dts/bouffalolab/Makefile b/arch/riscv/boot/dts/bouffalolab/Makefile
new file mode 100644
index 000000000000..5419964e892d
--- /dev/null
+++ b/arch/riscv/boot/dts/bouffalolab/Makefile
@@ -0,0 +1,2 @@
+# SPDX-License-Identifier: GPL-2.0
+dtb-$(CONFIG_SOC_BOUFFALOLAB) += bl808-sipeed-m1s-dock.dtb
diff --git a/arch/riscv/boot/dts/bouffalolab/bl808-sipeed-m1s-dock.dts b/arch/riscv/boot/dts/bouffalolab/bl808-sipeed-m1s-dock.dts
new file mode 100644
index 000000000000..aa6cf909cd4d
--- /dev/null
+++ b/arch/riscv/boot/dts/bouffalolab/bl808-sipeed-m1s-dock.dts
@@ -0,0 +1,25 @@
+// SPDX-License-Identifier: (GPL-2.0+ or MIT)
+/*
+ * Copyright (C) 2022 Jisheng Zhang <jszhang@kernel.org>
+ */
+
+/dts-v1/;
+
+#include "bl808-sipeed-m1s.dtsi"
+
+/ {
+ model = "Sipeed M1s Dock";
+ compatible = "sipeed,m1s-dock", "sipeed,m1s", "bouffalolab,bl808";
+
+ aliases {
+ serial3 = &uart3;
+ };
+
+ chosen {
+ stdout-path = "serial3:2000000n8";
+ };
+};
+
+&uart3 {
+ status = "okay";
+};
diff --git a/arch/riscv/boot/dts/bouffalolab/bl808-sipeed-m1s.dtsi b/arch/riscv/boot/dts/bouffalolab/bl808-sipeed-m1s.dtsi
new file mode 100644
index 000000000000..5026de768534
--- /dev/null
+++ b/arch/riscv/boot/dts/bouffalolab/bl808-sipeed-m1s.dtsi
@@ -0,0 +1,21 @@
+// SPDX-License-Identifier: (GPL-2.0+ or MIT)
+/*
+ * Copyright (C) 2022 Jisheng Zhang <jszhang@kernel.org>
+ */
+
+/dts-v1/;
+
+#include "bl808.dtsi"
+
+/ {
+ compatible = "sipeed,m1s", "bouffalolab,bl808";
+
+ memory@50000000 {
+ device_type = "memory";
+ reg = <0x50000000 0x04000000>;
+ };
+};
+
+&xtal {
+ clock-frequency = <40000000>;
+};
--
2.40.0
_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv
WARNING: multiple messages have this Message-ID (diff)
From: Jisheng Zhang <jszhang@kernel.org>
To: Thomas Gleixner <tglx@linutronix.de>,
Marc Zyngier <maz@kernel.org>, Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Conor Dooley <conor+dt@kernel.org>,
Palmer Dabbelt <palmer@dabbelt.com>,
Paul Walmsley <paul.walmsley@sifive.com>,
Albert Ou <aou@eecs.berkeley.edu>,
Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
Jiri Slaby <jirislaby@kernel.org>
Cc: linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org,
devicetree@vger.kernel.org, linux-serial@vger.kernel.org,
Palmer Dabbelt <palmer@rivosinc.com>
Subject: [PATCH v4 08/10] riscv: dts: bouffalolab: add Sipeed M1s SoM and Dock devicetree
Date: Thu, 18 May 2023 23:22:42 +0800 [thread overview]
Message-ID: <20230518152244.2178-9-jszhang@kernel.org> (raw)
In-Reply-To: <20230518152244.2178-1-jszhang@kernel.org>
Sipeed manufactures a M1s system-on-module and dock board, add basic
support for them.
Signed-off-by: Jisheng Zhang <jszhang@kernel.org>
Acked-by: Palmer Dabbelt <palmer@rivosinc.com>
---
arch/riscv/boot/dts/Makefile | 1 +
arch/riscv/boot/dts/bouffalolab/Makefile | 2 ++
.../dts/bouffalolab/bl808-sipeed-m1s-dock.dts | 25 +++++++++++++++++++
.../dts/bouffalolab/bl808-sipeed-m1s.dtsi | 21 ++++++++++++++++
4 files changed, 49 insertions(+)
create mode 100644 arch/riscv/boot/dts/bouffalolab/Makefile
create mode 100644 arch/riscv/boot/dts/bouffalolab/bl808-sipeed-m1s-dock.dts
create mode 100644 arch/riscv/boot/dts/bouffalolab/bl808-sipeed-m1s.dtsi
diff --git a/arch/riscv/boot/dts/Makefile b/arch/riscv/boot/dts/Makefile
index f0d9f89054f8..133e6c38c9b0 100644
--- a/arch/riscv/boot/dts/Makefile
+++ b/arch/riscv/boot/dts/Makefile
@@ -1,5 +1,6 @@
# SPDX-License-Identifier: GPL-2.0
subdir-y += allwinner
+subdir-y += bouffalolab
subdir-y += sifive
subdir-y += starfive
subdir-y += canaan
diff --git a/arch/riscv/boot/dts/bouffalolab/Makefile b/arch/riscv/boot/dts/bouffalolab/Makefile
new file mode 100644
index 000000000000..5419964e892d
--- /dev/null
+++ b/arch/riscv/boot/dts/bouffalolab/Makefile
@@ -0,0 +1,2 @@
+# SPDX-License-Identifier: GPL-2.0
+dtb-$(CONFIG_SOC_BOUFFALOLAB) += bl808-sipeed-m1s-dock.dtb
diff --git a/arch/riscv/boot/dts/bouffalolab/bl808-sipeed-m1s-dock.dts b/arch/riscv/boot/dts/bouffalolab/bl808-sipeed-m1s-dock.dts
new file mode 100644
index 000000000000..aa6cf909cd4d
--- /dev/null
+++ b/arch/riscv/boot/dts/bouffalolab/bl808-sipeed-m1s-dock.dts
@@ -0,0 +1,25 @@
+// SPDX-License-Identifier: (GPL-2.0+ or MIT)
+/*
+ * Copyright (C) 2022 Jisheng Zhang <jszhang@kernel.org>
+ */
+
+/dts-v1/;
+
+#include "bl808-sipeed-m1s.dtsi"
+
+/ {
+ model = "Sipeed M1s Dock";
+ compatible = "sipeed,m1s-dock", "sipeed,m1s", "bouffalolab,bl808";
+
+ aliases {
+ serial3 = &uart3;
+ };
+
+ chosen {
+ stdout-path = "serial3:2000000n8";
+ };
+};
+
+&uart3 {
+ status = "okay";
+};
diff --git a/arch/riscv/boot/dts/bouffalolab/bl808-sipeed-m1s.dtsi b/arch/riscv/boot/dts/bouffalolab/bl808-sipeed-m1s.dtsi
new file mode 100644
index 000000000000..5026de768534
--- /dev/null
+++ b/arch/riscv/boot/dts/bouffalolab/bl808-sipeed-m1s.dtsi
@@ -0,0 +1,21 @@
+// SPDX-License-Identifier: (GPL-2.0+ or MIT)
+/*
+ * Copyright (C) 2022 Jisheng Zhang <jszhang@kernel.org>
+ */
+
+/dts-v1/;
+
+#include "bl808.dtsi"
+
+/ {
+ compatible = "sipeed,m1s", "bouffalolab,bl808";
+
+ memory@50000000 {
+ device_type = "memory";
+ reg = <0x50000000 0x04000000>;
+ };
+};
+
+&xtal {
+ clock-frequency = <40000000>;
+};
--
2.40.0
next prev parent reply other threads:[~2023-05-18 15:34 UTC|newest]
Thread overview: 64+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-05-18 15:22 [PATCH v4 00/10] riscv: add Bouffalolab bl808 support Jisheng Zhang
2023-05-18 15:22 ` Jisheng Zhang
2023-05-18 15:22 ` [PATCH v4 01/10] dt-bindings: vendor-prefixes: add bouffalolab Jisheng Zhang
2023-05-18 15:22 ` Jisheng Zhang
2023-05-19 2:53 ` Samuel Holland
2023-05-19 2:53 ` Samuel Holland
2023-05-21 9:02 ` Jisheng Zhang
2023-05-21 9:02 ` Jisheng Zhang
2023-05-21 13:55 ` Conor Dooley
2023-05-21 13:55 ` Conor Dooley
2023-06-07 19:50 ` Rob Herring
2023-06-07 19:50 ` Rob Herring
2023-05-18 15:22 ` [PATCH v4 02/10] dt-bindings: interrupt-controller: Add bouffalolab bl808 plic Jisheng Zhang
2023-05-18 15:22 ` Jisheng Zhang
2023-05-19 3:36 ` Samuel Holland
2023-05-19 3:36 ` Samuel Holland
2023-05-18 15:22 ` [PATCH v4 03/10] dt-bindings: serial: add documentation for Bouffalolab UART Driver Jisheng Zhang
2023-05-18 15:22 ` Jisheng Zhang
2023-05-18 19:34 ` Conor Dooley
2023-05-18 19:34 ` Conor Dooley
2023-05-19 3:00 ` Samuel Holland
2023-05-19 3:00 ` Samuel Holland
2023-05-21 9:13 ` Jisheng Zhang
2023-05-21 9:13 ` Jisheng Zhang
2023-05-22 7:13 ` Conor Dooley
2023-05-22 7:13 ` Conor Dooley
2023-05-18 15:22 ` [PATCH v4 04/10] serial: bflb_uart: add " Jisheng Zhang
2023-05-18 15:22 ` Jisheng Zhang
2023-05-30 10:36 ` Greg Kroah-Hartman
2023-05-30 10:36 ` Greg Kroah-Hartman
2023-05-31 14:09 ` Jisheng Zhang
2023-05-31 14:09 ` Jisheng Zhang
2023-05-31 14:34 ` Greg Kroah-Hartman
2023-05-31 14:34 ` Greg Kroah-Hartman
2023-05-31 15:05 ` Jisheng Zhang
2023-05-31 15:05 ` Jisheng Zhang
2023-05-18 15:22 ` [PATCH v4 05/10] riscv: add the Bouffalolab SoC family Kconfig option Jisheng Zhang
2023-05-18 15:22 ` Jisheng Zhang
2023-05-18 15:22 ` [PATCH v4 06/10] dt-bindings: riscv: Add bouffalolab bl808 board compatibles Jisheng Zhang
2023-05-18 15:22 ` Jisheng Zhang
2023-05-19 3:31 ` Samuel Holland
2023-05-19 3:31 ` Samuel Holland
2023-05-19 11:55 ` Conor Dooley
2023-05-19 11:55 ` Conor Dooley
2023-05-21 9:29 ` Jisheng Zhang
2023-05-21 9:29 ` Jisheng Zhang
2023-05-21 9:45 ` Jisheng Zhang
2023-05-21 9:45 ` Jisheng Zhang
2023-06-07 20:04 ` Rob Herring
2023-06-07 20:04 ` Rob Herring
2023-05-18 15:22 ` [PATCH v4 07/10] riscv: dts: bouffalolab: add the bl808 SoC base device tree Jisheng Zhang
2023-05-18 15:22 ` Jisheng Zhang
2023-05-19 3:51 ` Samuel Holland
2023-05-19 3:51 ` Samuel Holland
2023-05-18 15:22 ` Jisheng Zhang [this message]
2023-05-18 15:22 ` [PATCH v4 08/10] riscv: dts: bouffalolab: add Sipeed M1s SoM and Dock devicetree Jisheng Zhang
2023-05-19 3:55 ` Samuel Holland
2023-05-19 3:55 ` Samuel Holland
2023-05-21 9:40 ` Jisheng Zhang
2023-05-21 9:40 ` Jisheng Zhang
2023-05-18 15:22 ` [PATCH v4 09/10] MAINTAINERS: riscv: add entry for Bouffalolab SoC Jisheng Zhang
2023-05-18 15:22 ` Jisheng Zhang
2023-05-18 15:22 ` [PATCH v4 10/10] riscv: defconfig: enable BOUFFALOLAB SoC Jisheng Zhang
2023-05-18 15:22 ` Jisheng Zhang
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20230518152244.2178-9-jszhang@kernel.org \
--to=jszhang@kernel.org \
--cc=aou@eecs.berkeley.edu \
--cc=conor+dt@kernel.org \
--cc=devicetree@vger.kernel.org \
--cc=gregkh@linuxfoundation.org \
--cc=jirislaby@kernel.org \
--cc=krzysztof.kozlowski+dt@linaro.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-riscv@lists.infradead.org \
--cc=linux-serial@vger.kernel.org \
--cc=maz@kernel.org \
--cc=palmer@dabbelt.com \
--cc=palmer@rivosinc.com \
--cc=paul.walmsley@sifive.com \
--cc=robh+dt@kernel.org \
--cc=tglx@linutronix.de \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.