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From: Jisheng Zhang <jszhang@kernel.org>
To: Thomas Gleixner <tglx@linutronix.de>,
	Marc Zyngier <maz@kernel.org>, Rob Herring <robh+dt@kernel.org>,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
	Conor Dooley <conor+dt@kernel.org>,
	Palmer Dabbelt <palmer@dabbelt.com>,
	Paul Walmsley <paul.walmsley@sifive.com>,
	Albert Ou <aou@eecs.berkeley.edu>, Guo Ren <guoren@kernel.org>
Cc: devicetree@vger.kernel.org, Yangtao Li <frank.li@vivo.com>,
	linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org,
	Wei Fu <wefu@redhat.com>
Subject: [PATCH v2 9/9] riscv: defconfig: enable T-HEAD SoC
Date: Fri, 19 May 2023 02:45:41 +0800	[thread overview]
Message-ID: <20230518184541.2627-10-jszhang@kernel.org> (raw)
In-Reply-To: <20230518184541.2627-1-jszhang@kernel.org>

Enable T-HEAD SoC config in defconfig to allow the default
upstream kernel to boot on Sipeed Lichee Pi 4A board.

Signed-off-by: Jisheng Zhang <jszhang@kernel.org>
---
 arch/riscv/configs/defconfig | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/riscv/configs/defconfig b/arch/riscv/configs/defconfig
index d98d6e90b2b8..109e4b5b003c 100644
--- a/arch/riscv/configs/defconfig
+++ b/arch/riscv/configs/defconfig
@@ -27,6 +27,7 @@ CONFIG_EXPERT=y
 CONFIG_PROFILING=y
 CONFIG_SOC_MICROCHIP_POLARFIRE=y
 CONFIG_ARCH_RENESAS=y
+CONFIG_ARCH_THEAD=y
 CONFIG_SOC_SIFIVE=y
 CONFIG_SOC_STARFIVE=y
 CONFIG_ARCH_SUNXI=y
-- 
2.40.0


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WARNING: multiple messages have this Message-ID (diff)
From: Jisheng Zhang <jszhang@kernel.org>
To: Thomas Gleixner <tglx@linutronix.de>,
	Marc Zyngier <maz@kernel.org>, Rob Herring <robh+dt@kernel.org>,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
	Conor Dooley <conor+dt@kernel.org>,
	Palmer Dabbelt <palmer@dabbelt.com>,
	Paul Walmsley <paul.walmsley@sifive.com>,
	Albert Ou <aou@eecs.berkeley.edu>, Guo Ren <guoren@kernel.org>
Cc: linux-kernel@vger.kernel.org, devicetree@vger.kernel.org,
	linux-riscv@lists.infradead.org, Yangtao Li <frank.li@vivo.com>,
	Wei Fu <wefu@redhat.com>, Icenowy Zheng <uwu@icenowy.me>
Subject: [PATCH v2 9/9] riscv: defconfig: enable T-HEAD SoC
Date: Fri, 19 May 2023 02:45:41 +0800	[thread overview]
Message-ID: <20230518184541.2627-10-jszhang@kernel.org> (raw)
In-Reply-To: <20230518184541.2627-1-jszhang@kernel.org>

Enable T-HEAD SoC config in defconfig to allow the default
upstream kernel to boot on Sipeed Lichee Pi 4A board.

Signed-off-by: Jisheng Zhang <jszhang@kernel.org>
---
 arch/riscv/configs/defconfig | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/riscv/configs/defconfig b/arch/riscv/configs/defconfig
index d98d6e90b2b8..109e4b5b003c 100644
--- a/arch/riscv/configs/defconfig
+++ b/arch/riscv/configs/defconfig
@@ -27,6 +27,7 @@ CONFIG_EXPERT=y
 CONFIG_PROFILING=y
 CONFIG_SOC_MICROCHIP_POLARFIRE=y
 CONFIG_ARCH_RENESAS=y
+CONFIG_ARCH_THEAD=y
 CONFIG_SOC_SIFIVE=y
 CONFIG_SOC_STARFIVE=y
 CONFIG_ARCH_SUNXI=y
-- 
2.40.0


  parent reply	other threads:[~2023-05-18 18:57 UTC|newest]

Thread overview: 60+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-05-18 18:45 [PATCH v2 0/9] Add Sipeed Lichee Pi 4A RISC-V board support Jisheng Zhang
2023-05-18 18:45 ` Jisheng Zhang
2023-05-18 18:45 ` [PATCH v2 1/9] dt-bindings: interrupt-controller: Add T-HEAD's TH1520 PLIC Jisheng Zhang
2023-05-18 18:45   ` Jisheng Zhang
2023-05-18 19:36   ` Conor Dooley
2023-05-18 19:36     ` Conor Dooley
2023-05-21 13:14   ` Guo Ren
2023-05-21 13:14     ` Guo Ren
2023-05-18 18:45 ` [PATCH v2 2/9] dt-bindings: timer: Add T-HEAD TH1520 clint Jisheng Zhang
2023-05-18 18:45   ` Jisheng Zhang
2023-05-18 19:37   ` Conor Dooley
2023-05-18 19:37     ` Conor Dooley
2023-05-18 18:45 ` [PATCH v2 3/9] dt-bindings: riscv: Add T-HEAD TH1520 board compatibles Jisheng Zhang
2023-05-18 18:45   ` Jisheng Zhang
2023-05-18 19:40   ` Conor Dooley
2023-05-18 19:40     ` Conor Dooley
2023-05-19 15:50     ` Icenowy Zheng
2023-05-19 15:50       ` Icenowy Zheng
2023-05-18 18:45 ` [PATCH v2 4/9] dt-binding: riscv: add T-HEAD CPU reset Jisheng Zhang
2023-05-18 18:45   ` Jisheng Zhang
2023-05-18 19:39   ` Rob Herring
2023-05-18 19:39     ` Rob Herring
2023-05-18 19:53   ` Conor Dooley
2023-05-18 19:53     ` Conor Dooley
2023-05-22  2:16     ` Guo Ren
2023-05-22  2:16       ` Guo Ren
2023-05-22  7:09       ` Conor Dooley
2023-05-22  7:09         ` Conor Dooley
2023-05-22  7:42         ` Guo Ren
2023-05-22  7:42           ` Guo Ren
2023-05-30 12:55   ` Krzysztof Kozlowski
2023-05-30 12:55     ` Krzysztof Kozlowski
2023-05-18 18:45 ` [PATCH v2 5/9] riscv: Add the T-HEAD SoC family Kconfig option Jisheng Zhang
2023-05-18 18:45   ` Jisheng Zhang
2023-05-18 19:42   ` Conor Dooley
2023-05-18 19:42     ` Conor Dooley
2023-05-18 18:45 ` [PATCH v2 6/9] riscv: dts: add initial T-HEAD TH1520 SoC device tree Jisheng Zhang
2023-05-18 18:45   ` Jisheng Zhang
2023-05-18 21:02   ` Conor Dooley
2023-05-18 21:02     ` Conor Dooley
2023-05-26  2:21   ` Yixun Lan
2023-05-26  2:21     ` Yixun Lan
2023-05-18 18:45 ` [PATCH v2 7/9] riscv: dts: thead: add sipeed Lichee Pi 4A board " Jisheng Zhang
2023-05-18 18:45   ` Jisheng Zhang
2023-05-18 21:03   ` Conor Dooley
2023-05-18 21:03     ` Conor Dooley
2023-05-18 18:45 ` [PATCH v2 8/9] MAINTAINERS: add entry for T-HEAD RISC-V SoC Jisheng Zhang
2023-05-18 18:45   ` Jisheng Zhang
2023-05-18 20:57   ` Conor Dooley
2023-05-18 20:57     ` Conor Dooley
2023-05-18 18:45 ` Jisheng Zhang [this message]
2023-05-18 18:45   ` [PATCH v2 9/9] riscv: defconfig: enable T-HEAD SoC Jisheng Zhang
2023-05-18 20:58   ` Conor Dooley
2023-05-18 20:58     ` Conor Dooley
2023-05-19 20:56   ` Palmer Dabbelt
2023-05-19 20:56     ` Palmer Dabbelt
2023-05-20  1:16     ` Guo Ren
2023-05-20  1:16       ` Guo Ren
2023-05-26  2:19 ` [PATCH v2 0/9] Add Sipeed Lichee Pi 4A RISC-V board support Yixun Lan
2023-05-26  2:19   ` Yixun Lan

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