From: Jisheng Zhang <jszhang@kernel.org>
To: Thomas Gleixner <tglx@linutronix.de>,
Marc Zyngier <maz@kernel.org>, Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Conor Dooley <conor+dt@kernel.org>,
Palmer Dabbelt <palmer@dabbelt.com>,
Paul Walmsley <paul.walmsley@sifive.com>,
Albert Ou <aou@eecs.berkeley.edu>, Guo Ren <guoren@kernel.org>
Cc: devicetree@vger.kernel.org, Yangtao Li <frank.li@vivo.com>,
linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org,
Wei Fu <wefu@redhat.com>
Subject: [PATCH v2 2/9] dt-bindings: timer: Add T-HEAD TH1520 clint
Date: Fri, 19 May 2023 02:45:34 +0800 [thread overview]
Message-ID: <20230518184541.2627-3-jszhang@kernel.org> (raw)
In-Reply-To: <20230518184541.2627-1-jszhang@kernel.org>
Add compatible string for the T-HEAD TH1520 clint.
Signed-off-by: Jisheng Zhang <jszhang@kernel.org>
---
Documentation/devicetree/bindings/timer/sifive,clint.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/timer/sifive,clint.yaml b/Documentation/devicetree/bindings/timer/sifive,clint.yaml
index 94bef9424df1..388d3385d7eb 100644
--- a/Documentation/devicetree/bindings/timer/sifive,clint.yaml
+++ b/Documentation/devicetree/bindings/timer/sifive,clint.yaml
@@ -37,6 +37,7 @@ properties:
- items:
- enum:
- allwinner,sun20i-d1-clint
+ - thead,th1520-clint
- const: thead,c900-clint
- items:
- const: sifive,clint0
--
2.40.0
_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv
WARNING: multiple messages have this Message-ID (diff)
From: Jisheng Zhang <jszhang@kernel.org>
To: Thomas Gleixner <tglx@linutronix.de>,
Marc Zyngier <maz@kernel.org>, Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Conor Dooley <conor+dt@kernel.org>,
Palmer Dabbelt <palmer@dabbelt.com>,
Paul Walmsley <paul.walmsley@sifive.com>,
Albert Ou <aou@eecs.berkeley.edu>, Guo Ren <guoren@kernel.org>
Cc: linux-kernel@vger.kernel.org, devicetree@vger.kernel.org,
linux-riscv@lists.infradead.org, Yangtao Li <frank.li@vivo.com>,
Wei Fu <wefu@redhat.com>, Icenowy Zheng <uwu@icenowy.me>
Subject: [PATCH v2 2/9] dt-bindings: timer: Add T-HEAD TH1520 clint
Date: Fri, 19 May 2023 02:45:34 +0800 [thread overview]
Message-ID: <20230518184541.2627-3-jszhang@kernel.org> (raw)
In-Reply-To: <20230518184541.2627-1-jszhang@kernel.org>
Add compatible string for the T-HEAD TH1520 clint.
Signed-off-by: Jisheng Zhang <jszhang@kernel.org>
---
Documentation/devicetree/bindings/timer/sifive,clint.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/timer/sifive,clint.yaml b/Documentation/devicetree/bindings/timer/sifive,clint.yaml
index 94bef9424df1..388d3385d7eb 100644
--- a/Documentation/devicetree/bindings/timer/sifive,clint.yaml
+++ b/Documentation/devicetree/bindings/timer/sifive,clint.yaml
@@ -37,6 +37,7 @@ properties:
- items:
- enum:
- allwinner,sun20i-d1-clint
+ - thead,th1520-clint
- const: thead,c900-clint
- items:
- const: sifive,clint0
--
2.40.0
next prev parent reply other threads:[~2023-05-18 18:57 UTC|newest]
Thread overview: 60+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-05-18 18:45 [PATCH v2 0/9] Add Sipeed Lichee Pi 4A RISC-V board support Jisheng Zhang
2023-05-18 18:45 ` Jisheng Zhang
2023-05-18 18:45 ` [PATCH v2 1/9] dt-bindings: interrupt-controller: Add T-HEAD's TH1520 PLIC Jisheng Zhang
2023-05-18 18:45 ` Jisheng Zhang
2023-05-18 19:36 ` Conor Dooley
2023-05-18 19:36 ` Conor Dooley
2023-05-21 13:14 ` Guo Ren
2023-05-21 13:14 ` Guo Ren
2023-05-18 18:45 ` Jisheng Zhang [this message]
2023-05-18 18:45 ` [PATCH v2 2/9] dt-bindings: timer: Add T-HEAD TH1520 clint Jisheng Zhang
2023-05-18 19:37 ` Conor Dooley
2023-05-18 19:37 ` Conor Dooley
2023-05-18 18:45 ` [PATCH v2 3/9] dt-bindings: riscv: Add T-HEAD TH1520 board compatibles Jisheng Zhang
2023-05-18 18:45 ` Jisheng Zhang
2023-05-18 19:40 ` Conor Dooley
2023-05-18 19:40 ` Conor Dooley
2023-05-19 15:50 ` Icenowy Zheng
2023-05-19 15:50 ` Icenowy Zheng
2023-05-18 18:45 ` [PATCH v2 4/9] dt-binding: riscv: add T-HEAD CPU reset Jisheng Zhang
2023-05-18 18:45 ` Jisheng Zhang
2023-05-18 19:39 ` Rob Herring
2023-05-18 19:39 ` Rob Herring
2023-05-18 19:53 ` Conor Dooley
2023-05-18 19:53 ` Conor Dooley
2023-05-22 2:16 ` Guo Ren
2023-05-22 2:16 ` Guo Ren
2023-05-22 7:09 ` Conor Dooley
2023-05-22 7:09 ` Conor Dooley
2023-05-22 7:42 ` Guo Ren
2023-05-22 7:42 ` Guo Ren
2023-05-30 12:55 ` Krzysztof Kozlowski
2023-05-30 12:55 ` Krzysztof Kozlowski
2023-05-18 18:45 ` [PATCH v2 5/9] riscv: Add the T-HEAD SoC family Kconfig option Jisheng Zhang
2023-05-18 18:45 ` Jisheng Zhang
2023-05-18 19:42 ` Conor Dooley
2023-05-18 19:42 ` Conor Dooley
2023-05-18 18:45 ` [PATCH v2 6/9] riscv: dts: add initial T-HEAD TH1520 SoC device tree Jisheng Zhang
2023-05-18 18:45 ` Jisheng Zhang
2023-05-18 21:02 ` Conor Dooley
2023-05-18 21:02 ` Conor Dooley
2023-05-26 2:21 ` Yixun Lan
2023-05-26 2:21 ` Yixun Lan
2023-05-18 18:45 ` [PATCH v2 7/9] riscv: dts: thead: add sipeed Lichee Pi 4A board " Jisheng Zhang
2023-05-18 18:45 ` Jisheng Zhang
2023-05-18 21:03 ` Conor Dooley
2023-05-18 21:03 ` Conor Dooley
2023-05-18 18:45 ` [PATCH v2 8/9] MAINTAINERS: add entry for T-HEAD RISC-V SoC Jisheng Zhang
2023-05-18 18:45 ` Jisheng Zhang
2023-05-18 20:57 ` Conor Dooley
2023-05-18 20:57 ` Conor Dooley
2023-05-18 18:45 ` [PATCH v2 9/9] riscv: defconfig: enable T-HEAD SoC Jisheng Zhang
2023-05-18 18:45 ` Jisheng Zhang
2023-05-18 20:58 ` Conor Dooley
2023-05-18 20:58 ` Conor Dooley
2023-05-19 20:56 ` Palmer Dabbelt
2023-05-19 20:56 ` Palmer Dabbelt
2023-05-20 1:16 ` Guo Ren
2023-05-20 1:16 ` Guo Ren
2023-05-26 2:19 ` [PATCH v2 0/9] Add Sipeed Lichee Pi 4A RISC-V board support Yixun Lan
2023-05-26 2:19 ` Yixun Lan
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20230518184541.2627-3-jszhang@kernel.org \
--to=jszhang@kernel.org \
--cc=aou@eecs.berkeley.edu \
--cc=conor+dt@kernel.org \
--cc=devicetree@vger.kernel.org \
--cc=frank.li@vivo.com \
--cc=guoren@kernel.org \
--cc=krzysztof.kozlowski+dt@linaro.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-riscv@lists.infradead.org \
--cc=maz@kernel.org \
--cc=palmer@dabbelt.com \
--cc=paul.walmsley@sifive.com \
--cc=robh+dt@kernel.org \
--cc=tglx@linutronix.de \
--cc=wefu@redhat.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.