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From: Brad Larson <blarson@amd.com>
To: <arnd@arndb.de>
Cc: <adrian.hunter@intel.com>, <alcooperx@gmail.com>,
	<andy.shevchenko@gmail.com>, <blarson@amd.com>,
	<brendan.higgins@linux.dev>, <briannorris@chromium.org>,
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	<j.neuschaefer@gmx.net>, <joel@jms.id.au>, <kernel@esmil.dk>,
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	<rdunlap@infradead.org>, <robh+dt@kernel.org>,
	<samuel@sholland.org>, <skhan@linuxfoundation.org>,
	<suravee.suthikulpanit@amd.com>, <thomas.lendacky@amd.com>,
	<tonyhuang.sunplus@gmail.com>, <ulf.hansson@linaro.org>,
	<vaishnav.a@ti.com>, <walker.chen@starfivetech.com>,
	<will@kernel.org>, <zhuyinbo@loongson.cn>
Subject: Re: [PATCH v14 8/8] soc: amd: Add support for AMD Pensando SoC Controller
Date: Tue, 23 May 2023 15:11:32 -0700	[thread overview]
Message-ID: <20230523221132.64464-1-blarson@amd.com> (raw)
In-Reply-To: <bc5118f2-8982-46ff-bc75-d0c71475e909@app.fastmail.com>

Hi Arnd,

> On Mon, May 15, 2023, at 20:16, Brad Larson wrote:
>> The Pensando SoC controller is a SPI connected companion device
>> that is present in all Pensando SoC board designs.  The essential
>> board management registers are accessed on chip select 0 with
>> board mgmt IO support accessed using additional chip selects.
>>
>> Signed-off-by: Brad Larson <blarson@amd.com>
>
> Hi Brad,
>
> I'm sorry I wasn't paying enough attention to this driver as the
> past 13 revisions went by.
>
No worries, bit of a saga.  See explanation below.

>> v10 changes:
>> - Different driver implementation specific to this Pensando controller device.
>> - Moved to soc/amd directory under new name based on guidance.  This driver is
>>   of no use to any design other than all Pensando SoC based cards.
>> - Removed use of builtin_driver, can be built as a module.
>
> it looks like this was a fundamental change that I failed to see.

See explanation below.

>> +# SPDX-License-Identifier: GPL-2.0-only
>> +menu "AMD Pensando SoC drivers"
>> +
>> +config AMD_PENSANDO_CTRL
>> +	tristate "AMD Pensando SoC Controller"
>> +	depends on SPI_MASTER=y
>> +	depends on (ARCH_PENSANDO && OF) || COMPILE_TEST
>> +	default ARCH_PENSANDO
>> +	select REGMAP_SPI
>> +	select MFD_SYSCON
>> +	help
>> +	  Enables AMD Pensando SoC controller device support.  This is a SPI
>> +	  attached companion device in all Pensando SoC board designs which
>> +	  provides essential board control/status registers and management IO
>> +	  support.
>
> So generally speaking, I don't want custom user interfaces in
> drivers/soc. It looks like this one has internal interfaces for
> a reset controller and the regmap, so those parts are fine, but
> I'm confused about the purpose of the ioctl interface:
>
>> +static long
>> +penctrl_ioctl(struct file *filp, unsigned int cmd, unsigned long arg)
>> +{
>
>> +	if (num_msgs > 1) {
>> +		msg++;
>> +		if (msg->len > PENCTRL_MAX_MSG_LEN) {
>> +			ret = -EINVAL;
>> +			goto out_unlock;
>> +		}
>> +		t[1].rx_buf = rx_buf;
>> +		t[1].len = msg->len;
>> +	}
>> +	spi_message_init_with_transfers(&m, t, num_msgs);
>
> This seems to be just a passthrough of user space messages, which
> is what the spidev driver already provides, but using a different
> ioctl interface. I don't really want any user-level interfaces
> in drivers/soc as a rule, but having one that duplicates existing
> functionality seems particularly wrong.
>
> Can you explain what the purpose is? Is this about serializing
> access between the in-kernel reset control and the user-side
> access?
>
> Also, can you explain why this needs a low-lever user interface
> in the first place, rather than something that can be expressed
> using high-level abstractions as you already do with the reset
> control?
>
> All of the above should be part of the changelog text to get a
> driver like this merged. I don't think we can get a quick
> solution here though, so maybe you can start by removing the
> ioctl side and having the rest of the driver in drivers/reset?

In the original patchset I added a pensando compatible to spidev and that
was nacked in review and reusing some random compatible that made it into 
spidev was just wrong.  Further it was recommended this should be a system 
specific driver and don't rely on a debug driver like spidev.  I changed 
over to a platform specific driver and at that time I also needed to include 
a reset controller (emmc reset only).  I put these in drivers/mfd and 
drivers/reset.  Review of the device tree for this approach went back and 
forth to _not_ have four child nodes on the spi device each with the same 
compatible. Decision was to squash the child nodes into the parent and put 
the reset-controller there also.  One driver and since its pensando
specific its currently in drivers/soc/amd.

There are five different user processes and some utilities that access the 
functionality in the cpld/fpga.  You're correct, its passing messages that 
are specific to the IP accessed via chip-select.  No Elba system will boot 
without this driver providing ioctl access.

Regards,
Brad

WARNING: multiple messages have this Message-ID (diff)
From: Brad Larson <blarson@amd.com>
To: <arnd@arndb.de>
Cc: <adrian.hunter@intel.com>, <alcooperx@gmail.com>,
	<andy.shevchenko@gmail.com>, <blarson@amd.com>,
	<brendan.higgins@linux.dev>, <briannorris@chromium.org>,
	<broonie@kernel.org>, <catalin.marinas@arm.com>,
	<conor+dt@kernel.org>, <davidgow@google.com>,
	<devicetree@vger.kernel.org>, <fancer.lancer@gmail.com>,
	<gerg@linux-m68k.org>, <gsomlo@gmail.com>,
	<hal.feng@starfivetech.com>, <hasegawa-hitomi@fujitsu.com>,
	<j.neuschaefer@gmx.net>, <joel@jms.id.au>, <kernel@esmil.dk>,
	<krzk@kernel.org>, <krzysztof.kozlowski+dt@linaro.org>,
	<lee.jones@linaro.org>, <lee@kernel.org>,
	<linux-arm-kernel@lists.infradead.org>,
	<linux-kernel@vger.kernel.org>, <linux-mmc@vger.kernel.org>,
	<linux-spi@vger.kernel.org>, <p.zabel@pengutronix.de>,
	<rdunlap@infradead.org>, <robh+dt@kernel.org>,
	<samuel@sholland.org>, <skhan@linuxfoundation.org>,
	<suravee.suthikulpanit@amd.com>, <thomas.lendacky@amd.com>,
	<tonyhuang.sunplus@gmail.com>, <ulf.hansson@linaro.org>,
	<vaishnav.a@ti.com>, <walker.chen@starfivetech.com>,
	<will@kernel.org>, <zhuyinbo@loongson.cn>
Subject: Re: [PATCH v14 8/8] soc: amd: Add support for AMD Pensando SoC Controller
Date: Tue, 23 May 2023 15:11:32 -0700	[thread overview]
Message-ID: <20230523221132.64464-1-blarson@amd.com> (raw)
In-Reply-To: <bc5118f2-8982-46ff-bc75-d0c71475e909@app.fastmail.com>

Hi Arnd,

> On Mon, May 15, 2023, at 20:16, Brad Larson wrote:
>> The Pensando SoC controller is a SPI connected companion device
>> that is present in all Pensando SoC board designs.  The essential
>> board management registers are accessed on chip select 0 with
>> board mgmt IO support accessed using additional chip selects.
>>
>> Signed-off-by: Brad Larson <blarson@amd.com>
>
> Hi Brad,
>
> I'm sorry I wasn't paying enough attention to this driver as the
> past 13 revisions went by.
>
No worries, bit of a saga.  See explanation below.

>> v10 changes:
>> - Different driver implementation specific to this Pensando controller device.
>> - Moved to soc/amd directory under new name based on guidance.  This driver is
>>   of no use to any design other than all Pensando SoC based cards.
>> - Removed use of builtin_driver, can be built as a module.
>
> it looks like this was a fundamental change that I failed to see.

See explanation below.

>> +# SPDX-License-Identifier: GPL-2.0-only
>> +menu "AMD Pensando SoC drivers"
>> +
>> +config AMD_PENSANDO_CTRL
>> +	tristate "AMD Pensando SoC Controller"
>> +	depends on SPI_MASTER=y
>> +	depends on (ARCH_PENSANDO && OF) || COMPILE_TEST
>> +	default ARCH_PENSANDO
>> +	select REGMAP_SPI
>> +	select MFD_SYSCON
>> +	help
>> +	  Enables AMD Pensando SoC controller device support.  This is a SPI
>> +	  attached companion device in all Pensando SoC board designs which
>> +	  provides essential board control/status registers and management IO
>> +	  support.
>
> So generally speaking, I don't want custom user interfaces in
> drivers/soc. It looks like this one has internal interfaces for
> a reset controller and the regmap, so those parts are fine, but
> I'm confused about the purpose of the ioctl interface:
>
>> +static long
>> +penctrl_ioctl(struct file *filp, unsigned int cmd, unsigned long arg)
>> +{
>
>> +	if (num_msgs > 1) {
>> +		msg++;
>> +		if (msg->len > PENCTRL_MAX_MSG_LEN) {
>> +			ret = -EINVAL;
>> +			goto out_unlock;
>> +		}
>> +		t[1].rx_buf = rx_buf;
>> +		t[1].len = msg->len;
>> +	}
>> +	spi_message_init_with_transfers(&m, t, num_msgs);
>
> This seems to be just a passthrough of user space messages, which
> is what the spidev driver already provides, but using a different
> ioctl interface. I don't really want any user-level interfaces
> in drivers/soc as a rule, but having one that duplicates existing
> functionality seems particularly wrong.
>
> Can you explain what the purpose is? Is this about serializing
> access between the in-kernel reset control and the user-side
> access?
>
> Also, can you explain why this needs a low-lever user interface
> in the first place, rather than something that can be expressed
> using high-level abstractions as you already do with the reset
> control?
>
> All of the above should be part of the changelog text to get a
> driver like this merged. I don't think we can get a quick
> solution here though, so maybe you can start by removing the
> ioctl side and having the rest of the driver in drivers/reset?

In the original patchset I added a pensando compatible to spidev and that
was nacked in review and reusing some random compatible that made it into 
spidev was just wrong.  Further it was recommended this should be a system 
specific driver and don't rely on a debug driver like spidev.  I changed 
over to a platform specific driver and at that time I also needed to include 
a reset controller (emmc reset only).  I put these in drivers/mfd and 
drivers/reset.  Review of the device tree for this approach went back and 
forth to _not_ have four child nodes on the spi device each with the same 
compatible. Decision was to squash the child nodes into the parent and put 
the reset-controller there also.  One driver and since its pensando
specific its currently in drivers/soc/amd.

There are five different user processes and some utilities that access the 
functionality in the cpld/fpga.  You're correct, its passing messages that 
are specific to the IP accessed via chip-select.  No Elba system will boot 
without this driver providing ioctl access.

Regards,
Brad

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

  reply	other threads:[~2023-05-23 22:11 UTC|newest]

Thread overview: 58+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-05-15 18:15 [PATCH v14 0/8] Support AMD Pensando Elba SoC Brad Larson
2023-05-15 18:15 ` Brad Larson
2023-05-15 18:15 ` [PATCH v14 1/8] dt-bindings: arm: add AMD Pensando boards Brad Larson
2023-05-15 18:15   ` Brad Larson
2023-05-15 18:16 ` [PATCH v14 2/8] dt-bindings: spi: cdns: Add compatible for AMD Pensando Elba SoC Brad Larson
2023-05-15 18:16   ` Brad Larson
2023-05-16 15:18   ` Mark Brown
2023-05-16 15:18     ` Mark Brown
2023-05-15 18:16 ` [PATCH v14 3/8] dt-bindings: soc: amd: amd,pensando-elba-ctrl: Add Pensando SoC Controller Brad Larson
2023-05-15 18:16   ` Brad Larson
2023-05-15 18:16 ` [PATCH v14 4/8] MAINTAINERS: Add entry for AMD PENSANDO Brad Larson
2023-05-15 18:16   ` Brad Larson
2023-05-15 18:16 ` [PATCH v14 5/8] arm64: Add config for AMD Pensando SoC platforms Brad Larson
2023-05-15 18:16   ` Brad Larson
2023-05-15 18:16 ` [PATCH v14 6/8] arm64: dts: Add AMD Pensando Elba SoC support Brad Larson
2023-05-15 18:16   ` Brad Larson
2023-05-16  7:17   ` Krzysztof Kozlowski
2023-05-16  7:17     ` Krzysztof Kozlowski
2023-05-16  7:54   ` Michal Simek
2023-05-16  7:54     ` Michal Simek
2023-05-23 19:28     ` Brad Larson
2023-05-23 19:28       ` Brad Larson
2023-05-24 11:52       ` Geert Uytterhoeven
2023-05-24 11:52         ` Geert Uytterhoeven
2023-05-30 22:03         ` Brad Larson
2023-05-30 22:03           ` Brad Larson
2023-05-31 13:09           ` Geert Uytterhoeven
2023-05-31 13:09             ` Geert Uytterhoeven
2023-06-05 23:52             ` Brad Larson
2023-06-05 23:52               ` Brad Larson
2023-05-15 18:16 ` [PATCH v14 7/8] spi: cadence-quadspi: Add compatible for AMD Pensando Elba SoC Brad Larson
2023-05-15 18:16   ` Brad Larson
2023-05-15 18:16 ` [PATCH v14 8/8] soc: amd: Add support for AMD Pensando SoC Controller Brad Larson
2023-05-15 18:16   ` Brad Larson
2023-05-15 21:05   ` Andy Shevchenko
2023-05-15 21:05     ` Andy Shevchenko
2023-05-23  2:12     ` Brad Larson
2023-05-23  2:12       ` Brad Larson
2023-05-16  5:19   ` Mahapatra, Amit Kumar
2023-05-16  5:19     ` Mahapatra, Amit Kumar
2023-05-16  7:36     ` Michal Simek
2023-05-16  7:36       ` Michal Simek
2023-05-17 11:14       ` Geert Uytterhoeven
2023-05-17 11:14         ` Geert Uytterhoeven
2023-05-16  8:45   ` kernel test robot
2023-05-16  8:45     ` kernel test robot
2023-05-16 11:03   ` Arnd Bergmann
2023-05-16 11:03     ` Arnd Bergmann
2023-05-23 22:11     ` Brad Larson [this message]
2023-05-23 22:11       ` Brad Larson
2023-05-24 12:41       ` Arnd Bergmann
2023-05-24 12:41         ` Arnd Bergmann
2023-08-07 22:17         ` Brad Larson
2023-08-07 22:17           ` Brad Larson
2023-05-16  7:14 ` [PATCH v14 0/8] Support AMD Pensando Elba SoC Krzysztof Kozlowski
2023-05-16  7:14   ` Krzysztof Kozlowski
2023-05-17 14:43 ` (subset) " Mark Brown
2023-05-17 14:43   ` Mark Brown

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