From: Brad Larson <blarson@amd.com>
To: <geert@linux-m68k.org>
Cc: <adrian.hunter@intel.com>, <alcooperx@gmail.com>,
<andy.shevchenko@gmail.com>, <arnd@arndb.de>, <blarson@amd.com>,
<brendan.higgins@linux.dev>, <briannorris@chromium.org>,
<broonie@kernel.org>, <catalin.marinas@arm.com>,
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<j.neuschaefer@gmx.net>, <joel@jms.id.au>, <kernel@esmil.dk>,
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<p.zabel@pengutronix.de>, <rdunlap@infradead.org>,
<robh+dt@kernel.org>, <samuel@sholland.org>,
<skhan@linuxfoundation.org>, <suravee.suthikulpanit@amd.com>,
<thomas.lendacky@amd.com>, <tonyhuang.sunplus@gmail.com>,
<ulf.hansson@linaro.org>, <vaishnav.a@ti.com>,
<walker.chen@starfivetech.com>, <will@kernel.org>,
<zhuyinbo@loongson.cn>
Subject: Re: [PATCH v14 6/8] arm64: dts: Add AMD Pensando Elba SoC support
Date: Mon, 5 Jun 2023 16:52:02 -0700 [thread overview]
Message-ID: <20230605235202.15670-1-blarson@amd.com> (raw)
In-Reply-To: <CAMuHMdWQGEoB_LLsfLurOV8fT0BO-RYGcsS_Gra49CPiGH9J=g@mail.gmail.com>
Hi Geert,
On Wed, May 31, 2023 at 15:09 Geert Uytterhoeven <geert@linux-m68k.org> wrote:
> On Wed, May 31, 2023 at 12:04 AM Brad Larson <blarson@amd.com> wrote:
>> On Wed, May 24, 2023 at 13:52 Geert Uytterhoeven <geert@linux-m68k.org> wrote:
>> > On Tue, May 23, 2023 at 9:30 PM Brad Larson <blarson@amd.com> wrote:
>> >> On 5/16/23 09:54, Michal Simek wrote:
>> >> > On 5/15/23 20:16, Brad Larson wrote:
...
>> >> >> + /* CLUSTER 0 */
>> >> >> + cpu0: cpu@0 {
>> >> >> + device_type = "cpu";
>> >> >> + compatible = "arm,cortex-a72";
>> >> >> + reg = <0 0x0>;
>> >> >
>> >> > Do you really need 2/0 split here. The first cell is 0 anyway.
>> >>
>> >> Yes following 64-bit system definition
>> >
>> > You mean for the 64-bit main address space?
>> > The CPU address space under /cpus is unrelated.
>>
>> Yes, the reg prop for this node is CPU/threads per dt spec. Checked the history and
>> the Elba dt was derived from socionext for these nodes and this is how those device
>> trees are configured along with over a dozen other devices. I changed to
>> address-cells = <1> and dropped the leading zero from all cpu* reg<> and booting
>> the system I'm observing no change. Looking in drivers/of I'm not seeing where
>> cpu*/reg is read and used, any recommendation?
>
> drivers/of/cpu.c
>
> Looks like there are lots of DTS files that use #address-cells = <2> for
> CPU nodes :-(
>
> git grep -w -A1 cpus -- "*dts*" | grep address-cells | grep "<2>"
>
> I would use <1> is the first cell is always zero...
I'll do that. Tha variation across DTS is likely coming from ~5.10 devicetree/bindings/arm/cpus.txt
- #address-cells
...
# On ARM v8 64-bit systems value should be set to 2,
that corresponds to the MPIDR_EL1 register size.
If MPIDR_EL1[63:32] value is equal to 0 on all CPUs
in the system, #address-cells can be set to 1, since
MPIDR_EL1[63:32] bits are not used for CPUs
identification.
where the size of MPIDR_EL1 register is 2 for Elba cores. However the shorthand is
allowed if MPIDR_EL1[63:32] bita are not used.
Latest version:
On ARM v8 64-bit systems this property is required
and matches the MPIDR_EL1 register affinity bits.
* If cpus node's #address-cells property is set to 2
The first reg cell bits [7:0] must be set to
bits [39:32] of MPIDR_EL1.
The second reg cell bits [23:0] must be set to
bits [23:0] of MPIDR_EL1.
* If cpus node's #address-cells property is set to 1
The reg cell bits [23:0] must be set to bits [23:0]
of MPIDR_EL1.
All other bits in the reg cells must be set to 0.
Regards,
Brad
WARNING: multiple messages have this Message-ID (diff)
From: Brad Larson <blarson@amd.com>
To: <geert@linux-m68k.org>
Cc: <adrian.hunter@intel.com>, <alcooperx@gmail.com>,
<andy.shevchenko@gmail.com>, <arnd@arndb.de>, <blarson@amd.com>,
<brendan.higgins@linux.dev>, <briannorris@chromium.org>,
<broonie@kernel.org>, <catalin.marinas@arm.com>,
<conor+dt@kernel.org>, <davidgow@google.com>,
<devicetree@vger.kernel.org>, <fancer.lancer@gmail.com>,
<gerg@linux-m68k.org>, <gsomlo@gmail.com>,
<hal.feng@starfivetech.com>, <hasegawa-hitomi@fujitsu.com>,
<j.neuschaefer@gmx.net>, <joel@jms.id.au>, <kernel@esmil.dk>,
<krzk@kernel.org>, <krzysztof.kozlowski+dt@linaro.org>,
<lee.jones@linaro.org>, <lee@kernel.org>,
<linux-arm-kernel@lists.infradead.org>,
<linux-kernel@vger.kernel.org>, <linux-mmc@vger.kernel.org>,
<linux-spi@vger.kernel.org>, <michal.simek@amd.com>,
<p.zabel@pengutronix.de>, <rdunlap@infradead.org>,
<robh+dt@kernel.org>, <samuel@sholland.org>,
<skhan@linuxfoundation.org>, <suravee.suthikulpanit@amd.com>,
<thomas.lendacky@amd.com>, <tonyhuang.sunplus@gmail.com>,
<ulf.hansson@linaro.org>, <vaishnav.a@ti.com>,
<walker.chen@starfivetech.com>, <will@kernel.org>,
<zhuyinbo@loongson.cn>
Subject: Re: [PATCH v14 6/8] arm64: dts: Add AMD Pensando Elba SoC support
Date: Mon, 5 Jun 2023 16:52:02 -0700 [thread overview]
Message-ID: <20230605235202.15670-1-blarson@amd.com> (raw)
In-Reply-To: <CAMuHMdWQGEoB_LLsfLurOV8fT0BO-RYGcsS_Gra49CPiGH9J=g@mail.gmail.com>
Hi Geert,
On Wed, May 31, 2023 at 15:09 Geert Uytterhoeven <geert@linux-m68k.org> wrote:
> On Wed, May 31, 2023 at 12:04 AM Brad Larson <blarson@amd.com> wrote:
>> On Wed, May 24, 2023 at 13:52 Geert Uytterhoeven <geert@linux-m68k.org> wrote:
>> > On Tue, May 23, 2023 at 9:30 PM Brad Larson <blarson@amd.com> wrote:
>> >> On 5/16/23 09:54, Michal Simek wrote:
>> >> > On 5/15/23 20:16, Brad Larson wrote:
...
>> >> >> + /* CLUSTER 0 */
>> >> >> + cpu0: cpu@0 {
>> >> >> + device_type = "cpu";
>> >> >> + compatible = "arm,cortex-a72";
>> >> >> + reg = <0 0x0>;
>> >> >
>> >> > Do you really need 2/0 split here. The first cell is 0 anyway.
>> >>
>> >> Yes following 64-bit system definition
>> >
>> > You mean for the 64-bit main address space?
>> > The CPU address space under /cpus is unrelated.
>>
>> Yes, the reg prop for this node is CPU/threads per dt spec. Checked the history and
>> the Elba dt was derived from socionext for these nodes and this is how those device
>> trees are configured along with over a dozen other devices. I changed to
>> address-cells = <1> and dropped the leading zero from all cpu* reg<> and booting
>> the system I'm observing no change. Looking in drivers/of I'm not seeing where
>> cpu*/reg is read and used, any recommendation?
>
> drivers/of/cpu.c
>
> Looks like there are lots of DTS files that use #address-cells = <2> for
> CPU nodes :-(
>
> git grep -w -A1 cpus -- "*dts*" | grep address-cells | grep "<2>"
>
> I would use <1> is the first cell is always zero...
I'll do that. Tha variation across DTS is likely coming from ~5.10 devicetree/bindings/arm/cpus.txt
- #address-cells
...
# On ARM v8 64-bit systems value should be set to 2,
that corresponds to the MPIDR_EL1 register size.
If MPIDR_EL1[63:32] value is equal to 0 on all CPUs
in the system, #address-cells can be set to 1, since
MPIDR_EL1[63:32] bits are not used for CPUs
identification.
where the size of MPIDR_EL1 register is 2 for Elba cores. However the shorthand is
allowed if MPIDR_EL1[63:32] bita are not used.
Latest version:
On ARM v8 64-bit systems this property is required
and matches the MPIDR_EL1 register affinity bits.
* If cpus node's #address-cells property is set to 2
The first reg cell bits [7:0] must be set to
bits [39:32] of MPIDR_EL1.
The second reg cell bits [23:0] must be set to
bits [23:0] of MPIDR_EL1.
* If cpus node's #address-cells property is set to 1
The reg cell bits [23:0] must be set to bits [23:0]
of MPIDR_EL1.
All other bits in the reg cells must be set to 0.
Regards,
Brad
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2023-06-05 23:52 UTC|newest]
Thread overview: 58+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-05-15 18:15 [PATCH v14 0/8] Support AMD Pensando Elba SoC Brad Larson
2023-05-15 18:15 ` Brad Larson
2023-05-15 18:15 ` [PATCH v14 1/8] dt-bindings: arm: add AMD Pensando boards Brad Larson
2023-05-15 18:15 ` Brad Larson
2023-05-15 18:16 ` [PATCH v14 2/8] dt-bindings: spi: cdns: Add compatible for AMD Pensando Elba SoC Brad Larson
2023-05-15 18:16 ` Brad Larson
2023-05-16 15:18 ` Mark Brown
2023-05-16 15:18 ` Mark Brown
2023-05-15 18:16 ` [PATCH v14 3/8] dt-bindings: soc: amd: amd,pensando-elba-ctrl: Add Pensando SoC Controller Brad Larson
2023-05-15 18:16 ` Brad Larson
2023-05-15 18:16 ` [PATCH v14 4/8] MAINTAINERS: Add entry for AMD PENSANDO Brad Larson
2023-05-15 18:16 ` Brad Larson
2023-05-15 18:16 ` [PATCH v14 5/8] arm64: Add config for AMD Pensando SoC platforms Brad Larson
2023-05-15 18:16 ` Brad Larson
2023-05-15 18:16 ` [PATCH v14 6/8] arm64: dts: Add AMD Pensando Elba SoC support Brad Larson
2023-05-15 18:16 ` Brad Larson
2023-05-16 7:17 ` Krzysztof Kozlowski
2023-05-16 7:17 ` Krzysztof Kozlowski
2023-05-16 7:54 ` Michal Simek
2023-05-16 7:54 ` Michal Simek
2023-05-23 19:28 ` Brad Larson
2023-05-23 19:28 ` Brad Larson
2023-05-24 11:52 ` Geert Uytterhoeven
2023-05-24 11:52 ` Geert Uytterhoeven
2023-05-30 22:03 ` Brad Larson
2023-05-30 22:03 ` Brad Larson
2023-05-31 13:09 ` Geert Uytterhoeven
2023-05-31 13:09 ` Geert Uytterhoeven
2023-06-05 23:52 ` Brad Larson [this message]
2023-06-05 23:52 ` Brad Larson
2023-05-15 18:16 ` [PATCH v14 7/8] spi: cadence-quadspi: Add compatible for AMD Pensando Elba SoC Brad Larson
2023-05-15 18:16 ` Brad Larson
2023-05-15 18:16 ` [PATCH v14 8/8] soc: amd: Add support for AMD Pensando SoC Controller Brad Larson
2023-05-15 18:16 ` Brad Larson
2023-05-15 21:05 ` Andy Shevchenko
2023-05-15 21:05 ` Andy Shevchenko
2023-05-23 2:12 ` Brad Larson
2023-05-23 2:12 ` Brad Larson
2023-05-16 5:19 ` Mahapatra, Amit Kumar
2023-05-16 5:19 ` Mahapatra, Amit Kumar
2023-05-16 7:36 ` Michal Simek
2023-05-16 7:36 ` Michal Simek
2023-05-17 11:14 ` Geert Uytterhoeven
2023-05-17 11:14 ` Geert Uytterhoeven
2023-05-16 8:45 ` kernel test robot
2023-05-16 8:45 ` kernel test robot
2023-05-16 11:03 ` Arnd Bergmann
2023-05-16 11:03 ` Arnd Bergmann
2023-05-23 22:11 ` Brad Larson
2023-05-23 22:11 ` Brad Larson
2023-05-24 12:41 ` Arnd Bergmann
2023-05-24 12:41 ` Arnd Bergmann
2023-08-07 22:17 ` Brad Larson
2023-08-07 22:17 ` Brad Larson
2023-05-16 7:14 ` [PATCH v14 0/8] Support AMD Pensando Elba SoC Krzysztof Kozlowski
2023-05-16 7:14 ` Krzysztof Kozlowski
2023-05-17 14:43 ` (subset) " Mark Brown
2023-05-17 14:43 ` Mark Brown
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