From: Miquel Raynal <miquel.raynal@bootlin.com>
To: Arseniy Krasnov <avkrasnov@sberdevices.ru>
Cc: Liang Yang <liang.yang@amlogic.com>,
Richard Weinberger <richard@nod.at>,
Vignesh Raghavendra <vigneshr@ti.com>,
Neil Armstrong <neil.armstrong@linaro.org>,
Kevin Hilman <khilman@baylibre.com>,
Jerome Brunet <jbrunet@baylibre.com>,
Martin Blumenstingl <martin.blumenstingl@googlemail.com>,
<oxffffaa@gmail.com>, <kernel@sberdevices.ru>,
<linux-mtd@lists.infradead.org>,
<linux-arm-kernel@lists.infradead.org>,
<linux-amlogic@lists.infradead.org>,
<linux-kernel@vger.kernel.org>
Subject: Re: [RFC PATCH v5 2/6] mtd: rawnand: meson: wait for command in polling mode
Date: Tue, 6 Jun 2023 14:11:45 +0200 [thread overview]
Message-ID: <20230606141145.59e96064@xps-13> (raw)
In-Reply-To: <5c98362c-1808-d7d2-bff8-c2f2f3ae0e89@sberdevices.ru>
Hi Arseniy,
avkrasnov@sberdevices.ru wrote on Tue, 6 Jun 2023 14:49:19 +0300:
> On 05.06.2023 16:30, Liang Yang wrote:
> >
> >
> > On 2023/6/5 21:19, Liang Yang wrote:
> >> Hi Miquel and Arseniy,
> >>
> >>
> >> On 2023/6/5 17:05, Miquel Raynal wrote:
> >>> [ EXTERNAL EMAIL ]
> >>>
> >>> Hi Arseniy,
> >>>
> >>>>>> @@ -1412,6 +1419,8 @@ static int meson_nfc_probe(struct platform_device *pdev)
> >>>>>> return ret;
> >>>>>> }
> >>>>>>
> >>>>>> + nfc->use_polling = of_property_read_bool(dev->of_node, "polling");
> >>>>>
> >>>>> This is a problem. You cannot add a polling property like that.
> >>>>>
> >>>>> There is already a nand-rb property which is supposed to carry how are
> >>>>> wired the RB lines. I don't see any in-tree users of the compatibles, I
> >>>>> don't know how acceptable it is to consider using soft fallback when
> >>>>> this property is missing, otherwise take the values of the rb lines
> >>>>> provided in the DT and user hardware control, but I would definitely
> >>>>> prefer that.
> >>>>
> >>>> I see. So i need to implement processing of this property here? And if it
> >>>> is missed -> use software waiting. I think interesting thing will be that:
> >>>>
> >>>> 1) Even with support of this property here, I really don't know how to pass
> >>>> RB values to this controller - I just have define for RB command and that's
> >>>> it. I found that this property is an array of u32 - IIUC each element is
> >>>> RB pin per chip. May be i need to dive into the old vendor's driver to find
> >>>> how to use RB values (although this driver uses software waiting so I'm not
> >>>> sure that I'll find something in it).
> >>>
> >>> Liang, can you please give use the relevant information here? How do we
> >>> target RB0 and RB1? It seems like you use the CS as only information
> >>> like if the RB lines where hardwired internally to a CS. Can we invert
> >>> the lines with a specific configuration?
> >>
> >> Controllor has only one external RB pinmux (NAND_RB0). all the RB pins
> >> of different CEs need to be bound into one wire and connect with
> >> NAND_RB0 if want to use controller polling rb. the current operating
> >> CE of NAND is decided to "chip_select", of course controller internally has different nfc commands to regconize which Ce's RB signal is polling.
> >>
> >> <&nand_pins> in dts/yaml should include the NAND_RB0 if hardware connects, or use software polling here.
> >>
> >> @Arseniy, sorry, i don't travel all the informations yet. but why don't you use the new RB_INT command with irq that i provided in another thread. the new RB_INT command doesn't depend on the physical RB wires, it also send the READ status command(0x70) and wait for the irq wake up completion.
> >
> > Use "nand-rb" in dts to decide old RB_INT(physical RB wires is needed) or new RB_INT(no physical RB wires). the new RB_INT command decides the RB0 or RB1 by the previous command with ce args.
> >
> >>
> >>> Arseniy, if the answer to my above question is no, then you should
> >>> expect the nand-rb and reg arrays to be identical. If they are not,
> >>> then you can return -EINVAL.
> >>>
> >>> If the nand-rb property is missing, then fallback to software wait.
> >>>
> >>>> 2) I can't test RB mode - I don't have such device :(
> >>>>
> >>>> Also for example in arasan-nand-controller.c parsed 'nand-rb' values are used
> >>>> in controller specific register for waiting (I guess Meson controller has something
> >>>> like that, but I don't have doc). While in marvell_nand.c it looks like that they parse
> >>>> 'nand-rb' property, but never use it.
> >>>
> >>> Yes, the logic around the second RB line (taking care of CS1/CS3) is
> >>> slightly broken or at least badly documented, and thus should not be
> >>> used.
> >>>
> >>>>> In any case you'll need a dt-binding update which must be acked by
> >>>>> dt-binding maintainers.
> >>>>
> >>>> You mean to add this property desc to Documentation/devicetree/bindings/mtd/amlogic,meson-nand.yaml ?
> >>>
> >>> Yes. In a dedicated patch. Something along the lines:
> >>>
> >>> nand-rb: true
> >>>
> >>> inside the nand chip object should be fine. And flag the change as a
> >>> fix because we should have used and parsed this property since the
> >>> beginning.
>
> Miquel,
>
> Small remark, do we really need to add this 'nand-rb' to the chip object, as Liang said,
> that there is only one RB wire (e.g. only one or nothing)? Maybe for Meson I can add it to the
> meson controller structure?
You only need a boolean in the controller structure, I guess.
>
> Thanks, Arseniy
>
> >>>
> >>> Thanks,
> >>> Miquèl
Thanks,
Miquèl
_______________________________________________
linux-amlogic mailing list
linux-amlogic@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-amlogic
WARNING: multiple messages have this Message-ID (diff)
From: Miquel Raynal <miquel.raynal@bootlin.com>
To: Arseniy Krasnov <avkrasnov@sberdevices.ru>
Cc: Liang Yang <liang.yang@amlogic.com>,
Richard Weinberger <richard@nod.at>,
Vignesh Raghavendra <vigneshr@ti.com>,
Neil Armstrong <neil.armstrong@linaro.org>,
Kevin Hilman <khilman@baylibre.com>,
Jerome Brunet <jbrunet@baylibre.com>,
Martin Blumenstingl <martin.blumenstingl@googlemail.com>,
<oxffffaa@gmail.com>, <kernel@sberdevices.ru>,
<linux-mtd@lists.infradead.org>,
<linux-arm-kernel@lists.infradead.org>,
<linux-amlogic@lists.infradead.org>,
<linux-kernel@vger.kernel.org>
Subject: Re: [RFC PATCH v5 2/6] mtd: rawnand: meson: wait for command in polling mode
Date: Tue, 6 Jun 2023 14:11:45 +0200 [thread overview]
Message-ID: <20230606141145.59e96064@xps-13> (raw)
In-Reply-To: <5c98362c-1808-d7d2-bff8-c2f2f3ae0e89@sberdevices.ru>
Hi Arseniy,
avkrasnov@sberdevices.ru wrote on Tue, 6 Jun 2023 14:49:19 +0300:
> On 05.06.2023 16:30, Liang Yang wrote:
> >
> >
> > On 2023/6/5 21:19, Liang Yang wrote:
> >> Hi Miquel and Arseniy,
> >>
> >>
> >> On 2023/6/5 17:05, Miquel Raynal wrote:
> >>> [ EXTERNAL EMAIL ]
> >>>
> >>> Hi Arseniy,
> >>>
> >>>>>> @@ -1412,6 +1419,8 @@ static int meson_nfc_probe(struct platform_device *pdev)
> >>>>>> return ret;
> >>>>>> }
> >>>>>>
> >>>>>> + nfc->use_polling = of_property_read_bool(dev->of_node, "polling");
> >>>>>
> >>>>> This is a problem. You cannot add a polling property like that.
> >>>>>
> >>>>> There is already a nand-rb property which is supposed to carry how are
> >>>>> wired the RB lines. I don't see any in-tree users of the compatibles, I
> >>>>> don't know how acceptable it is to consider using soft fallback when
> >>>>> this property is missing, otherwise take the values of the rb lines
> >>>>> provided in the DT and user hardware control, but I would definitely
> >>>>> prefer that.
> >>>>
> >>>> I see. So i need to implement processing of this property here? And if it
> >>>> is missed -> use software waiting. I think interesting thing will be that:
> >>>>
> >>>> 1) Even with support of this property here, I really don't know how to pass
> >>>> RB values to this controller - I just have define for RB command and that's
> >>>> it. I found that this property is an array of u32 - IIUC each element is
> >>>> RB pin per chip. May be i need to dive into the old vendor's driver to find
> >>>> how to use RB values (although this driver uses software waiting so I'm not
> >>>> sure that I'll find something in it).
> >>>
> >>> Liang, can you please give use the relevant information here? How do we
> >>> target RB0 and RB1? It seems like you use the CS as only information
> >>> like if the RB lines where hardwired internally to a CS. Can we invert
> >>> the lines with a specific configuration?
> >>
> >> Controllor has only one external RB pinmux (NAND_RB0). all the RB pins
> >> of different CEs need to be bound into one wire and connect with
> >> NAND_RB0 if want to use controller polling rb. the current operating
> >> CE of NAND is decided to "chip_select", of course controller internally has different nfc commands to regconize which Ce's RB signal is polling.
> >>
> >> <&nand_pins> in dts/yaml should include the NAND_RB0 if hardware connects, or use software polling here.
> >>
> >> @Arseniy, sorry, i don't travel all the informations yet. but why don't you use the new RB_INT command with irq that i provided in another thread. the new RB_INT command doesn't depend on the physical RB wires, it also send the READ status command(0x70) and wait for the irq wake up completion.
> >
> > Use "nand-rb" in dts to decide old RB_INT(physical RB wires is needed) or new RB_INT(no physical RB wires). the new RB_INT command decides the RB0 or RB1 by the previous command with ce args.
> >
> >>
> >>> Arseniy, if the answer to my above question is no, then you should
> >>> expect the nand-rb and reg arrays to be identical. If they are not,
> >>> then you can return -EINVAL.
> >>>
> >>> If the nand-rb property is missing, then fallback to software wait.
> >>>
> >>>> 2) I can't test RB mode - I don't have such device :(
> >>>>
> >>>> Also for example in arasan-nand-controller.c parsed 'nand-rb' values are used
> >>>> in controller specific register for waiting (I guess Meson controller has something
> >>>> like that, but I don't have doc). While in marvell_nand.c it looks like that they parse
> >>>> 'nand-rb' property, but never use it.
> >>>
> >>> Yes, the logic around the second RB line (taking care of CS1/CS3) is
> >>> slightly broken or at least badly documented, and thus should not be
> >>> used.
> >>>
> >>>>> In any case you'll need a dt-binding update which must be acked by
> >>>>> dt-binding maintainers.
> >>>>
> >>>> You mean to add this property desc to Documentation/devicetree/bindings/mtd/amlogic,meson-nand.yaml ?
> >>>
> >>> Yes. In a dedicated patch. Something along the lines:
> >>>
> >>> nand-rb: true
> >>>
> >>> inside the nand chip object should be fine. And flag the change as a
> >>> fix because we should have used and parsed this property since the
> >>> beginning.
>
> Miquel,
>
> Small remark, do we really need to add this 'nand-rb' to the chip object, as Liang said,
> that there is only one RB wire (e.g. only one or nothing)? Maybe for Meson I can add it to the
> meson controller structure?
You only need a boolean in the controller structure, I guess.
>
> Thanks, Arseniy
>
> >>>
> >>> Thanks,
> >>> Miquèl
Thanks,
Miquèl
______________________________________________________
Linux MTD discussion mailing list
http://lists.infradead.org/mailman/listinfo/linux-mtd/
WARNING: multiple messages have this Message-ID (diff)
From: Miquel Raynal <miquel.raynal@bootlin.com>
To: Arseniy Krasnov <avkrasnov@sberdevices.ru>
Cc: Liang Yang <liang.yang@amlogic.com>,
Richard Weinberger <richard@nod.at>,
Vignesh Raghavendra <vigneshr@ti.com>,
Neil Armstrong <neil.armstrong@linaro.org>,
Kevin Hilman <khilman@baylibre.com>,
Jerome Brunet <jbrunet@baylibre.com>,
Martin Blumenstingl <martin.blumenstingl@googlemail.com>,
<oxffffaa@gmail.com>, <kernel@sberdevices.ru>,
<linux-mtd@lists.infradead.org>,
<linux-arm-kernel@lists.infradead.org>,
<linux-amlogic@lists.infradead.org>,
<linux-kernel@vger.kernel.org>
Subject: Re: [RFC PATCH v5 2/6] mtd: rawnand: meson: wait for command in polling mode
Date: Tue, 6 Jun 2023 14:11:45 +0200 [thread overview]
Message-ID: <20230606141145.59e96064@xps-13> (raw)
In-Reply-To: <5c98362c-1808-d7d2-bff8-c2f2f3ae0e89@sberdevices.ru>
Hi Arseniy,
avkrasnov@sberdevices.ru wrote on Tue, 6 Jun 2023 14:49:19 +0300:
> On 05.06.2023 16:30, Liang Yang wrote:
> >
> >
> > On 2023/6/5 21:19, Liang Yang wrote:
> >> Hi Miquel and Arseniy,
> >>
> >>
> >> On 2023/6/5 17:05, Miquel Raynal wrote:
> >>> [ EXTERNAL EMAIL ]
> >>>
> >>> Hi Arseniy,
> >>>
> >>>>>> @@ -1412,6 +1419,8 @@ static int meson_nfc_probe(struct platform_device *pdev)
> >>>>>> return ret;
> >>>>>> }
> >>>>>>
> >>>>>> + nfc->use_polling = of_property_read_bool(dev->of_node, "polling");
> >>>>>
> >>>>> This is a problem. You cannot add a polling property like that.
> >>>>>
> >>>>> There is already a nand-rb property which is supposed to carry how are
> >>>>> wired the RB lines. I don't see any in-tree users of the compatibles, I
> >>>>> don't know how acceptable it is to consider using soft fallback when
> >>>>> this property is missing, otherwise take the values of the rb lines
> >>>>> provided in the DT and user hardware control, but I would definitely
> >>>>> prefer that.
> >>>>
> >>>> I see. So i need to implement processing of this property here? And if it
> >>>> is missed -> use software waiting. I think interesting thing will be that:
> >>>>
> >>>> 1) Even with support of this property here, I really don't know how to pass
> >>>> RB values to this controller - I just have define for RB command and that's
> >>>> it. I found that this property is an array of u32 - IIUC each element is
> >>>> RB pin per chip. May be i need to dive into the old vendor's driver to find
> >>>> how to use RB values (although this driver uses software waiting so I'm not
> >>>> sure that I'll find something in it).
> >>>
> >>> Liang, can you please give use the relevant information here? How do we
> >>> target RB0 and RB1? It seems like you use the CS as only information
> >>> like if the RB lines where hardwired internally to a CS. Can we invert
> >>> the lines with a specific configuration?
> >>
> >> Controllor has only one external RB pinmux (NAND_RB0). all the RB pins
> >> of different CEs need to be bound into one wire and connect with
> >> NAND_RB0 if want to use controller polling rb. the current operating
> >> CE of NAND is decided to "chip_select", of course controller internally has different nfc commands to regconize which Ce's RB signal is polling.
> >>
> >> <&nand_pins> in dts/yaml should include the NAND_RB0 if hardware connects, or use software polling here.
> >>
> >> @Arseniy, sorry, i don't travel all the informations yet. but why don't you use the new RB_INT command with irq that i provided in another thread. the new RB_INT command doesn't depend on the physical RB wires, it also send the READ status command(0x70) and wait for the irq wake up completion.
> >
> > Use "nand-rb" in dts to decide old RB_INT(physical RB wires is needed) or new RB_INT(no physical RB wires). the new RB_INT command decides the RB0 or RB1 by the previous command with ce args.
> >
> >>
> >>> Arseniy, if the answer to my above question is no, then you should
> >>> expect the nand-rb and reg arrays to be identical. If they are not,
> >>> then you can return -EINVAL.
> >>>
> >>> If the nand-rb property is missing, then fallback to software wait.
> >>>
> >>>> 2) I can't test RB mode - I don't have such device :(
> >>>>
> >>>> Also for example in arasan-nand-controller.c parsed 'nand-rb' values are used
> >>>> in controller specific register for waiting (I guess Meson controller has something
> >>>> like that, but I don't have doc). While in marvell_nand.c it looks like that they parse
> >>>> 'nand-rb' property, but never use it.
> >>>
> >>> Yes, the logic around the second RB line (taking care of CS1/CS3) is
> >>> slightly broken or at least badly documented, and thus should not be
> >>> used.
> >>>
> >>>>> In any case you'll need a dt-binding update which must be acked by
> >>>>> dt-binding maintainers.
> >>>>
> >>>> You mean to add this property desc to Documentation/devicetree/bindings/mtd/amlogic,meson-nand.yaml ?
> >>>
> >>> Yes. In a dedicated patch. Something along the lines:
> >>>
> >>> nand-rb: true
> >>>
> >>> inside the nand chip object should be fine. And flag the change as a
> >>> fix because we should have used and parsed this property since the
> >>> beginning.
>
> Miquel,
>
> Small remark, do we really need to add this 'nand-rb' to the chip object, as Liang said,
> that there is only one RB wire (e.g. only one or nothing)? Maybe for Meson I can add it to the
> meson controller structure?
You only need a boolean in the controller structure, I guess.
>
> Thanks, Arseniy
>
> >>>
> >>> Thanks,
> >>> Miquèl
Thanks,
Miquèl
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
WARNING: multiple messages have this Message-ID (diff)
From: Miquel Raynal <miquel.raynal@bootlin.com>
To: Arseniy Krasnov <avkrasnov@sberdevices.ru>
Cc: Liang Yang <liang.yang@amlogic.com>,
Richard Weinberger <richard@nod.at>,
Vignesh Raghavendra <vigneshr@ti.com>,
Neil Armstrong <neil.armstrong@linaro.org>,
Kevin Hilman <khilman@baylibre.com>,
Jerome Brunet <jbrunet@baylibre.com>,
Martin Blumenstingl <martin.blumenstingl@googlemail.com>,
<oxffffaa@gmail.com>, <kernel@sberdevices.ru>,
<linux-mtd@lists.infradead.org>,
<linux-arm-kernel@lists.infradead.org>,
<linux-amlogic@lists.infradead.org>,
<linux-kernel@vger.kernel.org>
Subject: Re: [RFC PATCH v5 2/6] mtd: rawnand: meson: wait for command in polling mode
Date: Tue, 6 Jun 2023 14:11:45 +0200 [thread overview]
Message-ID: <20230606141145.59e96064@xps-13> (raw)
In-Reply-To: <5c98362c-1808-d7d2-bff8-c2f2f3ae0e89@sberdevices.ru>
Hi Arseniy,
avkrasnov@sberdevices.ru wrote on Tue, 6 Jun 2023 14:49:19 +0300:
> On 05.06.2023 16:30, Liang Yang wrote:
> >
> >
> > On 2023/6/5 21:19, Liang Yang wrote:
> >> Hi Miquel and Arseniy,
> >>
> >>
> >> On 2023/6/5 17:05, Miquel Raynal wrote:
> >>> [ EXTERNAL EMAIL ]
> >>>
> >>> Hi Arseniy,
> >>>
> >>>>>> @@ -1412,6 +1419,8 @@ static int meson_nfc_probe(struct platform_device *pdev)
> >>>>>> return ret;
> >>>>>> }
> >>>>>>
> >>>>>> + nfc->use_polling = of_property_read_bool(dev->of_node, "polling");
> >>>>>
> >>>>> This is a problem. You cannot add a polling property like that.
> >>>>>
> >>>>> There is already a nand-rb property which is supposed to carry how are
> >>>>> wired the RB lines. I don't see any in-tree users of the compatibles, I
> >>>>> don't know how acceptable it is to consider using soft fallback when
> >>>>> this property is missing, otherwise take the values of the rb lines
> >>>>> provided in the DT and user hardware control, but I would definitely
> >>>>> prefer that.
> >>>>
> >>>> I see. So i need to implement processing of this property here? And if it
> >>>> is missed -> use software waiting. I think interesting thing will be that:
> >>>>
> >>>> 1) Even with support of this property here, I really don't know how to pass
> >>>> RB values to this controller - I just have define for RB command and that's
> >>>> it. I found that this property is an array of u32 - IIUC each element is
> >>>> RB pin per chip. May be i need to dive into the old vendor's driver to find
> >>>> how to use RB values (although this driver uses software waiting so I'm not
> >>>> sure that I'll find something in it).
> >>>
> >>> Liang, can you please give use the relevant information here? How do we
> >>> target RB0 and RB1? It seems like you use the CS as only information
> >>> like if the RB lines where hardwired internally to a CS. Can we invert
> >>> the lines with a specific configuration?
> >>
> >> Controllor has only one external RB pinmux (NAND_RB0). all the RB pins
> >> of different CEs need to be bound into one wire and connect with
> >> NAND_RB0 if want to use controller polling rb. the current operating
> >> CE of NAND is decided to "chip_select", of course controller internally has different nfc commands to regconize which Ce's RB signal is polling.
> >>
> >> <&nand_pins> in dts/yaml should include the NAND_RB0 if hardware connects, or use software polling here.
> >>
> >> @Arseniy, sorry, i don't travel all the informations yet. but why don't you use the new RB_INT command with irq that i provided in another thread. the new RB_INT command doesn't depend on the physical RB wires, it also send the READ status command(0x70) and wait for the irq wake up completion.
> >
> > Use "nand-rb" in dts to decide old RB_INT(physical RB wires is needed) or new RB_INT(no physical RB wires). the new RB_INT command decides the RB0 or RB1 by the previous command with ce args.
> >
> >>
> >>> Arseniy, if the answer to my above question is no, then you should
> >>> expect the nand-rb and reg arrays to be identical. If they are not,
> >>> then you can return -EINVAL.
> >>>
> >>> If the nand-rb property is missing, then fallback to software wait.
> >>>
> >>>> 2) I can't test RB mode - I don't have such device :(
> >>>>
> >>>> Also for example in arasan-nand-controller.c parsed 'nand-rb' values are used
> >>>> in controller specific register for waiting (I guess Meson controller has something
> >>>> like that, but I don't have doc). While in marvell_nand.c it looks like that they parse
> >>>> 'nand-rb' property, but never use it.
> >>>
> >>> Yes, the logic around the second RB line (taking care of CS1/CS3) is
> >>> slightly broken or at least badly documented, and thus should not be
> >>> used.
> >>>
> >>>>> In any case you'll need a dt-binding update which must be acked by
> >>>>> dt-binding maintainers.
> >>>>
> >>>> You mean to add this property desc to Documentation/devicetree/bindings/mtd/amlogic,meson-nand.yaml ?
> >>>
> >>> Yes. In a dedicated patch. Something along the lines:
> >>>
> >>> nand-rb: true
> >>>
> >>> inside the nand chip object should be fine. And flag the change as a
> >>> fix because we should have used and parsed this property since the
> >>> beginning.
>
> Miquel,
>
> Small remark, do we really need to add this 'nand-rb' to the chip object, as Liang said,
> that there is only one RB wire (e.g. only one or nothing)? Maybe for Meson I can add it to the
> meson controller structure?
You only need a boolean in the controller structure, I guess.
>
> Thanks, Arseniy
>
> >>>
> >>> Thanks,
> >>> Miquèl
Thanks,
Miquèl
next prev parent reply other threads:[~2023-06-06 12:12 UTC|newest]
Thread overview: 128+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-06-01 6:18 [RFC PATCH v5 0/6] refactoring, fixes and updates for Meson NAND Arseniy Krasnov
2023-06-01 6:18 ` Arseniy Krasnov
2023-06-01 6:18 ` Arseniy Krasnov
2023-06-01 6:18 ` Arseniy Krasnov
2023-06-01 6:18 ` [RFC PATCH v5 1/6] mtd: rawnand: meson: fix ready/busy command Arseniy Krasnov
2023-06-01 6:18 ` Arseniy Krasnov
2023-06-01 6:18 ` Arseniy Krasnov
2023-06-01 6:18 ` Arseniy Krasnov
2023-06-01 7:51 ` Miquel Raynal
2023-06-01 7:51 ` Miquel Raynal
2023-06-01 7:51 ` Miquel Raynal
2023-06-01 7:51 ` Miquel Raynal
2023-06-01 22:44 ` Arseniy Krasnov
2023-06-01 22:44 ` Arseniy Krasnov
2023-06-01 22:44 ` Arseniy Krasnov
2023-06-01 22:44 ` Arseniy Krasnov
2023-06-05 7:08 ` Miquel Raynal
2023-06-05 7:08 ` Miquel Raynal
2023-06-05 7:08 ` Miquel Raynal
2023-06-05 7:08 ` Miquel Raynal
2023-06-01 6:18 ` [RFC PATCH v5 2/6] mtd: rawnand: meson: wait for command in polling mode Arseniy Krasnov
2023-06-01 6:18 ` Arseniy Krasnov
2023-06-01 6:18 ` Arseniy Krasnov
2023-06-01 6:18 ` Arseniy Krasnov
2023-06-01 7:57 ` Arseniy Krasnov
2023-06-01 7:57 ` Arseniy Krasnov
2023-06-01 7:57 ` Arseniy Krasnov
2023-06-01 7:57 ` Arseniy Krasnov
2023-06-01 8:07 ` Miquel Raynal
2023-06-01 8:07 ` Miquel Raynal
2023-06-01 8:07 ` Miquel Raynal
2023-06-01 8:07 ` Miquel Raynal
2023-06-01 23:09 ` Arseniy Krasnov
2023-06-01 23:09 ` Arseniy Krasnov
2023-06-01 23:09 ` Arseniy Krasnov
2023-06-01 23:09 ` Arseniy Krasnov
2023-06-05 9:05 ` Miquel Raynal
2023-06-05 9:05 ` Miquel Raynal
2023-06-05 9:05 ` Miquel Raynal
2023-06-05 9:05 ` Miquel Raynal
2023-06-05 13:19 ` Liang Yang
2023-06-05 13:19 ` Liang Yang
2023-06-05 13:19 ` Liang Yang
2023-06-05 13:19 ` Liang Yang
2023-06-05 13:30 ` Liang Yang
2023-06-05 13:30 ` Liang Yang
2023-06-05 13:30 ` Liang Yang
2023-06-05 13:30 ` Liang Yang
2023-06-05 16:58 ` Arseniy Krasnov
2023-06-05 16:58 ` Arseniy Krasnov
2023-06-05 16:58 ` Arseniy Krasnov
2023-06-05 16:58 ` Arseniy Krasnov
2023-06-06 7:03 ` Miquel Raynal
2023-06-06 7:03 ` Miquel Raynal
2023-06-06 7:03 ` Miquel Raynal
2023-06-06 7:03 ` Miquel Raynal
2023-06-06 7:40 ` Arseniy Krasnov
2023-06-06 7:40 ` Arseniy Krasnov
2023-06-06 7:40 ` Arseniy Krasnov
2023-06-06 7:40 ` Arseniy Krasnov
2023-06-06 7:55 ` Miquel Raynal
2023-06-06 7:55 ` Miquel Raynal
2023-06-06 7:55 ` Miquel Raynal
2023-06-06 7:55 ` Miquel Raynal
2023-06-06 11:49 ` Arseniy Krasnov
2023-06-06 11:49 ` Arseniy Krasnov
2023-06-06 11:49 ` Arseniy Krasnov
2023-06-06 11:49 ` Arseniy Krasnov
2023-06-06 12:11 ` Miquel Raynal [this message]
2023-06-06 12:11 ` Miquel Raynal
2023-06-06 12:11 ` Miquel Raynal
2023-06-06 12:11 ` Miquel Raynal
2023-06-06 12:10 ` Arseniy Krasnov
2023-06-06 12:10 ` Arseniy Krasnov
2023-06-06 12:10 ` Arseniy Krasnov
2023-06-06 12:10 ` Arseniy Krasnov
2023-06-01 6:18 ` [RFC PATCH v5 3/6] mtd: rawnand: meson: only expose unprotected user OOB bytes Arseniy Krasnov
2023-06-01 6:18 ` Arseniy Krasnov
2023-06-01 6:18 ` Arseniy Krasnov
2023-06-01 6:18 ` Arseniy Krasnov
2023-06-01 8:31 ` Miquel Raynal
2023-06-01 8:31 ` Miquel Raynal
2023-06-01 8:31 ` Miquel Raynal
2023-06-01 8:31 ` Miquel Raynal
2023-06-02 8:53 ` Arseniy Krasnov
2023-06-02 8:53 ` Arseniy Krasnov
2023-06-02 8:53 ` Arseniy Krasnov
2023-06-02 8:53 ` Arseniy Krasnov
2023-06-05 9:48 ` Miquel Raynal
2023-06-05 9:48 ` Miquel Raynal
2023-06-05 9:48 ` Miquel Raynal
2023-06-05 9:48 ` Miquel Raynal
2023-06-06 4:42 ` Arseniy Krasnov
2023-06-06 4:42 ` Arseniy Krasnov
2023-06-06 4:42 ` Arseniy Krasnov
2023-06-06 4:42 ` Arseniy Krasnov
2023-06-06 7:11 ` Miquel Raynal
2023-06-06 7:11 ` Miquel Raynal
2023-06-06 7:11 ` Miquel Raynal
2023-06-06 7:11 ` Miquel Raynal
2023-06-06 7:41 ` Arseniy Krasnov
2023-06-06 7:41 ` Arseniy Krasnov
2023-06-06 7:41 ` Arseniy Krasnov
2023-06-06 7:41 ` Arseniy Krasnov
2023-06-01 6:18 ` [RFC PATCH v5 4/6] mtd: rawnand: meson: use macro for OOB area Arseniy Krasnov
2023-06-01 6:18 ` Arseniy Krasnov
2023-06-01 6:18 ` Arseniy Krasnov
2023-06-01 6:18 ` Arseniy Krasnov
2023-06-01 8:34 ` Miquel Raynal
2023-06-01 8:34 ` Miquel Raynal
2023-06-01 8:34 ` Miquel Raynal
2023-06-01 8:34 ` Miquel Raynal
2023-06-01 6:18 ` [RFC PATCH v5 5/6] mtd: rawnand: meson: check buffer length Arseniy Krasnov
2023-06-01 6:18 ` Arseniy Krasnov
2023-06-01 6:18 ` Arseniy Krasnov
2023-06-01 6:18 ` Arseniy Krasnov
2023-06-01 6:18 ` [RFC PATCH v5 6/6] mtd: rawnand: meson: remove unneeded bitwise OR with zeroes Arseniy Krasnov
2023-06-01 6:18 ` Arseniy Krasnov
2023-06-01 6:18 ` Arseniy Krasnov
2023-06-01 6:18 ` Arseniy Krasnov
2023-06-01 7:50 ` [RFC PATCH v5 0/6] refactoring, fixes and updates for Meson NAND Miquel Raynal
2023-06-01 7:50 ` Miquel Raynal
2023-06-01 7:50 ` Miquel Raynal
2023-06-01 7:50 ` Miquel Raynal
2023-06-01 7:51 ` Arseniy Krasnov
2023-06-01 7:51 ` Arseniy Krasnov
2023-06-01 7:51 ` Arseniy Krasnov
2023-06-01 7:51 ` Arseniy Krasnov
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