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From: Miquel Raynal <miquel.raynal@bootlin.com>
To: Mark Brown <broonie@kernel.org>
Cc: Tudor Ambarus <tudor.ambarus@linaro.org>,
	linux-spi@vger.kernel.org,
	Nicolas Ferre <nicolas.ferre@microchip.com>,
	Alexandre Belloni <alexandre.belloni@bootlin.com>,
	Claudiu Beznea <claudiu.beznea@microchip.com>,
	linux-arm-kernel@lists.infradead.org,
	Thomas Petazzoni <thomas.petazzoni@bootlin.com>
Subject: Re: [PATCH] spi: atmel: Prevent false timeouts on long transfers
Date: Fri, 16 Jun 2023 18:59:06 +0200	[thread overview]
Message-ID: <20230616185906.04c4a869@xps-13> (raw)
In-Reply-To: <4054360c-b942-4761-a03f-e4d50a328ec0@sirena.org.uk>

Hi Mark,

broonie@kernel.org wrote on Fri, 16 Jun 2023 17:43:06 +0100:

> On Fri, Jun 16, 2023 at 06:15:35PM +0200, Miquel Raynal wrote:
> > broonie@kernel.org wrote on Fri, 16 Jun 2023 15:20:27 +0100:  
> 
> > > On Fri, Jun 16, 2023 at 04:12:25PM +0200, Miquel Raynal wrote:  
> 
> > > > -#define SPI_DMA_TIMEOUT		(msecs_to_jiffies(1000))
> > > > +#define SPI_DMA_MIN_TIMEOUT	(msecs_to_jiffies(1000))
> > > > +#define SPI_DMA_TIMEOUT_PER_10K	(msecs_to_jiffies(4))    
> 
> > > Given that we know the bus speed can't we just calculate this like other
> > > drivers do (we should probably add a helper TBH)?  
> 
> > I agree we should probably have some kind of easy-to-use helper to
> > derive a decent timeout value. How do sound the heuristics
> > proposed here to you ? That would be:  
> 
> > 	timeout = 1s + 4ms/10k  
> 
> Like I say we should know the transfer speed so we can do better than
> 4ms/10k - we know how long it takes to clock out each byte, we can just
> multiply that by the size of the transfer then add some fudge factor for
> setup/teardown overhead.  1s feels pretty generous too.  The sun6i
> driver for example does 
> 
>    max(tfr->len * 8 * 2 / (tfr->speed_hz / 1000), 100U)
> 
> and just doubles the length based timeout with a minimum of 100ms which
> seems reasonable.

I already had issues with ~0.1s timeouts on NAND controllers, just
because the machine was heavily loaded. I believe we should avoid too
small timeouts, it does not make sense and make things worse under load.

I'll have a look.

Thanks,
Miquèl

WARNING: multiple messages have this Message-ID (diff)
From: Miquel Raynal <miquel.raynal@bootlin.com>
To: Mark Brown <broonie@kernel.org>
Cc: Alexandre Belloni <alexandre.belloni@bootlin.com>,
	linux-spi@vger.kernel.org,
	Tudor Ambarus <tudor.ambarus@linaro.org>,
	Thomas Petazzoni <thomas.petazzoni@bootlin.com>,
	Claudiu Beznea <claudiu.beznea@microchip.com>,
	linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH] spi: atmel: Prevent false timeouts on long transfers
Date: Fri, 16 Jun 2023 18:59:06 +0200	[thread overview]
Message-ID: <20230616185906.04c4a869@xps-13> (raw)
In-Reply-To: <4054360c-b942-4761-a03f-e4d50a328ec0@sirena.org.uk>

Hi Mark,

broonie@kernel.org wrote on Fri, 16 Jun 2023 17:43:06 +0100:

> On Fri, Jun 16, 2023 at 06:15:35PM +0200, Miquel Raynal wrote:
> > broonie@kernel.org wrote on Fri, 16 Jun 2023 15:20:27 +0100:  
> 
> > > On Fri, Jun 16, 2023 at 04:12:25PM +0200, Miquel Raynal wrote:  
> 
> > > > -#define SPI_DMA_TIMEOUT		(msecs_to_jiffies(1000))
> > > > +#define SPI_DMA_MIN_TIMEOUT	(msecs_to_jiffies(1000))
> > > > +#define SPI_DMA_TIMEOUT_PER_10K	(msecs_to_jiffies(4))    
> 
> > > Given that we know the bus speed can't we just calculate this like other
> > > drivers do (we should probably add a helper TBH)?  
> 
> > I agree we should probably have some kind of easy-to-use helper to
> > derive a decent timeout value. How do sound the heuristics
> > proposed here to you ? That would be:  
> 
> > 	timeout = 1s + 4ms/10k  
> 
> Like I say we should know the transfer speed so we can do better than
> 4ms/10k - we know how long it takes to clock out each byte, we can just
> multiply that by the size of the transfer then add some fudge factor for
> setup/teardown overhead.  1s feels pretty generous too.  The sun6i
> driver for example does 
> 
>    max(tfr->len * 8 * 2 / (tfr->speed_hz / 1000), 100U)
> 
> and just doubles the length based timeout with a minimum of 100ms which
> seems reasonable.

I already had issues with ~0.1s timeouts on NAND controllers, just
because the machine was heavily loaded. I believe we should avoid too
small timeouts, it does not make sense and make things worse under load.

I'll have a look.

Thanks,
Miquèl

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

  reply	other threads:[~2023-06-16 17:00 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-06-16 14:12 [PATCH] spi: atmel: Prevent false timeouts on long transfers Miquel Raynal
2023-06-16 14:12 ` Miquel Raynal
2023-06-16 14:20 ` Mark Brown
2023-06-16 14:20   ` Mark Brown
2023-06-16 16:15   ` Miquel Raynal
2023-06-16 16:15     ` Miquel Raynal
2023-06-16 16:43     ` Mark Brown
2023-06-16 16:43       ` Mark Brown
2023-06-16 16:59       ` Miquel Raynal [this message]
2023-06-16 16:59         ` Miquel Raynal
2023-06-16 17:43         ` Mark Brown
2023-06-16 17:43           ` Mark Brown
2023-06-16 17:53           ` Miquel Raynal
2023-06-16 17:53             ` Miquel Raynal

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