From: Rob Clark <robdclark@gmail.com>
To: dri-devel@lists.freedesktop.org
Cc: linux-arm-msm@vger.kernel.org, freedreno@lists.freedesktop.org,
Konrad Dybcio <konrad.dybcio@linaro.org>,
Rob Clark <robdclark@chromium.org>
Subject: [PATCH 02/12] drm/msm/adreno: Remove redundant gmem size param
Date: Thu, 6 Jul 2023 14:10:35 -0700 [thread overview]
Message-ID: <20230706211045.204925-3-robdclark@gmail.com> (raw)
In-Reply-To: <20230706211045.204925-1-robdclark@gmail.com>
From: Rob Clark <robdclark@chromium.org>
Even in the ocmem case, the allocated ocmem buffer size should match the
requested size.
Signed-off-by: Rob Clark <robdclark@chromium.org>
---
drivers/gpu/drm/msm/adreno/a2xx_gpu.c | 2 +-
drivers/gpu/drm/msm/adreno/a5xx_gpu.c | 2 +-
drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 2 +-
drivers/gpu/drm/msm/adreno/adreno_device.c | 1 -
drivers/gpu/drm/msm/adreno/adreno_gpu.c | 8 ++++----
drivers/gpu/drm/msm/adreno/adreno_gpu.h | 1 -
6 files changed, 7 insertions(+), 9 deletions(-)
diff --git a/drivers/gpu/drm/msm/adreno/a2xx_gpu.c b/drivers/gpu/drm/msm/adreno/a2xx_gpu.c
index c67089a7ebc1..50ee03bc94b4 100644
--- a/drivers/gpu/drm/msm/adreno/a2xx_gpu.c
+++ b/drivers/gpu/drm/msm/adreno/a2xx_gpu.c
@@ -205,7 +205,7 @@ static int a2xx_hw_init(struct msm_gpu *gpu)
A2XX_MH_INTERRUPT_MASK_MMU_PAGE_FAULT);
for (i = 3; i <= 5; i++)
- if ((SZ_16K << i) == adreno_gpu->gmem)
+ if ((SZ_16K << i) == adreno_gpu->info->gmem)
break;
gpu_write(gpu, REG_A2XX_RB_EDRAM_INFO, i);
diff --git a/drivers/gpu/drm/msm/adreno/a5xx_gpu.c b/drivers/gpu/drm/msm/adreno/a5xx_gpu.c
index a99310b68793..f0803e94ebe5 100644
--- a/drivers/gpu/drm/msm/adreno/a5xx_gpu.c
+++ b/drivers/gpu/drm/msm/adreno/a5xx_gpu.c
@@ -749,7 +749,7 @@ static int a5xx_hw_init(struct msm_gpu *gpu)
gpu_write(gpu, REG_A5XX_UCHE_GMEM_RANGE_MIN_LO, 0x00100000);
gpu_write(gpu, REG_A5XX_UCHE_GMEM_RANGE_MIN_HI, 0x00000000);
gpu_write(gpu, REG_A5XX_UCHE_GMEM_RANGE_MAX_LO,
- 0x00100000 + adreno_gpu->gmem - 1);
+ 0x00100000 + adreno_gpu->info->gmem - 1);
gpu_write(gpu, REG_A5XX_UCHE_GMEM_RANGE_MAX_HI, 0x00000000);
if (adreno_is_a506(adreno_gpu) || adreno_is_a508(adreno_gpu) ||
diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c
index b3ada1e7b598..edbade75020f 100644
--- a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c
+++ b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c
@@ -1270,7 +1270,7 @@ static int hw_init(struct msm_gpu *gpu)
gpu_write64(gpu, REG_A6XX_UCHE_GMEM_RANGE_MIN, 0x00100000);
gpu_write64(gpu, REG_A6XX_UCHE_GMEM_RANGE_MAX,
- 0x00100000 + adreno_gpu->gmem - 1);
+ 0x00100000 + adreno_gpu->info->gmem - 1);
}
gpu_write(gpu, REG_A6XX_UCHE_FILTER_CNTL, 0x804);
diff --git a/drivers/gpu/drm/msm/adreno/adreno_device.c b/drivers/gpu/drm/msm/adreno/adreno_device.c
index 5eba0ae5c9a7..326912284a95 100644
--- a/drivers/gpu/drm/msm/adreno/adreno_device.c
+++ b/drivers/gpu/drm/msm/adreno/adreno_device.c
@@ -239,7 +239,6 @@ static const struct adreno_info gpulist[] = {
}, {
.rev = ADRENO_REV(6, 1, 0, ANY_ID),
.revn = 610,
- .name = "A610",
.fw = {
[ADRENO_FW_SQE] = "a630_sqe.fw",
},
diff --git a/drivers/gpu/drm/msm/adreno/adreno_gpu.c b/drivers/gpu/drm/msm/adreno/adreno_gpu.c
index e3cd9ff6ff1d..4f59682f585e 100644
--- a/drivers/gpu/drm/msm/adreno/adreno_gpu.c
+++ b/drivers/gpu/drm/msm/adreno/adreno_gpu.c
@@ -320,7 +320,7 @@ int adreno_get_param(struct msm_gpu *gpu, struct msm_file_private *ctx,
*value = adreno_gpu->info->revn;
return 0;
case MSM_PARAM_GMEM_SIZE:
- *value = adreno_gpu->gmem;
+ *value = adreno_gpu->info->gmem;
return 0;
case MSM_PARAM_GMEM_BASE:
*value = !adreno_is_a650_family(adreno_gpu) ? 0x100000 : 0;
@@ -1041,14 +1041,15 @@ int adreno_gpu_ocmem_init(struct device *dev, struct adreno_gpu *adreno_gpu,
return PTR_ERR(ocmem);
}
- ocmem_hdl = ocmem_allocate(ocmem, OCMEM_GRAPHICS, adreno_gpu->gmem);
+ ocmem_hdl = ocmem_allocate(ocmem, OCMEM_GRAPHICS, adreno_gpu->info->gmem);
if (IS_ERR(ocmem_hdl))
return PTR_ERR(ocmem_hdl);
adreno_ocmem->ocmem = ocmem;
adreno_ocmem->base = ocmem_hdl->addr;
adreno_ocmem->hdl = ocmem_hdl;
- adreno_gpu->gmem = ocmem_hdl->len;
+
+ WARN_ON(ocmem_hdl->len != adreno_gpu->info->gmem);
return 0;
}
@@ -1097,7 +1098,6 @@ int adreno_gpu_init(struct drm_device *drm, struct platform_device *pdev,
adreno_gpu->funcs = funcs;
adreno_gpu->info = adreno_info(config->rev);
- adreno_gpu->gmem = adreno_gpu->info->gmem;
adreno_gpu->revn = adreno_gpu->info->revn;
adreno_gpu->rev = *rev;
diff --git a/drivers/gpu/drm/msm/adreno/adreno_gpu.h b/drivers/gpu/drm/msm/adreno/adreno_gpu.h
index 6830c3776c2d..aaf09c642dc6 100644
--- a/drivers/gpu/drm/msm/adreno/adreno_gpu.h
+++ b/drivers/gpu/drm/msm/adreno/adreno_gpu.h
@@ -77,7 +77,6 @@ struct adreno_gpu {
struct msm_gpu base;
struct adreno_rev rev;
const struct adreno_info *info;
- uint32_t gmem; /* actual gmem size */
uint32_t revn; /* numeric revision name */
uint16_t speedbin;
const struct adreno_gpu_funcs *funcs;
--
2.41.0
WARNING: multiple messages have this Message-ID (diff)
From: Rob Clark <robdclark@gmail.com>
To: dri-devel@lists.freedesktop.org
Cc: Konrad Dybcio <konrad.dybcio@linaro.org>,
linux-arm-msm@vger.kernel.org, Rob Clark <robdclark@chromium.org>,
freedreno@lists.freedesktop.org
Subject: [PATCH 02/12] drm/msm/adreno: Remove redundant gmem size param
Date: Thu, 6 Jul 2023 14:10:35 -0700 [thread overview]
Message-ID: <20230706211045.204925-3-robdclark@gmail.com> (raw)
In-Reply-To: <20230706211045.204925-1-robdclark@gmail.com>
From: Rob Clark <robdclark@chromium.org>
Even in the ocmem case, the allocated ocmem buffer size should match the
requested size.
Signed-off-by: Rob Clark <robdclark@chromium.org>
---
drivers/gpu/drm/msm/adreno/a2xx_gpu.c | 2 +-
drivers/gpu/drm/msm/adreno/a5xx_gpu.c | 2 +-
drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 2 +-
drivers/gpu/drm/msm/adreno/adreno_device.c | 1 -
drivers/gpu/drm/msm/adreno/adreno_gpu.c | 8 ++++----
drivers/gpu/drm/msm/adreno/adreno_gpu.h | 1 -
6 files changed, 7 insertions(+), 9 deletions(-)
diff --git a/drivers/gpu/drm/msm/adreno/a2xx_gpu.c b/drivers/gpu/drm/msm/adreno/a2xx_gpu.c
index c67089a7ebc1..50ee03bc94b4 100644
--- a/drivers/gpu/drm/msm/adreno/a2xx_gpu.c
+++ b/drivers/gpu/drm/msm/adreno/a2xx_gpu.c
@@ -205,7 +205,7 @@ static int a2xx_hw_init(struct msm_gpu *gpu)
A2XX_MH_INTERRUPT_MASK_MMU_PAGE_FAULT);
for (i = 3; i <= 5; i++)
- if ((SZ_16K << i) == adreno_gpu->gmem)
+ if ((SZ_16K << i) == adreno_gpu->info->gmem)
break;
gpu_write(gpu, REG_A2XX_RB_EDRAM_INFO, i);
diff --git a/drivers/gpu/drm/msm/adreno/a5xx_gpu.c b/drivers/gpu/drm/msm/adreno/a5xx_gpu.c
index a99310b68793..f0803e94ebe5 100644
--- a/drivers/gpu/drm/msm/adreno/a5xx_gpu.c
+++ b/drivers/gpu/drm/msm/adreno/a5xx_gpu.c
@@ -749,7 +749,7 @@ static int a5xx_hw_init(struct msm_gpu *gpu)
gpu_write(gpu, REG_A5XX_UCHE_GMEM_RANGE_MIN_LO, 0x00100000);
gpu_write(gpu, REG_A5XX_UCHE_GMEM_RANGE_MIN_HI, 0x00000000);
gpu_write(gpu, REG_A5XX_UCHE_GMEM_RANGE_MAX_LO,
- 0x00100000 + adreno_gpu->gmem - 1);
+ 0x00100000 + adreno_gpu->info->gmem - 1);
gpu_write(gpu, REG_A5XX_UCHE_GMEM_RANGE_MAX_HI, 0x00000000);
if (adreno_is_a506(adreno_gpu) || adreno_is_a508(adreno_gpu) ||
diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c
index b3ada1e7b598..edbade75020f 100644
--- a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c
+++ b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c
@@ -1270,7 +1270,7 @@ static int hw_init(struct msm_gpu *gpu)
gpu_write64(gpu, REG_A6XX_UCHE_GMEM_RANGE_MIN, 0x00100000);
gpu_write64(gpu, REG_A6XX_UCHE_GMEM_RANGE_MAX,
- 0x00100000 + adreno_gpu->gmem - 1);
+ 0x00100000 + adreno_gpu->info->gmem - 1);
}
gpu_write(gpu, REG_A6XX_UCHE_FILTER_CNTL, 0x804);
diff --git a/drivers/gpu/drm/msm/adreno/adreno_device.c b/drivers/gpu/drm/msm/adreno/adreno_device.c
index 5eba0ae5c9a7..326912284a95 100644
--- a/drivers/gpu/drm/msm/adreno/adreno_device.c
+++ b/drivers/gpu/drm/msm/adreno/adreno_device.c
@@ -239,7 +239,6 @@ static const struct adreno_info gpulist[] = {
}, {
.rev = ADRENO_REV(6, 1, 0, ANY_ID),
.revn = 610,
- .name = "A610",
.fw = {
[ADRENO_FW_SQE] = "a630_sqe.fw",
},
diff --git a/drivers/gpu/drm/msm/adreno/adreno_gpu.c b/drivers/gpu/drm/msm/adreno/adreno_gpu.c
index e3cd9ff6ff1d..4f59682f585e 100644
--- a/drivers/gpu/drm/msm/adreno/adreno_gpu.c
+++ b/drivers/gpu/drm/msm/adreno/adreno_gpu.c
@@ -320,7 +320,7 @@ int adreno_get_param(struct msm_gpu *gpu, struct msm_file_private *ctx,
*value = adreno_gpu->info->revn;
return 0;
case MSM_PARAM_GMEM_SIZE:
- *value = adreno_gpu->gmem;
+ *value = adreno_gpu->info->gmem;
return 0;
case MSM_PARAM_GMEM_BASE:
*value = !adreno_is_a650_family(adreno_gpu) ? 0x100000 : 0;
@@ -1041,14 +1041,15 @@ int adreno_gpu_ocmem_init(struct device *dev, struct adreno_gpu *adreno_gpu,
return PTR_ERR(ocmem);
}
- ocmem_hdl = ocmem_allocate(ocmem, OCMEM_GRAPHICS, adreno_gpu->gmem);
+ ocmem_hdl = ocmem_allocate(ocmem, OCMEM_GRAPHICS, adreno_gpu->info->gmem);
if (IS_ERR(ocmem_hdl))
return PTR_ERR(ocmem_hdl);
adreno_ocmem->ocmem = ocmem;
adreno_ocmem->base = ocmem_hdl->addr;
adreno_ocmem->hdl = ocmem_hdl;
- adreno_gpu->gmem = ocmem_hdl->len;
+
+ WARN_ON(ocmem_hdl->len != adreno_gpu->info->gmem);
return 0;
}
@@ -1097,7 +1098,6 @@ int adreno_gpu_init(struct drm_device *drm, struct platform_device *pdev,
adreno_gpu->funcs = funcs;
adreno_gpu->info = adreno_info(config->rev);
- adreno_gpu->gmem = adreno_gpu->info->gmem;
adreno_gpu->revn = adreno_gpu->info->revn;
adreno_gpu->rev = *rev;
diff --git a/drivers/gpu/drm/msm/adreno/adreno_gpu.h b/drivers/gpu/drm/msm/adreno/adreno_gpu.h
index 6830c3776c2d..aaf09c642dc6 100644
--- a/drivers/gpu/drm/msm/adreno/adreno_gpu.h
+++ b/drivers/gpu/drm/msm/adreno/adreno_gpu.h
@@ -77,7 +77,6 @@ struct adreno_gpu {
struct msm_gpu base;
struct adreno_rev rev;
const struct adreno_info *info;
- uint32_t gmem; /* actual gmem size */
uint32_t revn; /* numeric revision name */
uint16_t speedbin;
const struct adreno_gpu_funcs *funcs;
--
2.41.0
next prev parent reply other threads:[~2023-07-06 21:11 UTC|newest]
Thread overview: 134+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-07-06 21:10 [PATCH 00/12] drm/msm/adreno: Move away from legacy revision matching Rob Clark
2023-07-06 21:10 ` Rob Clark
2023-07-06 21:10 ` [PATCH 01/12] drm/msm/adreno: Remove GPU name Rob Clark
2023-07-06 21:10 ` Rob Clark
2023-07-06 23:21 ` Konrad Dybcio
2023-07-06 23:21 ` Konrad Dybcio
2023-07-07 0:04 ` [Freedreno] " Dmitry Baryshkov
2023-07-06 21:10 ` Rob Clark [this message]
2023-07-06 21:10 ` [PATCH 02/12] drm/msm/adreno: Remove redundant gmem size param Rob Clark
2023-07-06 23:22 ` Konrad Dybcio
2023-07-06 23:22 ` Konrad Dybcio
2023-07-13 19:46 ` Akhil P Oommen
2023-07-13 19:46 ` Akhil P Oommen
2023-07-07 2:23 ` [Freedreno] " Dmitry Baryshkov
2023-07-06 21:10 ` [PATCH 03/12] drm/msm/adreno: Remove redundant revn param Rob Clark
2023-07-06 21:10 ` Rob Clark
2023-07-06 23:26 ` Konrad Dybcio
2023-07-06 23:26 ` Konrad Dybcio
2023-07-07 2:24 ` [Freedreno] " Dmitry Baryshkov
2023-07-06 21:10 ` [PATCH 04/12] drm/msm/adreno: Use quirk identify hw_apriv Rob Clark
2023-07-06 21:10 ` Rob Clark
2023-07-06 23:27 ` Konrad Dybcio
2023-07-06 23:27 ` Konrad Dybcio
2023-07-07 2:25 ` [Freedreno] " Dmitry Baryshkov
2023-07-06 21:10 ` [PATCH 05/12] drm/msm/adreno: Use quirk to identify cached-coherent support Rob Clark
2023-07-06 21:10 ` Rob Clark
2023-07-06 23:29 ` Konrad Dybcio
2023-07-06 23:29 ` Konrad Dybcio
2023-07-07 2:29 ` [Freedreno] " Dmitry Baryshkov
2023-07-07 15:53 ` Rob Clark
2023-07-07 15:53 ` Rob Clark
2023-07-13 20:05 ` Akhil P Oommen
2023-07-13 20:05 ` Akhil P Oommen
2023-07-13 22:25 ` Rob Clark
2023-07-13 22:25 ` Rob Clark
2023-07-17 22:00 ` Akhil P Oommen
2023-07-17 22:00 ` Akhil P Oommen
2023-07-06 21:10 ` [PATCH 06/12] drm/msm/adreno: Allow SoC specific gpu device table entries Rob Clark
2023-07-06 21:10 ` Rob Clark
2023-07-07 0:40 ` Konrad Dybcio
2023-07-07 0:40 ` Konrad Dybcio
2023-07-13 22:15 ` [Freedreno] " Akhil P Oommen
2023-07-13 22:15 ` Akhil P Oommen
2023-07-07 2:34 ` Dmitry Baryshkov
2023-07-13 20:26 ` Akhil P Oommen
2023-07-13 20:26 ` Akhil P Oommen
2023-07-26 18:28 ` Rob Clark
2023-07-26 18:28 ` Rob Clark
2023-07-26 20:00 ` Dmitry Baryshkov
2023-07-26 20:00 ` Dmitry Baryshkov
2023-07-26 20:11 ` Rob Clark
2023-07-26 20:11 ` Rob Clark
2023-07-26 21:43 ` Dmitry Baryshkov
2023-07-26 21:43 ` Dmitry Baryshkov
2023-07-26 22:03 ` Rob Clark
2023-07-26 22:03 ` Rob Clark
2023-07-26 22:33 ` Dmitry Baryshkov
2023-07-26 22:33 ` Dmitry Baryshkov
2023-07-26 22:53 ` Rob Clark
2023-07-26 22:53 ` Rob Clark
2023-07-27 7:51 ` Konrad Dybcio
2023-07-27 7:51 ` Konrad Dybcio
2023-07-27 14:52 ` Rob Clark
2023-07-27 14:52 ` Rob Clark
2023-07-27 21:13 ` Rob Clark
2023-07-27 21:13 ` Rob Clark
2023-07-27 22:02 ` Dmitry Baryshkov
2023-07-27 22:02 ` Dmitry Baryshkov
2023-07-28 14:43 ` Rob Clark
2023-07-28 14:43 ` Rob Clark
2023-07-28 14:51 ` Dmitry Baryshkov
2023-07-28 14:51 ` Dmitry Baryshkov
2023-07-06 21:10 ` [PATCH 07/12] drm/msm/adreno: Move speedbin mapping to device table Rob Clark
2023-07-06 21:10 ` Rob Clark
2023-07-07 2:54 ` [Freedreno] " Dmitry Baryshkov
2023-07-10 19:56 ` Rob Clark
2023-07-10 19:56 ` Rob Clark
2023-07-10 20:54 ` Dmitry Baryshkov
2023-07-10 20:54 ` Dmitry Baryshkov
2023-07-06 21:10 ` [PATCH 08/12] drm/msm/adreno: Bring the a630 family together Rob Clark
2023-07-06 21:10 ` Rob Clark
2023-07-06 23:32 ` Konrad Dybcio
2023-07-06 23:32 ` Konrad Dybcio
2023-07-06 21:10 ` [PATCH 09/12] drm/msm/adreno: Add adreno family Rob Clark
2023-07-06 21:10 ` Rob Clark
2023-07-06 23:35 ` Konrad Dybcio
2023-07-06 23:35 ` Konrad Dybcio
2023-07-07 3:16 ` Dmitry Baryshkov
2023-07-07 3:16 ` Dmitry Baryshkov
2023-07-07 23:52 ` Rob Clark
2023-07-07 23:52 ` Rob Clark
2023-07-07 23:54 ` Dmitry Baryshkov
2023-07-07 23:54 ` Dmitry Baryshkov
2023-07-07 2:49 ` [Freedreno] " Dmitry Baryshkov
2023-07-06 21:10 ` [PATCH 10/12] drm/msm/adreno: Add helper for formating chip-id Rob Clark
2023-07-06 21:10 ` Rob Clark
2023-07-06 23:36 ` Konrad Dybcio
2023-07-06 23:36 ` Konrad Dybcio
2023-07-10 20:21 ` Rob Clark
2023-07-10 20:21 ` Rob Clark
2023-07-07 2:50 ` [Freedreno] " Dmitry Baryshkov
2023-07-06 21:10 ` [PATCH 11/12] dt-bindings: drm/msm/gpu: Extend bindings for chip-id Rob Clark
2023-07-06 21:10 ` Rob Clark
2023-07-07 7:26 ` Krzysztof Kozlowski
2023-07-07 13:09 ` Rob Clark
2023-07-07 13:09 ` Rob Clark
2023-07-06 21:10 ` [PATCH 12/12] drm/msm/adreno: Switch to chip-id for identifying GPU Rob Clark
2023-07-06 21:10 ` Rob Clark
2023-07-07 0:25 ` Konrad Dybcio
2023-07-07 0:25 ` Konrad Dybcio
2023-07-07 16:08 ` Rob Clark
2023-07-07 16:08 ` Rob Clark
2023-07-15 13:38 ` Konrad Dybcio
2023-07-15 13:38 ` Konrad Dybcio
2023-07-15 14:12 ` Rob Clark
2023-07-15 14:12 ` Rob Clark
2023-07-26 21:45 ` Rob Clark
2023-07-26 21:45 ` Rob Clark
2023-07-07 3:45 ` [Freedreno] " Dmitry Baryshkov
2023-07-13 21:39 ` Akhil P Oommen
2023-07-13 21:39 ` Akhil P Oommen
2023-07-13 22:06 ` Rob Clark
2023-07-13 22:06 ` Rob Clark
2023-07-13 22:53 ` Dmitry Baryshkov
2023-07-13 22:53 ` Dmitry Baryshkov
2023-07-17 22:09 ` Akhil P Oommen
2023-07-17 22:09 ` Akhil P Oommen
2023-07-26 21:37 ` Rob Clark
2023-07-26 21:37 ` Rob Clark
2023-07-26 21:38 ` Dmitry Baryshkov
2023-07-26 21:38 ` Dmitry Baryshkov
2023-07-26 21:44 ` Rob Clark
2023-07-26 21:44 ` Rob Clark
2023-07-26 21:45 ` Dmitry Baryshkov
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