Re: [Intel-wired-lan] [RFC PATCH v9 00/10] Create common DPLL configuration API

From: Jakub Kicinski <kuba@kernel.org>
To: "Kubalewski, Arkadiusz" <arkadiusz.kubalewski@intel.com>
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Subject: Re: [Intel-wired-lan] [RFC PATCH v9 00/10] Create common DPLL configuration API
Date: Wed, 12 Jul 2023 09:54:22 -0700	[thread overview]
Message-ID: <20230712095422.00acaeaa@kernel.org> (raw)
In-Reply-To: <DM6PR11MB465701C009D1DC2972F900F29B36A@DM6PR11MB4657.namprd11.prod.outlook.com>

On Wed, 12 Jul 2023 09:19:53 +0000 Kubalewski, Arkadiusz wrote:
> >> Don't think it is way to go, and I don't think there is anything good
> >> with preventing device drivers from labeling their pins the way they
> >> want.  
> >
> >We had a long argument about how label should have a clearly defined
> >meaning. We're not going to rehash it on every revision. What did I miss :|  
> 
> Well, as I understand we are discussing if dpll subsystem shall prevent
> labeling the SyncE type pins. I have labeled them in ice explicitly with
> the name of a pci device they belong to.
> 
> You haven't miss much, mostly the problem is described in this thread.

Please read this thread:

https://lore.kernel.org/all/20230503191643.12a6e559@kernel.org/
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