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From: Maksim Kiselev <bigunclemax@gmail.com>
To: contact@jookia.org
Cc: aou@eecs.berkeley.edu, conor+dt@kernel.org, davem@davemloft.net,
	devicetree@vger.kernel.org, edumazet@google.com,
	jernej.skrabec@gmail.com, krzysztof.kozlowski+dt@linaro.org,
	kuba@kernel.org, linux-arm-kernel@lists.infradead.org,
	linux-can@vger.kernel.org, linux-kernel@vger.kernel.org,
	linux-riscv@lists.infradead.org, linux-sunxi@lists.linux.dev,
	mkl@pengutronix.de, netdev@vger.kernel.org, pabeni@redhat.com,
	palmer@dabbelt.com, paul.walmsley@sifive.com, robh+dt@kernel.org,
	samuel@sholland.org, wens@csie.org, wg@grandegger.com
Subject: Re: [PATCH v2 2/4] riscv: dts: allwinner: d1: Add CAN controller nodes
Date: Sat,  5 Aug 2023 19:40:52 +0300	[thread overview]
Message-ID: <20230805164052.669184-1-bigunclemax@gmail.com> (raw)
In-Reply-To: <20230721221552.1973203-4-contact@jookia.org>

Hi John, Jernej

On Sat, Jul 22, 2023 at 08:15:51AM +1000, John Watts wrote:
> ...
> @@ -131,6 +131,18 @@ uart3_pb_pins: uart3-pb-pins {
> 				pins = "PB6", "PB7";
> 				function = "uart3";
> 			};
> +
> +			/omit-if-no-ref/
> +			can0_pins: can0-pins {
> +				pins = "PB2", "PB3";
> +				function = "can0";
> +			};
> +
> +			/omit-if-no-ref/
> +			can1_pins: can1-pins {
> +				pins = "PB4", "PB5";
> +				function = "can1";
> +			};
> ...

Should we also keep a pinctrl nodes itself in alphabetical order?
I mean placing a CAN nodes before `clk_pg11_pin` node?
Looks like the other nodes sorted in this way...

Cheers,
Maksim

WARNING: multiple messages have this Message-ID (diff)
From: Maksim Kiselev <bigunclemax@gmail.com>
To: contact@jookia.org
Cc: aou@eecs.berkeley.edu, conor+dt@kernel.org, davem@davemloft.net,
	devicetree@vger.kernel.org, edumazet@google.com,
	jernej.skrabec@gmail.com, krzysztof.kozlowski+dt@linaro.org,
	kuba@kernel.org, linux-arm-kernel@lists.infradead.org,
	linux-can@vger.kernel.org, linux-kernel@vger.kernel.org,
	linux-riscv@lists.infradead.org, linux-sunxi@lists.linux.dev,
	mkl@pengutronix.de, netdev@vger.kernel.org, pabeni@redhat.com,
	palmer@dabbelt.com, paul.walmsley@sifive.com, robh+dt@kernel.org,
	samuel@sholland.org, wens@csie.org, wg@grandegger.com
Subject: Re: [PATCH v2 2/4] riscv: dts: allwinner: d1: Add CAN controller nodes
Date: Sat,  5 Aug 2023 19:40:52 +0300	[thread overview]
Message-ID: <20230805164052.669184-1-bigunclemax@gmail.com> (raw)
In-Reply-To: <20230721221552.1973203-4-contact@jookia.org>

Hi John, Jernej

On Sat, Jul 22, 2023 at 08:15:51AM +1000, John Watts wrote:
> ...
> @@ -131,6 +131,18 @@ uart3_pb_pins: uart3-pb-pins {
> 				pins = "PB6", "PB7";
> 				function = "uart3";
> 			};
> +
> +			/omit-if-no-ref/
> +			can0_pins: can0-pins {
> +				pins = "PB2", "PB3";
> +				function = "can0";
> +			};
> +
> +			/omit-if-no-ref/
> +			can1_pins: can1-pins {
> +				pins = "PB4", "PB5";
> +				function = "can1";
> +			};
> ...

Should we also keep a pinctrl nodes itself in alphabetical order?
I mean placing a CAN nodes before `clk_pg11_pin` node?
Looks like the other nodes sorted in this way...

Cheers,
Maksim

_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv

WARNING: multiple messages have this Message-ID (diff)
From: Maksim Kiselev <bigunclemax@gmail.com>
To: contact@jookia.org
Cc: aou@eecs.berkeley.edu, conor+dt@kernel.org, davem@davemloft.net,
	devicetree@vger.kernel.org, edumazet@google.com,
	jernej.skrabec@gmail.com, krzysztof.kozlowski+dt@linaro.org,
	kuba@kernel.org, linux-arm-kernel@lists.infradead.org,
	linux-can@vger.kernel.org, linux-kernel@vger.kernel.org,
	linux-riscv@lists.infradead.org, linux-sunxi@lists.linux.dev,
	mkl@pengutronix.de, netdev@vger.kernel.org, pabeni@redhat.com,
	palmer@dabbelt.com, paul.walmsley@sifive.com, robh+dt@kernel.org,
	samuel@sholland.org, wens@csie.org, wg@grandegger.com
Subject: Re: [PATCH v2 2/4] riscv: dts: allwinner: d1: Add CAN controller nodes
Date: Sat,  5 Aug 2023 19:40:52 +0300	[thread overview]
Message-ID: <20230805164052.669184-1-bigunclemax@gmail.com> (raw)
In-Reply-To: <20230721221552.1973203-4-contact@jookia.org>

Hi John, Jernej

On Sat, Jul 22, 2023 at 08:15:51AM +1000, John Watts wrote:
> ...
> @@ -131,6 +131,18 @@ uart3_pb_pins: uart3-pb-pins {
> 				pins = "PB6", "PB7";
> 				function = "uart3";
> 			};
> +
> +			/omit-if-no-ref/
> +			can0_pins: can0-pins {
> +				pins = "PB2", "PB3";
> +				function = "can0";
> +			};
> +
> +			/omit-if-no-ref/
> +			can1_pins: can1-pins {
> +				pins = "PB4", "PB5";
> +				function = "can1";
> +			};
> ...

Should we also keep a pinctrl nodes itself in alphabetical order?
I mean placing a CAN nodes before `clk_pg11_pin` node?
Looks like the other nodes sorted in this way...

Cheers,
Maksim

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

  parent reply	other threads:[~2023-08-05 16:41 UTC|newest]

Thread overview: 59+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-07-21 22:15 [PATCH v2 0/4] Add support for Allwinner D1 CAN controllers John Watts
2023-07-21 22:15 ` John Watts
2023-07-21 22:15 ` John Watts
2023-07-21 22:15 ` [PATCH v2 1/4] dt-bindings: net: can: Add support for Allwinner D1 CAN controller John Watts
2023-07-21 22:15   ` John Watts
2023-07-21 22:15   ` John Watts
2023-07-22  9:29   ` Krzysztof Kozlowski
2023-07-22  9:29     ` Krzysztof Kozlowski
2023-07-22  9:29     ` Krzysztof Kozlowski
2023-07-21 22:15 ` [PATCH v2 2/4] riscv: dts: allwinner: d1: Add CAN controller nodes John Watts
2023-07-21 22:15   ` John Watts
2023-07-21 22:15   ` John Watts
2023-07-23  9:18   ` John Watts
2023-07-23  9:18     ` John Watts
2023-07-23  9:18     ` John Watts
2023-07-30 22:03     ` Jernej Škrabec
2023-07-30 22:03       ` Jernej Škrabec
2023-07-30 22:03       ` Jernej Škrabec
2023-07-31  2:38       ` John Watts
2023-07-31  2:38         ` John Watts
2023-07-31  2:38         ` John Watts
2023-08-05 16:40   ` Maksim Kiselev [this message]
2023-08-05 16:40     ` Maksim Kiselev
2023-08-05 16:40     ` Maksim Kiselev
2023-08-05 16:51     ` John Watts
2023-08-05 16:51       ` John Watts
2023-08-05 16:51       ` John Watts
2023-08-05 17:49       ` Jernej Škrabec
2023-08-05 17:49         ` Jernej Škrabec
2023-08-05 17:49         ` Jernej Škrabec
2023-08-06  6:33         ` John Watts
2023-08-06  6:33           ` John Watts
2023-08-06  6:33           ` John Watts
2023-08-06 11:42           ` Jernej Škrabec
2023-08-06 11:42             ` Jernej Škrabec
2023-08-06 11:42             ` Jernej Škrabec
2023-08-07  7:16             ` Marc Kleine-Budde
2023-08-07  7:16               ` Marc Kleine-Budde
2023-08-07  7:16               ` Marc Kleine-Budde
2023-08-07  7:30               ` Marc Kleine-Budde
2023-08-07  7:30                 ` Marc Kleine-Budde
2023-08-07  7:30                 ` Marc Kleine-Budde
2023-07-21 22:15 ` [PATCH v2 3/4] can: sun4i_can: Add acceptance register quirk John Watts
2023-07-21 22:15   ` John Watts
2023-07-21 22:15   ` John Watts
2023-07-21 22:15 ` [PATCH v2 4/4] can: sun4i_can: Add support for the Allwinner D1 John Watts
2023-07-21 22:15   ` John Watts
2023-07-21 22:15   ` John Watts
2023-08-22 12:30   ` Geert Uytterhoeven
2023-08-22 12:30     ` Geert Uytterhoeven
2023-08-22 12:30     ` Geert Uytterhoeven
2023-08-23  3:16     ` John Watts
2023-08-23  3:16       ` John Watts
2023-08-23  3:16       ` John Watts
2023-07-24  8:27 ` [PATCH v2 0/4] Add support for Allwinner D1 CAN controllers Marc Kleine-Budde
2023-07-24  8:27   ` Marc Kleine-Budde
2023-09-01 16:25 ` patchwork-bot+linux-riscv
2023-09-01 16:25   ` patchwork-bot+linux-riscv
2023-09-01 16:25   ` patchwork-bot+linux-riscv

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