* [PATCH 0/2] riscv: dts: starfive - Add crypto and trng node @ 2023-08-08 6:11 ` Jia Jie Ho 0 siblings, 0 replies; 14+ messages in thread From: Jia Jie Ho @ 2023-08-08 6:11 UTC (permalink / raw) To: Emil Renner Berthing, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Paul Walmsley, Palmer Dabbelt, Albert Ou Cc: devicetree, linux-riscv, linux-kernel The following patches add hardware cryptographic and trng module nodes to JH7110 dts. Patches have been tested on VisionFive2 board. Best regards, Jia Jie Jia Jie Ho (2): riscv: dts: starfive - Add crypto and DMA node for JH7110 riscv: dts: starfive - Add hwrng node for JH7110 SoC arch/riscv/boot/dts/starfive/jh7110.dtsi | 38 ++++++++++++++++++++++++ 1 file changed, 38 insertions(+) -- 2.34.1 _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv ^ permalink raw reply [flat|nested] 14+ messages in thread
* [PATCH 0/2] riscv: dts: starfive - Add crypto and trng node @ 2023-08-08 6:11 ` Jia Jie Ho 0 siblings, 0 replies; 14+ messages in thread From: Jia Jie Ho @ 2023-08-08 6:11 UTC (permalink / raw) To: Emil Renner Berthing, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Paul Walmsley, Palmer Dabbelt, Albert Ou Cc: devicetree, linux-riscv, linux-kernel The following patches add hardware cryptographic and trng module nodes to JH7110 dts. Patches have been tested on VisionFive2 board. Best regards, Jia Jie Jia Jie Ho (2): riscv: dts: starfive - Add crypto and DMA node for JH7110 riscv: dts: starfive - Add hwrng node for JH7110 SoC arch/riscv/boot/dts/starfive/jh7110.dtsi | 38 ++++++++++++++++++++++++ 1 file changed, 38 insertions(+) -- 2.34.1 ^ permalink raw reply [flat|nested] 14+ messages in thread
* [PATCH 1/2] riscv: dts: starfive - Add crypto and DMA node for JH7110 2023-08-08 6:11 ` Jia Jie Ho @ 2023-08-08 6:11 ` Jia Jie Ho -1 siblings, 0 replies; 14+ messages in thread From: Jia Jie Ho @ 2023-08-08 6:11 UTC (permalink / raw) To: Emil Renner Berthing, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Paul Walmsley, Palmer Dabbelt, Albert Ou Cc: devicetree, linux-riscv, linux-kernel Add hardware crypto module and dedicated dma controller node to StarFive JH7110 SoC. Co-developed-by: Huan Feng <huan.feng@starfivetech.com> Signed-off-by: Huan Feng <huan.feng@starfivetech.com> Signed-off-by: Jia Jie Ho <jiajie.ho@starfivetech.com> Acked-by: Palmer Dabbelt <palmer@rivosinc.com> --- arch/riscv/boot/dts/starfive/jh7110.dtsi | 28 ++++++++++++++++++++++++ 1 file changed, 28 insertions(+) diff --git a/arch/riscv/boot/dts/starfive/jh7110.dtsi b/arch/riscv/boot/dts/starfive/jh7110.dtsi index a608433200e8..47cd12ccc988 100644 --- a/arch/riscv/boot/dts/starfive/jh7110.dtsi +++ b/arch/riscv/boot/dts/starfive/jh7110.dtsi @@ -821,6 +821,34 @@ watchdog@13070000 { <&syscrg JH7110_SYSRST_WDT_CORE>; }; + crypto: crypto@16000000 { + compatible = "starfive,jh7110-crypto"; + reg = <0x0 0x16000000 0x0 0x4000>; + clocks = <&stgcrg JH7110_STGCLK_SEC_AHB>, + <&stgcrg JH7110_STGCLK_SEC_MISC_AHB>; + clock-names = "hclk", "ahb"; + interrupts = <28>; + resets = <&stgcrg JH7110_STGRST_SEC_AHB>; + dmas = <&sdma 1 2>, <&sdma 0 2>; + dma-names = "tx", "rx"; + }; + + sdma: dma@16008000 { + compatible = "arm,pl080", "arm,primecell"; + arm,primecell-periphid = <0x00041080>; + reg = <0x0 0x16008000 0x0 0x4000>; + interrupts = <29>; + clocks = <&stgcrg JH7110_STGCLK_SEC_AHB>, + <&stgcrg JH7110_STGCLK_SEC_MISC_AHB>; + clock-names = "hclk", "apb_pclk"; + resets = <&stgcrg JH7110_STGRST_SEC_AHB>; + lli-bus-interface-ahb1; + mem-bus-interface-ahb1; + memcpy-burst-size = <256>; + memcpy-bus-width = <32>; + #dma-cells = <2>; + }; + gmac0: ethernet@16030000 { compatible = "starfive,jh7110-dwmac", "snps,dwmac-5.20"; reg = <0x0 0x16030000 0x0 0x10000>; -- 2.34.1 _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv ^ permalink raw reply related [flat|nested] 14+ messages in thread
* [PATCH 1/2] riscv: dts: starfive - Add crypto and DMA node for JH7110 @ 2023-08-08 6:11 ` Jia Jie Ho 0 siblings, 0 replies; 14+ messages in thread From: Jia Jie Ho @ 2023-08-08 6:11 UTC (permalink / raw) To: Emil Renner Berthing, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Paul Walmsley, Palmer Dabbelt, Albert Ou Cc: devicetree, linux-riscv, linux-kernel Add hardware crypto module and dedicated dma controller node to StarFive JH7110 SoC. Co-developed-by: Huan Feng <huan.feng@starfivetech.com> Signed-off-by: Huan Feng <huan.feng@starfivetech.com> Signed-off-by: Jia Jie Ho <jiajie.ho@starfivetech.com> Acked-by: Palmer Dabbelt <palmer@rivosinc.com> --- arch/riscv/boot/dts/starfive/jh7110.dtsi | 28 ++++++++++++++++++++++++ 1 file changed, 28 insertions(+) diff --git a/arch/riscv/boot/dts/starfive/jh7110.dtsi b/arch/riscv/boot/dts/starfive/jh7110.dtsi index a608433200e8..47cd12ccc988 100644 --- a/arch/riscv/boot/dts/starfive/jh7110.dtsi +++ b/arch/riscv/boot/dts/starfive/jh7110.dtsi @@ -821,6 +821,34 @@ watchdog@13070000 { <&syscrg JH7110_SYSRST_WDT_CORE>; }; + crypto: crypto@16000000 { + compatible = "starfive,jh7110-crypto"; + reg = <0x0 0x16000000 0x0 0x4000>; + clocks = <&stgcrg JH7110_STGCLK_SEC_AHB>, + <&stgcrg JH7110_STGCLK_SEC_MISC_AHB>; + clock-names = "hclk", "ahb"; + interrupts = <28>; + resets = <&stgcrg JH7110_STGRST_SEC_AHB>; + dmas = <&sdma 1 2>, <&sdma 0 2>; + dma-names = "tx", "rx"; + }; + + sdma: dma@16008000 { + compatible = "arm,pl080", "arm,primecell"; + arm,primecell-periphid = <0x00041080>; + reg = <0x0 0x16008000 0x0 0x4000>; + interrupts = <29>; + clocks = <&stgcrg JH7110_STGCLK_SEC_AHB>, + <&stgcrg JH7110_STGCLK_SEC_MISC_AHB>; + clock-names = "hclk", "apb_pclk"; + resets = <&stgcrg JH7110_STGRST_SEC_AHB>; + lli-bus-interface-ahb1; + mem-bus-interface-ahb1; + memcpy-burst-size = <256>; + memcpy-bus-width = <32>; + #dma-cells = <2>; + }; + gmac0: ethernet@16030000 { compatible = "starfive,jh7110-dwmac", "snps,dwmac-5.20"; reg = <0x0 0x16030000 0x0 0x10000>; -- 2.34.1 ^ permalink raw reply related [flat|nested] 14+ messages in thread
* Re: [PATCH 1/2] riscv: dts: starfive - Add crypto and DMA node for JH7110 2023-08-08 6:11 ` Jia Jie Ho @ 2023-08-08 7:16 ` Conor Dooley -1 siblings, 0 replies; 14+ messages in thread From: Conor Dooley @ 2023-08-08 7:16 UTC (permalink / raw) To: Jia Jie Ho Cc: Emil Renner Berthing, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Paul Walmsley, Palmer Dabbelt, Albert Ou, devicetree, linux-riscv, linux-kernel [-- Attachment #1.1: Type: text/plain, Size: 3637 bytes --] On Tue, Aug 08, 2023 at 02:11:49PM +0800, Jia Jie Ho wrote: > Add hardware crypto module and dedicated dma controller node to StarFive > JH7110 SoC. > > Co-developed-by: Huan Feng <huan.feng@starfivetech.com> > Signed-off-by: Huan Feng <huan.feng@starfivetech.com> > Signed-off-by: Jia Jie Ho <jiajie.ho@starfivetech.com> > Acked-by: Palmer Dabbelt <palmer@rivosinc.com> > --- > arch/riscv/boot/dts/starfive/jh7110.dtsi | 28 ++++++++++++++++++++++++ > 1 file changed, 28 insertions(+) > > diff --git a/arch/riscv/boot/dts/starfive/jh7110.dtsi b/arch/riscv/boot/dts/starfive/jh7110.dtsi > index a608433200e8..47cd12ccc988 100644 > --- a/arch/riscv/boot/dts/starfive/jh7110.dtsi > +++ b/arch/riscv/boot/dts/starfive/jh7110.dtsi > @@ -821,6 +821,34 @@ watchdog@13070000 { > <&syscrg JH7110_SYSRST_WDT_CORE>; > }; > > + crypto: crypto@16000000 { > + compatible = "starfive,jh7110-crypto"; > + reg = <0x0 0x16000000 0x0 0x4000>; > + clocks = <&stgcrg JH7110_STGCLK_SEC_AHB>, > + <&stgcrg JH7110_STGCLK_SEC_MISC_AHB>; > + clock-names = "hclk", "ahb"; > + interrupts = <28>; > + resets = <&stgcrg JH7110_STGRST_SEC_AHB>; > + dmas = <&sdma 1 2>, <&sdma 0 2>; > + dma-names = "tx", "rx"; > + }; > + > + sdma: dma@16008000 { > + compatible = "arm,pl080", "arm,primecell"; > + arm,primecell-periphid = <0x00041080>; > + reg = <0x0 0x16008000 0x0 0x4000>; > + interrupts = <29>; > + clocks = <&stgcrg JH7110_STGCLK_SEC_AHB>, > + <&stgcrg JH7110_STGCLK_SEC_MISC_AHB>; > + clock-names = "hclk", "apb_pclk"; > + resets = <&stgcrg JH7110_STGRST_SEC_AHB>; > + lli-bus-interface-ahb1; > + mem-bus-interface-ahb1; > + memcpy-burst-size = <256>; > + memcpy-bus-width = <32>; > + #dma-cells = <2>; > + }; > + Against linux-next, I get these warnings: arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2-v1.3b.dtb: dma@16008000: $nodename:0: 'dma@16008000' does not match '^dma-controller(@.*)?$' from schema $id: http://devicetree.org/schemas/dma/arm-pl08x.yaml# arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2-v1.3b.dtb: dma@16008000: clocks: [[26, 15], [26, 16]] is too long from schema $id: http://devicetree.org/schemas/dma/arm-pl08x.yaml# arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2-v1.3b.dtb: dma@16008000: clock-names: ['hclk', 'apb_pclk'] is too long from schema $id: http://devicetree.org/schemas/dma/arm-pl08x.yaml# arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2-v1.3b.dtb: dma@16008000: Unevaluated properties are not allowed ('#dma-cells' was unexpected) from schema $id: http://devicetree.org/schemas/dma/arm-pl08x.yaml# arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2-v1.2a.dtb: dma@16008000: $nodename:0: 'dma@16008000' does not match '^dma-controller(@.*)?$' from schema $id: http://devicetree.org/schemas/dma/arm-pl08x.yaml# arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2-v1.2a.dtb: dma@16008000: clocks: [[26, 15], [26, 16]] is too long from schema $id: http://devicetree.org/schemas/dma/arm-pl08x.yaml# arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2-v1.2a.dtb: dma@16008000: clock-names: ['hclk', 'apb_pclk'] is too long from schema $id: http://devicetree.org/schemas/dma/arm-pl08x.yaml# arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2-v1.2a.dtb: dma@16008000: Unevaluated properties are not allowed ('#dma-cells' was unexpected) from schema $id: http://devicetree.org/schemas/dma/arm-pl08x.yaml# Please fix these & submit a tested v2. Thanks, Conor. [-- Attachment #1.2: signature.asc --] [-- Type: application/pgp-signature, Size: 228 bytes --] [-- Attachment #2: Type: text/plain, Size: 161 bytes --] _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv ^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH 1/2] riscv: dts: starfive - Add crypto and DMA node for JH7110 @ 2023-08-08 7:16 ` Conor Dooley 0 siblings, 0 replies; 14+ messages in thread From: Conor Dooley @ 2023-08-08 7:16 UTC (permalink / raw) To: Jia Jie Ho Cc: Emil Renner Berthing, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Paul Walmsley, Palmer Dabbelt, Albert Ou, devicetree, linux-riscv, linux-kernel [-- Attachment #1: Type: text/plain, Size: 3637 bytes --] On Tue, Aug 08, 2023 at 02:11:49PM +0800, Jia Jie Ho wrote: > Add hardware crypto module and dedicated dma controller node to StarFive > JH7110 SoC. > > Co-developed-by: Huan Feng <huan.feng@starfivetech.com> > Signed-off-by: Huan Feng <huan.feng@starfivetech.com> > Signed-off-by: Jia Jie Ho <jiajie.ho@starfivetech.com> > Acked-by: Palmer Dabbelt <palmer@rivosinc.com> > --- > arch/riscv/boot/dts/starfive/jh7110.dtsi | 28 ++++++++++++++++++++++++ > 1 file changed, 28 insertions(+) > > diff --git a/arch/riscv/boot/dts/starfive/jh7110.dtsi b/arch/riscv/boot/dts/starfive/jh7110.dtsi > index a608433200e8..47cd12ccc988 100644 > --- a/arch/riscv/boot/dts/starfive/jh7110.dtsi > +++ b/arch/riscv/boot/dts/starfive/jh7110.dtsi > @@ -821,6 +821,34 @@ watchdog@13070000 { > <&syscrg JH7110_SYSRST_WDT_CORE>; > }; > > + crypto: crypto@16000000 { > + compatible = "starfive,jh7110-crypto"; > + reg = <0x0 0x16000000 0x0 0x4000>; > + clocks = <&stgcrg JH7110_STGCLK_SEC_AHB>, > + <&stgcrg JH7110_STGCLK_SEC_MISC_AHB>; > + clock-names = "hclk", "ahb"; > + interrupts = <28>; > + resets = <&stgcrg JH7110_STGRST_SEC_AHB>; > + dmas = <&sdma 1 2>, <&sdma 0 2>; > + dma-names = "tx", "rx"; > + }; > + > + sdma: dma@16008000 { > + compatible = "arm,pl080", "arm,primecell"; > + arm,primecell-periphid = <0x00041080>; > + reg = <0x0 0x16008000 0x0 0x4000>; > + interrupts = <29>; > + clocks = <&stgcrg JH7110_STGCLK_SEC_AHB>, > + <&stgcrg JH7110_STGCLK_SEC_MISC_AHB>; > + clock-names = "hclk", "apb_pclk"; > + resets = <&stgcrg JH7110_STGRST_SEC_AHB>; > + lli-bus-interface-ahb1; > + mem-bus-interface-ahb1; > + memcpy-burst-size = <256>; > + memcpy-bus-width = <32>; > + #dma-cells = <2>; > + }; > + Against linux-next, I get these warnings: arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2-v1.3b.dtb: dma@16008000: $nodename:0: 'dma@16008000' does not match '^dma-controller(@.*)?$' from schema $id: http://devicetree.org/schemas/dma/arm-pl08x.yaml# arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2-v1.3b.dtb: dma@16008000: clocks: [[26, 15], [26, 16]] is too long from schema $id: http://devicetree.org/schemas/dma/arm-pl08x.yaml# arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2-v1.3b.dtb: dma@16008000: clock-names: ['hclk', 'apb_pclk'] is too long from schema $id: http://devicetree.org/schemas/dma/arm-pl08x.yaml# arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2-v1.3b.dtb: dma@16008000: Unevaluated properties are not allowed ('#dma-cells' was unexpected) from schema $id: http://devicetree.org/schemas/dma/arm-pl08x.yaml# arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2-v1.2a.dtb: dma@16008000: $nodename:0: 'dma@16008000' does not match '^dma-controller(@.*)?$' from schema $id: http://devicetree.org/schemas/dma/arm-pl08x.yaml# arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2-v1.2a.dtb: dma@16008000: clocks: [[26, 15], [26, 16]] is too long from schema $id: http://devicetree.org/schemas/dma/arm-pl08x.yaml# arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2-v1.2a.dtb: dma@16008000: clock-names: ['hclk', 'apb_pclk'] is too long from schema $id: http://devicetree.org/schemas/dma/arm-pl08x.yaml# arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2-v1.2a.dtb: dma@16008000: Unevaluated properties are not allowed ('#dma-cells' was unexpected) from schema $id: http://devicetree.org/schemas/dma/arm-pl08x.yaml# Please fix these & submit a tested v2. Thanks, Conor. [-- Attachment #2: signature.asc --] [-- Type: application/pgp-signature, Size: 228 bytes --] ^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH 1/2] riscv: dts: starfive - Add crypto and DMA node for JH7110 2023-08-08 7:16 ` Conor Dooley @ 2023-08-08 7:38 ` Jia Jie Ho -1 siblings, 0 replies; 14+ messages in thread From: Jia Jie Ho @ 2023-08-08 7:38 UTC (permalink / raw) To: Conor Dooley Cc: Emil Renner Berthing, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Paul Walmsley, Palmer Dabbelt, Albert Ou, devicetree, linux-riscv, linux-kernel On 8/8/2023 3:16 pm, Conor Dooley wrote: > On Tue, Aug 08, 2023 at 02:11:49PM +0800, Jia Jie Ho wrote: >> Add hardware crypto module and dedicated dma controller node to StarFive >> JH7110 SoC. >> >> Co-developed-by: Huan Feng <huan.feng@starfivetech.com> >> Signed-off-by: Huan Feng <huan.feng@starfivetech.com> >> Signed-off-by: Jia Jie Ho <jiajie.ho@starfivetech.com> >> Acked-by: Palmer Dabbelt <palmer@rivosinc.com> >> --- >> arch/riscv/boot/dts/starfive/jh7110.dtsi | 28 ++++++++++++++++++++++++ >> 1 file changed, 28 insertions(+) >> >> diff --git a/arch/riscv/boot/dts/starfive/jh7110.dtsi b/arch/riscv/boot/dts/starfive/jh7110.dtsi >> index a608433200e8..47cd12ccc988 100644 >> --- a/arch/riscv/boot/dts/starfive/jh7110.dtsi >> +++ b/arch/riscv/boot/dts/starfive/jh7110.dtsi >> @@ -821,6 +821,34 @@ watchdog@13070000 { >> <&syscrg JH7110_SYSRST_WDT_CORE>; >> }; >> >> + crypto: crypto@16000000 { >> + compatible = "starfive,jh7110-crypto"; >> + reg = <0x0 0x16000000 0x0 0x4000>; >> + clocks = <&stgcrg JH7110_STGCLK_SEC_AHB>, >> + <&stgcrg JH7110_STGCLK_SEC_MISC_AHB>; >> + clock-names = "hclk", "ahb"; >> + interrupts = <28>; >> + resets = <&stgcrg JH7110_STGRST_SEC_AHB>; >> + dmas = <&sdma 1 2>, <&sdma 0 2>; >> + dma-names = "tx", "rx"; >> + }; >> + >> + sdma: dma@16008000 { >> + compatible = "arm,pl080", "arm,primecell"; >> + arm,primecell-periphid = <0x00041080>; >> + reg = <0x0 0x16008000 0x0 0x4000>; >> + interrupts = <29>; >> + clocks = <&stgcrg JH7110_STGCLK_SEC_AHB>, >> + <&stgcrg JH7110_STGCLK_SEC_MISC_AHB>; >> + clock-names = "hclk", "apb_pclk"; >> + resets = <&stgcrg JH7110_STGRST_SEC_AHB>; >> + lli-bus-interface-ahb1; >> + mem-bus-interface-ahb1; >> + memcpy-burst-size = <256>; >> + memcpy-bus-width = <32>; >> + #dma-cells = <2>; >> + }; >> + > > Against linux-next, I get these warnings: > arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2-v1.3b.dtb: dma@16008000: $nodename:0: 'dma@16008000' does not match '^dma-controller(@.*)?$' > from schema $id: http://devicetree.org/schemas/dma/arm-pl08x.yaml# > arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2-v1.3b.dtb: dma@16008000: clocks: [[26, 15], [26, 16]] is too long > from schema $id: http://devicetree.org/schemas/dma/arm-pl08x.yaml# > arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2-v1.3b.dtb: dma@16008000: clock-names: ['hclk', 'apb_pclk'] is too long > from schema $id: http://devicetree.org/schemas/dma/arm-pl08x.yaml# > arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2-v1.3b.dtb: dma@16008000: Unevaluated properties are not allowed ('#dma-cells' was unexpected) > from schema $id: http://devicetree.org/schemas/dma/arm-pl08x.yaml# > arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2-v1.2a.dtb: dma@16008000: $nodename:0: 'dma@16008000' does not match '^dma-controller(@.*)?$' > from schema $id: http://devicetree.org/schemas/dma/arm-pl08x.yaml# > arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2-v1.2a.dtb: dma@16008000: clocks: [[26, 15], [26, 16]] is too long > from schema $id: http://devicetree.org/schemas/dma/arm-pl08x.yaml# > arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2-v1.2a.dtb: dma@16008000: clock-names: ['hclk', 'apb_pclk'] is too long > from schema $id: http://devicetree.org/schemas/dma/arm-pl08x.yaml# > arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2-v1.2a.dtb: dma@16008000: Unevaluated properties are not allowed ('#dma-cells' was unexpected) > from schema $id: http://devicetree.org/schemas/dma/arm-pl08x.yaml# > > Please fix these & submit a tested v2. > Sorry, I missed testing the dma node. Will fix this in next version. Regards, Jia Jie _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv ^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH 1/2] riscv: dts: starfive - Add crypto and DMA node for JH7110 @ 2023-08-08 7:38 ` Jia Jie Ho 0 siblings, 0 replies; 14+ messages in thread From: Jia Jie Ho @ 2023-08-08 7:38 UTC (permalink / raw) To: Conor Dooley Cc: Emil Renner Berthing, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Paul Walmsley, Palmer Dabbelt, Albert Ou, devicetree, linux-riscv, linux-kernel On 8/8/2023 3:16 pm, Conor Dooley wrote: > On Tue, Aug 08, 2023 at 02:11:49PM +0800, Jia Jie Ho wrote: >> Add hardware crypto module and dedicated dma controller node to StarFive >> JH7110 SoC. >> >> Co-developed-by: Huan Feng <huan.feng@starfivetech.com> >> Signed-off-by: Huan Feng <huan.feng@starfivetech.com> >> Signed-off-by: Jia Jie Ho <jiajie.ho@starfivetech.com> >> Acked-by: Palmer Dabbelt <palmer@rivosinc.com> >> --- >> arch/riscv/boot/dts/starfive/jh7110.dtsi | 28 ++++++++++++++++++++++++ >> 1 file changed, 28 insertions(+) >> >> diff --git a/arch/riscv/boot/dts/starfive/jh7110.dtsi b/arch/riscv/boot/dts/starfive/jh7110.dtsi >> index a608433200e8..47cd12ccc988 100644 >> --- a/arch/riscv/boot/dts/starfive/jh7110.dtsi >> +++ b/arch/riscv/boot/dts/starfive/jh7110.dtsi >> @@ -821,6 +821,34 @@ watchdog@13070000 { >> <&syscrg JH7110_SYSRST_WDT_CORE>; >> }; >> >> + crypto: crypto@16000000 { >> + compatible = "starfive,jh7110-crypto"; >> + reg = <0x0 0x16000000 0x0 0x4000>; >> + clocks = <&stgcrg JH7110_STGCLK_SEC_AHB>, >> + <&stgcrg JH7110_STGCLK_SEC_MISC_AHB>; >> + clock-names = "hclk", "ahb"; >> + interrupts = <28>; >> + resets = <&stgcrg JH7110_STGRST_SEC_AHB>; >> + dmas = <&sdma 1 2>, <&sdma 0 2>; >> + dma-names = "tx", "rx"; >> + }; >> + >> + sdma: dma@16008000 { >> + compatible = "arm,pl080", "arm,primecell"; >> + arm,primecell-periphid = <0x00041080>; >> + reg = <0x0 0x16008000 0x0 0x4000>; >> + interrupts = <29>; >> + clocks = <&stgcrg JH7110_STGCLK_SEC_AHB>, >> + <&stgcrg JH7110_STGCLK_SEC_MISC_AHB>; >> + clock-names = "hclk", "apb_pclk"; >> + resets = <&stgcrg JH7110_STGRST_SEC_AHB>; >> + lli-bus-interface-ahb1; >> + mem-bus-interface-ahb1; >> + memcpy-burst-size = <256>; >> + memcpy-bus-width = <32>; >> + #dma-cells = <2>; >> + }; >> + > > Against linux-next, I get these warnings: > arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2-v1.3b.dtb: dma@16008000: $nodename:0: 'dma@16008000' does not match '^dma-controller(@.*)?$' > from schema $id: http://devicetree.org/schemas/dma/arm-pl08x.yaml# > arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2-v1.3b.dtb: dma@16008000: clocks: [[26, 15], [26, 16]] is too long > from schema $id: http://devicetree.org/schemas/dma/arm-pl08x.yaml# > arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2-v1.3b.dtb: dma@16008000: clock-names: ['hclk', 'apb_pclk'] is too long > from schema $id: http://devicetree.org/schemas/dma/arm-pl08x.yaml# > arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2-v1.3b.dtb: dma@16008000: Unevaluated properties are not allowed ('#dma-cells' was unexpected) > from schema $id: http://devicetree.org/schemas/dma/arm-pl08x.yaml# > arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2-v1.2a.dtb: dma@16008000: $nodename:0: 'dma@16008000' does not match '^dma-controller(@.*)?$' > from schema $id: http://devicetree.org/schemas/dma/arm-pl08x.yaml# > arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2-v1.2a.dtb: dma@16008000: clocks: [[26, 15], [26, 16]] is too long > from schema $id: http://devicetree.org/schemas/dma/arm-pl08x.yaml# > arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2-v1.2a.dtb: dma@16008000: clock-names: ['hclk', 'apb_pclk'] is too long > from schema $id: http://devicetree.org/schemas/dma/arm-pl08x.yaml# > arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2-v1.2a.dtb: dma@16008000: Unevaluated properties are not allowed ('#dma-cells' was unexpected) > from schema $id: http://devicetree.org/schemas/dma/arm-pl08x.yaml# > > Please fix these & submit a tested v2. > Sorry, I missed testing the dma node. Will fix this in next version. Regards, Jia Jie ^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH 0/2] riscv: dts: starfive - Add crypto and trng node 2023-08-08 6:11 ` Jia Jie Ho @ 2023-08-08 7:13 ` Conor Dooley -1 siblings, 0 replies; 14+ messages in thread From: Conor Dooley @ 2023-08-08 7:13 UTC (permalink / raw) To: Jia Jie Ho Cc: Emil Renner Berthing, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Paul Walmsley, Palmer Dabbelt, Albert Ou, devicetree, linux-riscv, linux-kernel [-- Attachment #1.1: Type: text/plain, Size: 423 bytes --] On Tue, Aug 08, 2023 at 02:11:48PM +0800, Jia Jie Ho wrote: > The following patches add hardware cryptographic and trng module nodes > to JH7110 dts. Patches have been tested on VisionFive2 board. > > Best regards, > Jia Jie > > Jia Jie Ho (2): > riscv: dts: starfive - Add crypto and DMA node for JH7110 > riscv: dts: starfive - Add hwrng node for JH7110 SoC I only got one patch, where is the other? [-- Attachment #1.2: signature.asc --] [-- Type: application/pgp-signature, Size: 228 bytes --] [-- Attachment #2: Type: text/plain, Size: 161 bytes --] _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv ^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH 0/2] riscv: dts: starfive - Add crypto and trng node @ 2023-08-08 7:13 ` Conor Dooley 0 siblings, 0 replies; 14+ messages in thread From: Conor Dooley @ 2023-08-08 7:13 UTC (permalink / raw) To: Jia Jie Ho Cc: Emil Renner Berthing, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Paul Walmsley, Palmer Dabbelt, Albert Ou, devicetree, linux-riscv, linux-kernel [-- Attachment #1: Type: text/plain, Size: 423 bytes --] On Tue, Aug 08, 2023 at 02:11:48PM +0800, Jia Jie Ho wrote: > The following patches add hardware cryptographic and trng module nodes > to JH7110 dts. Patches have been tested on VisionFive2 board. > > Best regards, > Jia Jie > > Jia Jie Ho (2): > riscv: dts: starfive - Add crypto and DMA node for JH7110 > riscv: dts: starfive - Add hwrng node for JH7110 SoC I only got one patch, where is the other? [-- Attachment #2: signature.asc --] [-- Type: application/pgp-signature, Size: 228 bytes --] ^ permalink raw reply [flat|nested] 14+ messages in thread
* RE: [PATCH 0/2] riscv: dts: starfive - Add crypto and trng node 2023-08-08 7:13 ` Conor Dooley @ 2023-08-08 10:17 ` JiaJie Ho -1 siblings, 0 replies; 14+ messages in thread From: JiaJie Ho @ 2023-08-08 10:17 UTC (permalink / raw) To: Conor Dooley Cc: Emil Renner Berthing, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Paul Walmsley, Palmer Dabbelt, Albert Ou, devicetree@vger.kernel.org, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org > On Tue, Aug 08, 2023 at 02:11:48PM +0800, Jia Jie Ho wrote: > > The following patches add hardware cryptographic and trng module nodes > > to JH7110 dts. Patches have been tested on VisionFive2 board. > > > > Best regards, > > Jia Jie > > > > Jia Jie Ho (2): > > riscv: dts: starfive - Add crypto and DMA node for JH7110 > > > riscv: dts: starfive - Add hwrng node for JH7110 SoC > > I only got one patch, where is the other? Hi Conor, My mailing server failed to send out the 2nd patch. Do I resend the patch or send it out together with other fixes in v2? Thanks Jia Jie _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv ^ permalink raw reply [flat|nested] 14+ messages in thread
* RE: [PATCH 0/2] riscv: dts: starfive - Add crypto and trng node @ 2023-08-08 10:17 ` JiaJie Ho 0 siblings, 0 replies; 14+ messages in thread From: JiaJie Ho @ 2023-08-08 10:17 UTC (permalink / raw) To: Conor Dooley Cc: Emil Renner Berthing, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Paul Walmsley, Palmer Dabbelt, Albert Ou, devicetree@vger.kernel.org, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org > On Tue, Aug 08, 2023 at 02:11:48PM +0800, Jia Jie Ho wrote: > > The following patches add hardware cryptographic and trng module nodes > > to JH7110 dts. Patches have been tested on VisionFive2 board. > > > > Best regards, > > Jia Jie > > > > Jia Jie Ho (2): > > riscv: dts: starfive - Add crypto and DMA node for JH7110 > > > riscv: dts: starfive - Add hwrng node for JH7110 SoC > > I only got one patch, where is the other? Hi Conor, My mailing server failed to send out the 2nd patch. Do I resend the patch or send it out together with other fixes in v2? Thanks Jia Jie ^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH 0/2] riscv: dts: starfive - Add crypto and trng node 2023-08-08 10:17 ` JiaJie Ho @ 2023-08-08 10:44 ` Conor Dooley -1 siblings, 0 replies; 14+ messages in thread From: Conor Dooley @ 2023-08-08 10:44 UTC (permalink / raw) To: JiaJie Ho Cc: Emil Renner Berthing, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Paul Walmsley, Palmer Dabbelt, Albert Ou, devicetree@vger.kernel.org, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org [-- Attachment #1.1: Type: text/plain, Size: 703 bytes --] On Tue, Aug 08, 2023 at 10:17:22AM +0000, JiaJie Ho wrote: > > On Tue, Aug 08, 2023 at 02:11:48PM +0800, Jia Jie Ho wrote: > > > The following patches add hardware cryptographic and trng module nodes > > > to JH7110 dts. Patches have been tested on VisionFive2 board. > > > > > > Best regards, > > > Jia Jie > > > > > > Jia Jie Ho (2): > > > riscv: dts: starfive - Add crypto and DMA node for JH7110 > > > > > riscv: dts: starfive - Add hwrng node for JH7110 SoC > > > > I only got one patch, where is the other? > > Hi Conor, > My mailing server failed to send out the 2nd patch. > Do I resend the patch or send it out together with other fixes in v2? A fixed up v2 please. [-- Attachment #1.2: signature.asc --] [-- Type: application/pgp-signature, Size: 228 bytes --] [-- Attachment #2: Type: text/plain, Size: 161 bytes --] _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv ^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH 0/2] riscv: dts: starfive - Add crypto and trng node @ 2023-08-08 10:44 ` Conor Dooley 0 siblings, 0 replies; 14+ messages in thread From: Conor Dooley @ 2023-08-08 10:44 UTC (permalink / raw) To: JiaJie Ho Cc: Emil Renner Berthing, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Paul Walmsley, Palmer Dabbelt, Albert Ou, devicetree@vger.kernel.org, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org [-- Attachment #1: Type: text/plain, Size: 703 bytes --] On Tue, Aug 08, 2023 at 10:17:22AM +0000, JiaJie Ho wrote: > > On Tue, Aug 08, 2023 at 02:11:48PM +0800, Jia Jie Ho wrote: > > > The following patches add hardware cryptographic and trng module nodes > > > to JH7110 dts. Patches have been tested on VisionFive2 board. > > > > > > Best regards, > > > Jia Jie > > > > > > Jia Jie Ho (2): > > > riscv: dts: starfive - Add crypto and DMA node for JH7110 > > > > > riscv: dts: starfive - Add hwrng node for JH7110 SoC > > > > I only got one patch, where is the other? > > Hi Conor, > My mailing server failed to send out the 2nd patch. > Do I resend the patch or send it out together with other fixes in v2? A fixed up v2 please. [-- Attachment #2: signature.asc --] [-- Type: application/pgp-signature, Size: 228 bytes --] ^ permalink raw reply [flat|nested] 14+ messages in thread
end of thread, other threads:[~2023-08-08 19:17 UTC | newest] Thread overview: 14+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2023-08-08 6:11 [PATCH 0/2] riscv: dts: starfive - Add crypto and trng node Jia Jie Ho 2023-08-08 6:11 ` Jia Jie Ho 2023-08-08 6:11 ` [PATCH 1/2] riscv: dts: starfive - Add crypto and DMA node for JH7110 Jia Jie Ho 2023-08-08 6:11 ` Jia Jie Ho 2023-08-08 7:16 ` Conor Dooley 2023-08-08 7:16 ` Conor Dooley 2023-08-08 7:38 ` Jia Jie Ho 2023-08-08 7:38 ` Jia Jie Ho 2023-08-08 7:13 ` [PATCH 0/2] riscv: dts: starfive - Add crypto and trng node Conor Dooley 2023-08-08 7:13 ` Conor Dooley 2023-08-08 10:17 ` JiaJie Ho 2023-08-08 10:17 ` JiaJie Ho 2023-08-08 10:44 ` Conor Dooley 2023-08-08 10:44 ` Conor Dooley
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