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From: Lucas De Marchi <lucas.demarchi@intel.com>
To: intel-xe@lists.freedesktop.org
Cc: Lucas De Marchi <lucas.demarchi@intel.com>,
	Matt Roper <matthew.d.roper@intel.com>
Subject: [Intel-xe] [PATCH v2 13/15] drm/xe/lnl: Add LNL platform definition
Date: Fri, 18 Aug 2023 15:08:22 -0700	[thread overview]
Message-ID: <20230818220824.700519-14-lucas.demarchi@intel.com> (raw)
In-Reply-To: <20230818220824.700519-1-lucas.demarchi@intel.com>

From: Matt Roper <matthew.d.roper@intel.com>

LNL is an integrated GPU based on the Xe2 architecture.

Bspec: 70821
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
Reviewed-by: Balasubramani Vivekanandan <balasubramani.vivekanandan@intel.com>
---
 drivers/gpu/drm/xe/xe_pci.c            | 7 +++++++
 drivers/gpu/drm/xe/xe_platform_types.h | 1 +
 include/drm/xe_pciids.h                | 5 +++++
 3 files changed, 13 insertions(+)

diff --git a/drivers/gpu/drm/xe/xe_pci.c b/drivers/gpu/drm/xe/xe_pci.c
index 70d5f25c0d20..5e3ffe76cc46 100644
--- a/drivers/gpu/drm/xe/xe_pci.c
+++ b/drivers/gpu/drm/xe/xe_pci.c
@@ -342,6 +342,12 @@ static const struct xe_device_desc mtl_desc = {
 	.has_display = true,
 };
 
+static const struct xe_device_desc lnl_desc = {
+	PLATFORM(XE_LUNARLAKE),
+	.has_4tile = true,
+	.require_force_probe = true,
+};
+
 #undef PLATFORM
 __diag_pop();
 
@@ -382,6 +388,7 @@ static const struct pci_device_id pciidlist[] = {
 	XE_DG2_IDS(INTEL_VGA_DEVICE, &dg2_desc),
 	XE_PVC_IDS(INTEL_VGA_DEVICE, &pvc_desc),
 	XE_MTL_IDS(INTEL_VGA_DEVICE, &mtl_desc),
+	XE_LNL_IDS(INTEL_VGA_DEVICE, &lnl_desc),
 	{ }
 };
 MODULE_DEVICE_TABLE(pci, pciidlist);
diff --git a/drivers/gpu/drm/xe/xe_platform_types.h b/drivers/gpu/drm/xe/xe_platform_types.h
index abbb8a1f29a8..e378a64a0f86 100644
--- a/drivers/gpu/drm/xe/xe_platform_types.h
+++ b/drivers/gpu/drm/xe/xe_platform_types.h
@@ -21,6 +21,7 @@ enum xe_platform {
 	XE_DG2,
 	XE_PVC,
 	XE_METEORLAKE,
+	XE_LUNARLAKE,
 };
 
 enum xe_subplatform {
diff --git a/include/drm/xe_pciids.h b/include/drm/xe_pciids.h
index 43afd973e153..29f07a00ac0f 100644
--- a/include/drm/xe_pciids.h
+++ b/include/drm/xe_pciids.h
@@ -207,4 +207,9 @@
 	XE_MTL_S_IDS(MACRO__, ## __VA_ARGS__),	\
 	XE_ARL_IDS(MACRO__, ## __VA_ARGS__)
 
+#define XE_LNL_IDS(MACRO__, ...) \
+	MACRO__(0x6420, ## __VA_ARGS__), \
+	MACRO__(0x64A0, ## __VA_ARGS__), \
+	MACRO__(0x64B0, ## __VA_ARGS__)
+
 #endif
-- 
2.40.1


  parent reply	other threads:[~2023-08-18 22:08 UTC|newest]

Thread overview: 33+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-08-18 22:08 [Intel-xe] [PATCH v2 00/15] Add Lunar Lake support Lucas De Marchi
2023-08-18 22:08 ` [Intel-xe] [PATCH v2 01/15] drm/xe/xe2: Update render/compute context image sizes Lucas De Marchi
2023-08-18 22:08 ` [Intel-xe] [PATCH v2 02/15] drm/xe/xe2: Add GT topology readout Lucas De Marchi
2023-08-18 22:08 ` [Intel-xe] [PATCH v2 03/15] drm/xe/xe2: Add MCR register steering for primary GT Lucas De Marchi
2023-08-21 14:32   ` Balasubramani Vivekanandan
2023-08-22 16:55     ` Matt Atwood
2023-08-18 22:08 ` [Intel-xe] [PATCH v2 04/15] drm/xe/xe2: Add MCR register steering for media GT Lucas De Marchi
2023-08-18 22:08 ` [Intel-xe] [PATCH v2 05/15] drm/xe/xe2: Update context image layouts Lucas De Marchi
2023-08-18 22:08 ` [Intel-xe] [PATCH v2 06/15] drm/xe/xe2: Handle fused-off CCS engines Lucas De Marchi
2023-08-18 22:08 ` [Intel-xe] [PATCH v2 07/15] drm/xe/xe2: AuxCCS is no longer used Lucas De Marchi
2023-08-18 22:08 ` [Intel-xe] [PATCH v2 08/15] drm/xe/xe2: Define Xe2_LPG IP features Lucas De Marchi
2023-08-21 14:58   ` Balasubramani Vivekanandan
2023-08-21 16:03     ` Lucas De Marchi
2023-08-22  5:38       ` Balasubramani Vivekanandan
2023-08-18 22:08 ` [Intel-xe] [PATCH v2 09/15] drm/xe/xe2: Define Xe2_LPM " Lucas De Marchi
2023-08-21 14:23   ` Matt Roper
2023-08-21 18:46     ` Lucas De Marchi
2023-08-22  5:41   ` Balasubramani Vivekanandan
2023-08-18 22:08 ` [Intel-xe] [PATCH v2 10/15] drm/xe/xe2: Track VA bits independently of max page table level Lucas De Marchi
2023-08-22  5:54   ` Balasubramani Vivekanandan
2023-08-18 22:08 ` [Intel-xe] [PATCH v2 11/15] drm/xe/xe2: Add MOCS table Lucas De Marchi
2023-08-18 22:08 ` [Intel-xe] [PATCH v2 12/15] drm/xe/xe2: Program GuC's MOCS on Xe2 and beyond Lucas De Marchi
2023-08-22  6:27   ` Balasubramani Vivekanandan
2023-08-18 22:08 ` Lucas De Marchi [this message]
2023-08-18 22:08 ` [Intel-xe] [PATCH v2 14/15] drm/xe/lnl: Add GuC firmware definition Lucas De Marchi
2023-08-18 22:08 ` [Intel-xe] [PATCH v2 15/15] drm/xe/lnl: Hook up MOCS table Lucas De Marchi
2023-08-18 22:11 ` [Intel-xe] ✓ CI.Patch_applied: success for Add Lunar Lake support (rev2) Patchwork
2023-08-18 22:11 ` [Intel-xe] ✗ CI.checkpatch: warning " Patchwork
2023-08-18 22:12 ` [Intel-xe] ✓ CI.KUnit: success " Patchwork
2023-08-18 22:16 ` [Intel-xe] ✓ CI.Build: " Patchwork
2023-08-18 22:17 ` [Intel-xe] ✓ CI.Hooks: " Patchwork
2023-08-18 22:17 ` [Intel-xe] ✗ CI.checksparse: warning " Patchwork
2023-08-18 22:44 ` [Intel-xe] ✓ CI.BAT: success " Patchwork

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