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From: Rob Herring <robh@kernel.org>
To: Suzuki K Poulose <suzuki.poulose@arm.com>
Cc: Linu Cherian <lcherian@marvell.com>,
	mike.leach@linaro.org, james.clark@arm.com, leo.yan@linaro.org,
	linux-arm-kernel@lists.infradead.org, coresight@lists.linaro.org,
	linux-kernel@vger.kernel.org, krzysztof.kozlowski+dt@linaro.org,
	conor+dt@kernel.org, devicetree@vger.kernel.org,
	sgoutham@marvell.com, gcherian@marvell.com
Subject: Re: [RFC PATCH v3 1/7] dt-bindings: arm: coresight-tmc: Add "memory-region" property
Date: Tue, 5 Sep 2023 10:35:28 -0500	[thread overview]
Message-ID: <20230905153528.GA3428758-robh@kernel.org> (raw)
In-Reply-To: <59bf237d-1645-8c44-94f2-72a0cf229595@arm.com>

On Mon, Sep 04, 2023 at 09:26:49AM +0100, Suzuki K Poulose wrote:
> On 04/09/2023 06:05, Linu Cherian wrote:
> > memory-region 0: Reserved trace buffer memory
> > 
> >    TMC ETR: When available, use this reserved memory region for
> >    trace data capture. Same region is used for trace data
> >    retention after a panic or watchdog reset.
> > 
> >    TMC ETF: When available, use this reserved memory region for
> >    trace data retention synced from internal SRAM after a panic or
> >    watchdog reset.
> > 
> > memory-region 1: Reserved meta data memory
> > 
> >    TMC ETR, ETF: When available, use this memory for register
> >    snapshot retention synced from hardware registers after a panic
> >    or watchdog reset.
> 
> Instead of having to use a number to map the memory regions, could
> we use
> 
> memory-region-names property to describe the index ? That way it
> is much easier to read and is less error prone.

You can, but the order should still be defined.

> Names could be something like:
> 
> tmc-reserved-trace
> tmc-reserved-metadata

Names are local to the binding. So 'tmc' is redundant. And everything is 
a reserved region for 'memory-region', so that's redundant too.

Rob

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WARNING: multiple messages have this Message-ID (diff)
From: Rob Herring <robh@kernel.org>
To: Suzuki K Poulose <suzuki.poulose@arm.com>
Cc: Linu Cherian <lcherian@marvell.com>,
	mike.leach@linaro.org, james.clark@arm.com, leo.yan@linaro.org,
	linux-arm-kernel@lists.infradead.org, coresight@lists.linaro.org,
	linux-kernel@vger.kernel.org, krzysztof.kozlowski+dt@linaro.org,
	conor+dt@kernel.org, devicetree@vger.kernel.org,
	sgoutham@marvell.com, gcherian@marvell.com
Subject: Re: [RFC PATCH v3 1/7] dt-bindings: arm: coresight-tmc: Add "memory-region" property
Date: Tue, 5 Sep 2023 10:35:28 -0500	[thread overview]
Message-ID: <20230905153528.GA3428758-robh@kernel.org> (raw)
In-Reply-To: <59bf237d-1645-8c44-94f2-72a0cf229595@arm.com>

On Mon, Sep 04, 2023 at 09:26:49AM +0100, Suzuki K Poulose wrote:
> On 04/09/2023 06:05, Linu Cherian wrote:
> > memory-region 0: Reserved trace buffer memory
> > 
> >    TMC ETR: When available, use this reserved memory region for
> >    trace data capture. Same region is used for trace data
> >    retention after a panic or watchdog reset.
> > 
> >    TMC ETF: When available, use this reserved memory region for
> >    trace data retention synced from internal SRAM after a panic or
> >    watchdog reset.
> > 
> > memory-region 1: Reserved meta data memory
> > 
> >    TMC ETR, ETF: When available, use this memory for register
> >    snapshot retention synced from hardware registers after a panic
> >    or watchdog reset.
> 
> Instead of having to use a number to map the memory regions, could
> we use
> 
> memory-region-names property to describe the index ? That way it
> is much easier to read and is less error prone.

You can, but the order should still be defined.

> Names could be something like:
> 
> tmc-reserved-trace
> tmc-reserved-metadata

Names are local to the binding. So 'tmc' is redundant. And everything is 
a reserved region for 'memory-region', so that's redundant too.

Rob

  reply	other threads:[~2023-09-05 15:36 UTC|newest]

Thread overview: 34+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-09-04  5:05 [RFC PATCH v3 0/8] Coresight for Kernel panic and watchdog reset Linu Cherian
2023-09-04  5:05 ` Linu Cherian
2023-09-04  5:05 ` [RFC PATCH v3 1/7] dt-bindings: arm: coresight-tmc: Add "memory-region" property Linu Cherian
2023-09-04  5:05   ` Linu Cherian
2023-09-04  6:23   ` Rob Herring
2023-09-04  6:23     ` Rob Herring
2023-09-09 14:12     ` [EXT] " Linu Cherian
2023-09-09 14:12       ` Linu Cherian
2023-09-04  8:26   ` Suzuki K Poulose
2023-09-04  8:26     ` Suzuki K Poulose
2023-09-05 15:35     ` Rob Herring [this message]
2023-09-05 15:35       ` Rob Herring
2023-09-09 14:06     ` [EXT] " Linu Cherian
2023-09-09 14:06       ` Linu Cherian
2023-09-04  5:05 ` [RFC PATCH v3 2/7] coresight: tmc-etr: Add support to use reserved trace memory Linu Cherian
2023-09-04  5:05   ` Linu Cherian
2023-09-04  5:05 ` [RFC PATCH v3 3/7] coresight: core: Add provision for panic callbacks Linu Cherian
2023-09-04  5:05   ` Linu Cherian
2023-09-04  5:05 ` [RFC PATCH v3 4/7] coresight: tmc: Enable panic sync handling Linu Cherian
2023-09-04  5:05   ` Linu Cherian
2023-09-04  5:05 ` [RFC PATCH v3 5/7] coresight: tmc: Add support for reading tracedata from previous boot Linu Cherian
2023-09-04  5:05   ` Linu Cherian
2023-09-04  5:05 ` [RFC PATCH v3 6/7] coresight: tmc: Stop trace capture on FlIn Linu Cherian
2023-09-04  5:05   ` Linu Cherian
2023-09-04  5:05 ` [RFC PATCH v3 7/7] coresight: etm4x: Configure ETM to trigger on panic Linu Cherian
2023-09-04  5:05   ` Linu Cherian
2023-09-15 13:50 ` [RFC PATCH v3 0/8] Coresight for Kernel panic and watchdog reset James Clark
2023-09-15 13:50   ` James Clark
2023-09-19 11:39   ` [EXT] " Linu Cherian
2023-09-19 11:39     ` Linu Cherian
2023-09-19 13:10     ` James Clark
2023-09-19 13:10       ` James Clark
2023-09-27  3:48       ` Linu Cherian
2023-09-27  3:48         ` Linu Cherian

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