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From: Luca Ceresoli <luca.ceresoli@bootlin.com>
To: Lucas Stach <l.stach@pengutronix.de>
Cc: Vinod Koul <vkoul@kernel.org>,
	Kishon Vijay Abraham I <kishon@kernel.org>,
	Pengutronix Kernel Team <kernel@pengutronix.de>,
	Fabio Estevam <festevam@gmail.com>,
	NXP Linux Team <linux-imx@nxp.com>,
	linux-phy@lists.infradead.org, devicetree@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	patchwork-lst@pengutronix.de,
	Richard Leitner <richard.leitner@skidata.com>,
	Sandor Yu <Sandor.yu@nxp.com>
Subject: Re: [PATCH v3 2/2] phy: freescale: add Samsung HDMI PHY
Date: Thu, 14 Sep 2023 23:16:10 +0200	[thread overview]
Message-ID: <20230914231610.2c339f7e@booty> (raw)
In-Reply-To: <20230906184211.1857585-2-l.stach@pengutronix.de>

Hi Lucas,

[+Cc: Sandor]

On Wed,  6 Sep 2023 20:42:11 +0200
Lucas Stach <l.stach@pengutronix.de> wrote:

> This adds the driver for the Samsung HDMI PHY found on the
> i.MX8MP SoC. Based on downstream implementation from
> Sandor Yu <Sandor.yu@nxp.com>.
> 
> Tested-by: Luca Ceresoli <luca.ceresoli@bootlin.com> (v2)

Also for v3:
[On custom board based on MSC SM2S-IMX8PLUS SMARC module]
Tested-by: Luca Ceresoli <luca.ceresoli@bootlin.com>

I have a few notes however, see below.

> +#define PHY_REG_14		0x38
> +#define  REG14_TOL_MASK		GENMASK(7, 4)
> +#define  REG14_RP_CODE_MASK	GENMASK(2, 1)

According to the latest reference manual currently available on the NXP
website (Rev. 1, 06/2021), this should be GENMASK(3, 1). This is
somewhat nitpicking as the only possible value documented is 2. But
let's continue...

> +#define PHY_REG_33		0x84
> +#define  REG33_MODE_SET_DONE	BIT(7)
> +#define  REG33_FIX_DA		BIT(1)

Here the reference manual is very different:

MODE_SET_DONE BIT(4)
TX_INV2       BIT(3)
TX_INV1       BIT(2)
TX_INV0       BIT(1)
MON_RXD       BIT(0)
bits 7-5 are reserved

...which is strange: in the code you are always writing 0 in bit 4,
which according to the docs means MODE_SET_DONE is always "Assert
forced global reset". Thus I guess your definitions come from the
downstream driver which, as it sadly happens, is more authoritative
than the docs. :-/

Sandor, can you confirm this, or provide any clarifications?

Otherwise LGTM.

Luca

-- 
Luca Ceresoli, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com

-- 
linux-phy mailing list
linux-phy@lists.infradead.org
https://lists.infradead.org/mailman/listinfo/linux-phy

WARNING: multiple messages have this Message-ID (diff)
From: Luca Ceresoli <luca.ceresoli@bootlin.com>
To: Lucas Stach <l.stach@pengutronix.de>
Cc: Vinod Koul <vkoul@kernel.org>,
	Kishon Vijay Abraham I <kishon@kernel.org>,
	Pengutronix Kernel Team <kernel@pengutronix.de>,
	Fabio Estevam <festevam@gmail.com>,
	NXP Linux Team <linux-imx@nxp.com>,
	linux-phy@lists.infradead.org, devicetree@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	patchwork-lst@pengutronix.de,
	Richard Leitner <richard.leitner@skidata.com>,
	Sandor Yu <Sandor.yu@nxp.com>
Subject: Re: [PATCH v3 2/2] phy: freescale: add Samsung HDMI PHY
Date: Thu, 14 Sep 2023 23:16:10 +0200	[thread overview]
Message-ID: <20230914231610.2c339f7e@booty> (raw)
In-Reply-To: <20230906184211.1857585-2-l.stach@pengutronix.de>

Hi Lucas,

[+Cc: Sandor]

On Wed,  6 Sep 2023 20:42:11 +0200
Lucas Stach <l.stach@pengutronix.de> wrote:

> This adds the driver for the Samsung HDMI PHY found on the
> i.MX8MP SoC. Based on downstream implementation from
> Sandor Yu <Sandor.yu@nxp.com>.
> 
> Tested-by: Luca Ceresoli <luca.ceresoli@bootlin.com> (v2)

Also for v3:
[On custom board based on MSC SM2S-IMX8PLUS SMARC module]
Tested-by: Luca Ceresoli <luca.ceresoli@bootlin.com>

I have a few notes however, see below.

> +#define PHY_REG_14		0x38
> +#define  REG14_TOL_MASK		GENMASK(7, 4)
> +#define  REG14_RP_CODE_MASK	GENMASK(2, 1)

According to the latest reference manual currently available on the NXP
website (Rev. 1, 06/2021), this should be GENMASK(3, 1). This is
somewhat nitpicking as the only possible value documented is 2. But
let's continue...

> +#define PHY_REG_33		0x84
> +#define  REG33_MODE_SET_DONE	BIT(7)
> +#define  REG33_FIX_DA		BIT(1)

Here the reference manual is very different:

MODE_SET_DONE BIT(4)
TX_INV2       BIT(3)
TX_INV1       BIT(2)
TX_INV0       BIT(1)
MON_RXD       BIT(0)
bits 7-5 are reserved

...which is strange: in the code you are always writing 0 in bit 4,
which according to the docs means MODE_SET_DONE is always "Assert
forced global reset". Thus I guess your definitions come from the
downstream driver which, as it sadly happens, is more authoritative
than the docs. :-/

Sandor, can you confirm this, or provide any clarifications?

Otherwise LGTM.

Luca

-- 
Luca Ceresoli, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

WARNING: multiple messages have this Message-ID (diff)
From: Luca Ceresoli <luca.ceresoli@bootlin.com>
To: Lucas Stach <l.stach@pengutronix.de>
Cc: Vinod Koul <vkoul@kernel.org>,
	Kishon Vijay Abraham I <kishon@kernel.org>,
	Pengutronix Kernel Team <kernel@pengutronix.de>,
	Fabio Estevam <festevam@gmail.com>,
	NXP Linux Team <linux-imx@nxp.com>,
	linux-phy@lists.infradead.org, devicetree@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	patchwork-lst@pengutronix.de,
	Richard Leitner <richard.leitner@skidata.com>,
	Sandor Yu <Sandor.yu@nxp.com>
Subject: Re: [PATCH v3 2/2] phy: freescale: add Samsung HDMI PHY
Date: Thu, 14 Sep 2023 23:16:10 +0200	[thread overview]
Message-ID: <20230914231610.2c339f7e@booty> (raw)
In-Reply-To: <20230906184211.1857585-2-l.stach@pengutronix.de>

Hi Lucas,

[+Cc: Sandor]

On Wed,  6 Sep 2023 20:42:11 +0200
Lucas Stach <l.stach@pengutronix.de> wrote:

> This adds the driver for the Samsung HDMI PHY found on the
> i.MX8MP SoC. Based on downstream implementation from
> Sandor Yu <Sandor.yu@nxp.com>.
> 
> Tested-by: Luca Ceresoli <luca.ceresoli@bootlin.com> (v2)

Also for v3:
[On custom board based on MSC SM2S-IMX8PLUS SMARC module]
Tested-by: Luca Ceresoli <luca.ceresoli@bootlin.com>

I have a few notes however, see below.

> +#define PHY_REG_14		0x38
> +#define  REG14_TOL_MASK		GENMASK(7, 4)
> +#define  REG14_RP_CODE_MASK	GENMASK(2, 1)

According to the latest reference manual currently available on the NXP
website (Rev. 1, 06/2021), this should be GENMASK(3, 1). This is
somewhat nitpicking as the only possible value documented is 2. But
let's continue...

> +#define PHY_REG_33		0x84
> +#define  REG33_MODE_SET_DONE	BIT(7)
> +#define  REG33_FIX_DA		BIT(1)

Here the reference manual is very different:

MODE_SET_DONE BIT(4)
TX_INV2       BIT(3)
TX_INV1       BIT(2)
TX_INV0       BIT(1)
MON_RXD       BIT(0)
bits 7-5 are reserved

...which is strange: in the code you are always writing 0 in bit 4,
which according to the docs means MODE_SET_DONE is always "Assert
forced global reset". Thus I guess your definitions come from the
downstream driver which, as it sadly happens, is more authoritative
than the docs. :-/

Sandor, can you confirm this, or provide any clarifications?

Otherwise LGTM.

Luca

-- 
Luca Ceresoli, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com

  parent reply	other threads:[~2023-09-14 21:16 UTC|newest]

Thread overview: 31+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-09-06 18:42 [PATCH v3 1/2] dt-bindings: phy: add binding for the i.MX8MP HDMI PHY Lucas Stach
2023-09-06 18:42 ` Lucas Stach
2023-09-06 18:42 ` Lucas Stach
2023-09-06 18:42 ` [PATCH v3 2/2] phy: freescale: add Samsung " Lucas Stach
2023-09-06 18:42   ` Lucas Stach
2023-09-06 18:42   ` Lucas Stach
2023-09-07  6:39   ` Alexander Stein
2023-09-07  6:39     ` Alexander Stein
2023-09-07  6:39     ` Alexander Stein
2023-09-07  9:13   ` Frieder Schrempf
2023-09-07  9:13     ` Frieder Schrempf
2023-09-07  9:13     ` Frieder Schrempf
2023-09-14 21:16   ` Luca Ceresoli [this message]
2023-09-14 21:16     ` Luca Ceresoli
2023-09-14 21:16     ` Luca Ceresoli
2023-09-15  1:49     ` [EXT] " Sandor Yu
2023-09-15  1:49       ` Sandor Yu
2023-09-15  1:49       ` Sandor Yu
2023-09-15  6:57       ` Luca Ceresoli
2023-09-15  6:57         ` Luca Ceresoli
2023-09-15  6:57         ` Luca Ceresoli
2023-10-13 10:37   ` Vinod Koul
2023-10-13 10:37     ` Vinod Koul
2023-10-13 10:37     ` Vinod Koul
2023-09-06 19:14 ` [PATCH v3 1/2] dt-bindings: phy: add binding for the i.MX8MP " Rob Herring
2023-09-06 19:14   ` Rob Herring
2023-09-06 19:14   ` Rob Herring
2023-09-14 21:16 ` Luca Ceresoli
2023-09-14 21:16   ` Luca Ceresoli
2023-09-14 21:16   ` Luca Ceresoli
2023-09-27 13:47 ` kernel test robot

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