From: Jonathan Cameron via <qemu-devel@nongnu.org>
To: Alistair Francis <alistair23@gmail.com>
Cc: <cbrowy@avery-design.com>, <wilfred.mallawa@wdc.com>,
<mst@redhat.com>, <lukas@wunner.de>, <kbusch@kernel.org>,
<hchkuo@avery-design.com.tw>, <its@irrelevant.dk>,
<jiewen.yao@intel.com>, <marcel.apfelbaum@gmail.com>,
<qemu-devel@nongnu.org>, Paolo Bonzini <pbonzini@redhat.com>,
<qemu-block@nongnu.org>,
Alistair Francis <alistair.francis@wdc.com>
Subject: Re: [PATCH v2 1/3] hw/pci: Add all Data Object Types defined in PCIe r6.0
Date: Tue, 17 Oct 2023 10:57:11 +0100 [thread overview]
Message-ID: <20231017105711.00001ed8@Huawei.com> (raw)
In-Reply-To: <20231017052155.173577-2-alistair.francis@wdc.com>
On Tue, 17 Oct 2023 15:21:53 +1000
Alistair Francis <alistair23@gmail.com> wrote:
> Add all of the defined protocols/features from the PCIe-SIG r6.0
> "Table 6-32 PCI-SIG defined Data Object Types (Vendor ID = 0001h)"
> table.
>
> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
If you feel like adding the PCIe r6.1 extras you could, but not necessary
at this point though I can see they might become relevant fairly soon,
particularly async messages and the connection ID stuff.
> ---
> include/hw/pci/pcie_doe.h | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff --git a/include/hw/pci/pcie_doe.h b/include/hw/pci/pcie_doe.h
> index 87dc17dcef..15d94661f9 100644
> --- a/include/hw/pci/pcie_doe.h
> +++ b/include/hw/pci/pcie_doe.h
> @@ -46,6 +46,8 @@ REG32(PCI_DOE_CAP_STATUS, 0)
>
> /* PCI-SIG defined Data Object Types - r6.0 Table 6-32 */
> #define PCI_SIG_DOE_DISCOVERY 0x00
> +#define PCI_SIG_DOE_CMA 0x01
> +#define PCI_SIG_DOE_SECURED_CMA 0x02
>
> #define PCI_DOE_DW_SIZE_MAX (1 << 18)
> #define PCI_DOE_PROTOCOL_NUM_MAX 256
WARNING: multiple messages have this Message-ID (diff)
From: Jonathan Cameron <Jonathan.Cameron@Huawei.com>
To: Alistair Francis <alistair23@gmail.com>
Cc: <cbrowy@avery-design.com>, <wilfred.mallawa@wdc.com>,
<mst@redhat.com>, <lukas@wunner.de>, <kbusch@kernel.org>,
<hchkuo@avery-design.com.tw>, <its@irrelevant.dk>,
<jiewen.yao@intel.com>, <marcel.apfelbaum@gmail.com>,
<qemu-devel@nongnu.org>, Paolo Bonzini <pbonzini@redhat.com>,
<qemu-block@nongnu.org>,
Alistair Francis <alistair.francis@wdc.com>
Subject: Re: [PATCH v2 1/3] hw/pci: Add all Data Object Types defined in PCIe r6.0
Date: Tue, 17 Oct 2023 10:57:11 +0100 [thread overview]
Message-ID: <20231017105711.00001ed8@Huawei.com> (raw)
Message-ID: <20231017095711.c1BacN3SYZ7PK617H90D_3p0emLanrvJ0UP_s1xQrRI@z> (raw)
In-Reply-To: <20231017052155.173577-2-alistair.francis@wdc.com>
On Tue, 17 Oct 2023 15:21:53 +1000
Alistair Francis <alistair23@gmail.com> wrote:
> Add all of the defined protocols/features from the PCIe-SIG r6.0
> "Table 6-32 PCI-SIG defined Data Object Types (Vendor ID = 0001h)"
> table.
>
> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
If you feel like adding the PCIe r6.1 extras you could, but not necessary
at this point though I can see they might become relevant fairly soon,
particularly async messages and the connection ID stuff.
> ---
> include/hw/pci/pcie_doe.h | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff --git a/include/hw/pci/pcie_doe.h b/include/hw/pci/pcie_doe.h
> index 87dc17dcef..15d94661f9 100644
> --- a/include/hw/pci/pcie_doe.h
> +++ b/include/hw/pci/pcie_doe.h
> @@ -46,6 +46,8 @@ REG32(PCI_DOE_CAP_STATUS, 0)
>
> /* PCI-SIG defined Data Object Types - r6.0 Table 6-32 */
> #define PCI_SIG_DOE_DISCOVERY 0x00
> +#define PCI_SIG_DOE_CMA 0x01
> +#define PCI_SIG_DOE_SECURED_CMA 0x02
>
> #define PCI_DOE_DW_SIZE_MAX (1 << 18)
> #define PCI_DOE_PROTOCOL_NUM_MAX 256
next prev parent reply other threads:[~2023-10-17 9:58 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-10-17 5:21 [PATCH v2 0/3] Initial support for SPDM Responders Alistair Francis
2023-10-17 5:21 ` [PATCH v2 1/3] hw/pci: Add all Data Object Types defined in PCIe r6.0 Alistair Francis
2023-10-17 9:57 ` Jonathan Cameron via [this message]
2023-10-17 9:57 ` Jonathan Cameron
2023-10-17 5:21 ` [PATCH v2 2/3] backends: Initial support for SPDM socket support Alistair Francis
2023-10-17 10:04 ` Jonathan Cameron via
2023-10-17 10:04 ` Jonathan Cameron
2023-10-17 5:21 ` [PATCH v2 3/3] hw/nvme: Add SPDM over DOE support Alistair Francis
2023-10-17 10:18 ` Jonathan Cameron via
2023-10-17 10:18 ` Jonathan Cameron
2023-11-15 9:29 ` Klaus Jensen
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