All of lore.kernel.org
 help / color / mirror / Atom feed
From: Sunil V L <sunilvl@ventanamicro.com>
To: qemu-riscv@nongnu.org, qemu-arm@nongnu.org, qemu-devel@nongnu.org
Cc: "Shannon Zhao" <shannon.zhaosl@gmail.com>,
	"Peter Maydell" <peter.maydell@linaro.org>,
	"Michael S . Tsirkin" <mst@redhat.com>,
	"Igor Mammedov" <imammedo@redhat.com>,
	"Ani Sinha" <anisinha@redhat.com>,
	"Philippe Mathieu-Daudé" <philmd@linaro.org>,
	"Gerd Hoffmann" <kraxel@redhat.com>,
	"Paolo Bonzini" <pbonzini@redhat.com>,
	"Palmer Dabbelt" <palmer@dabbelt.com>,
	"Alistair Francis" <alistair.francis@wdc.com>,
	"Bin Meng" <bin.meng@windriver.com>,
	"Weiwei Li" <liweiwei@iscas.ac.cn>,
	"Daniel Henrique Barboza" <dbarboza@ventanamicro.com>,
	"Liu Zhiwei" <zhiwei_liu@linux.alibaba.com>,
	"Anup Patel" <apatel@ventanamicro.com>,
	"Andrew Jones" <ajones@ventanamicro.com>,
	"Atish Kumar Patra" <atishp@rivosinc.com>,
	"Haibo Xu" <haibo1.xu@intel.com>,
	"Sunil V L" <sunilvl@ventanamicro.com>
Subject: [PATCH v3 00/12] RISC-V: ACPI: Enable AIA, PLIC and update RHCT
Date: Thu, 19 Oct 2023 18:56:36 +0530	[thread overview]
Message-ID: <20231019132648.23703-1-sunilvl@ventanamicro.com> (raw)

This series primarily enables external interrupt controllers (AIA and PLIC)
in ACPI tables for RISC-V virt platform. It also updates RHCT with CMO and
MMU related information.

Below ECRs for these changes are approved by ASWG and will be
available in next ACPI spec release.

1) MADT (AIA) - https://drive.google.com/file/d/1oMGPyOD58JaPgMl1pKasT-VKsIKia7zR/view?usp=sharing
2) RHCT - https://drive.google.com/file/d/1sKbOa8m1UZw1JkquZYe3F1zQBN1xXsaf/view?usp=sharing

First two patches in this series are to migrate a couple of functions from
ARM architecture to common code so that RISC-V doesn't need to duplicate
the same.

The patch set is based on Alistair's riscv-to-apply.next branch.

These changes are also available in  riscv_acpi_b2_v3 branch at:
https://github.com/vlsunil/qemu/

Changes since v2:
        1) Rebased to latest riscv-to-apply.next branch which needed
           changing ext_icboz to ext_zicboz in CMO patch.
        2) Fixed node type in MMU node.
        3) Added latest tags.

Changes since v1:
        1) As per Igor's suggestion, migrated fw_cfg and virtio creation
           functions to device specific file instead of generic aml-build.c.
           Since ACPI is optional, new files are created and enabled for
           build only when CONFIG_ACPI is enabled.
        2) As per Igor's suggestion, properties are added to the GPEX PCI
           host to indicate MMIO ranges. The platform fw can initialize
           these to appropriate values and the DSDT generator can fetch
           the information from the host bus itself. This makes the code
           generic instead of machine specific.
        3) Added PLIC patch from Haibo.
        4) Rebased to latest riscv-to-apply.next and added RB tags as
           appropriate.

Sunil V L (12):
  hw/arm/virt-acpi-build.c: Migrate fw_cfg creation to common location
  hw/arm/virt-acpi-build.c: Migrate virtio creation to common location
  hw/riscv: virt: Make few IMSIC macros and functions public
  hw/riscv/virt-acpi-build.c: Add AIA support in RINTC
  hw/riscv/virt-acpi-build.c: Add IMSIC in the MADT
  hw/riscv/virt-acpi-build.c: Add APLIC in the MADT
  hw/riscv/virt-acpi-build.c: Add CMO information in RHCT
  hw/riscv/virt-acpi-build.c: Add MMU node in RHCT
  hw/pci-host/gpex: Define properties for MMIO ranges
  hw/riscv/virt: Update GPEX MMIO related properties
  hw/riscv/virt-acpi-build.c: Add IO controllers and devices
  hw/riscv/virt-acpi-build.c: Add PLIC in MADT

 hw/arm/virt-acpi-build.c        |  48 +----
 hw/nvram/fw_cfg-acpi.c          |  17 ++
 hw/nvram/meson.build            |   1 +
 hw/pci-host/gpex-acpi.c         |  13 ++
 hw/pci-host/gpex.c              |  12 ++
 hw/riscv/Kconfig                |   1 +
 hw/riscv/virt-acpi-build.c      | 342 +++++++++++++++++++++++++++++---
 hw/riscv/virt.c                 |  72 +++----
 hw/virtio/meson.build           |   1 +
 hw/virtio/virtio-acpi.c         |  28 +++
 include/hw/nvram/fw_cfg_acpi.h  |   9 +
 include/hw/pci-host/gpex.h      |  28 ++-
 include/hw/riscv/virt.h         |  26 +++
 include/hw/virtio/virtio-acpi.h |  11 +
 14 files changed, 492 insertions(+), 117 deletions(-)
 create mode 100644 hw/nvram/fw_cfg-acpi.c
 create mode 100644 hw/virtio/virtio-acpi.c
 create mode 100644 include/hw/nvram/fw_cfg_acpi.h
 create mode 100644 include/hw/virtio/virtio-acpi.h

-- 
2.34.1



             reply	other threads:[~2023-10-19 13:27 UTC|newest]

Thread overview: 30+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-10-19 13:26 Sunil V L [this message]
2023-10-19 13:26 ` [PATCH v3 01/12] hw/arm/virt-acpi-build.c: Migrate fw_cfg creation to common location Sunil V L
2023-10-23 12:22   ` Andrew Jones
2023-10-19 13:26 ` [PATCH v3 02/12] hw/arm/virt-acpi-build.c: Migrate virtio " Sunil V L
2023-10-20 11:42   ` Daniel Henrique Barboza
2023-10-23 12:28   ` Andrew Jones
2023-10-25 20:03     ` Sunil V L
2023-10-19 13:26 ` [PATCH v3 03/12] hw/riscv: virt: Make few IMSIC macros and functions public Sunil V L
2023-10-23 12:31   ` Andrew Jones
2023-10-19 13:26 ` [PATCH v3 04/12] hw/riscv/virt-acpi-build.c: Add AIA support in RINTC Sunil V L
2023-10-24  0:07   ` Alistair Francis
2023-10-19 13:26 ` [PATCH v3 05/12] hw/riscv/virt-acpi-build.c: Add IMSIC in the MADT Sunil V L
2023-10-23 12:42   ` Andrew Jones
2023-10-24  0:10   ` Alistair Francis
2023-10-19 13:26 ` [PATCH v3 06/12] hw/riscv/virt-acpi-build.c: Add APLIC " Sunil V L
2023-10-23 12:46   ` Andrew Jones
2023-10-24  0:10   ` Alistair Francis
2023-10-19 13:26 ` [PATCH v3 07/12] hw/riscv/virt-acpi-build.c: Add CMO information in RHCT Sunil V L
2023-10-23 12:51   ` Andrew Jones
2023-10-23 13:17   ` Andrew Jones
2023-10-24  0:12   ` Alistair Francis
2023-10-19 13:26 ` [PATCH v3 08/12] hw/riscv/virt-acpi-build.c: Add MMU node " Sunil V L
2023-10-23 13:15   ` Andrew Jones
2023-10-19 13:26 ` [PATCH v3 09/12] hw/pci-host/gpex: Define properties for MMIO ranges Sunil V L
2023-10-19 13:26 ` [PATCH v3 10/12] hw/riscv/virt: Update GPEX MMIO related properties Sunil V L
2023-10-20 11:47   ` Daniel Henrique Barboza
2023-10-19 13:26 ` [PATCH v3 11/12] hw/riscv/virt-acpi-build.c: Add IO controllers and devices Sunil V L
2023-10-19 13:26 ` [PATCH v3 12/12] hw/riscv/virt-acpi-build.c: Add PLIC in MADT Sunil V L
2023-10-20 11:49   ` Daniel Henrique Barboza
2023-10-23 13:22   ` Andrew Jones

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20231019132648.23703-1-sunilvl@ventanamicro.com \
    --to=sunilvl@ventanamicro.com \
    --cc=ajones@ventanamicro.com \
    --cc=alistair.francis@wdc.com \
    --cc=anisinha@redhat.com \
    --cc=apatel@ventanamicro.com \
    --cc=atishp@rivosinc.com \
    --cc=bin.meng@windriver.com \
    --cc=dbarboza@ventanamicro.com \
    --cc=haibo1.xu@intel.com \
    --cc=imammedo@redhat.com \
    --cc=kraxel@redhat.com \
    --cc=liweiwei@iscas.ac.cn \
    --cc=mst@redhat.com \
    --cc=palmer@dabbelt.com \
    --cc=pbonzini@redhat.com \
    --cc=peter.maydell@linaro.org \
    --cc=philmd@linaro.org \
    --cc=qemu-arm@nongnu.org \
    --cc=qemu-devel@nongnu.org \
    --cc=qemu-riscv@nongnu.org \
    --cc=shannon.zhaosl@gmail.com \
    --cc=zhiwei_liu@linux.alibaba.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.