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From: Sunil V L <sunilvl@ventanamicro.com>
To: qemu-riscv@nongnu.org, qemu-arm@nongnu.org, qemu-devel@nongnu.org
Cc: "Shannon Zhao" <shannon.zhaosl@gmail.com>,
	"Peter Maydell" <peter.maydell@linaro.org>,
	"Michael S . Tsirkin" <mst@redhat.com>,
	"Igor Mammedov" <imammedo@redhat.com>,
	"Ani Sinha" <anisinha@redhat.com>,
	"Philippe Mathieu-Daudé" <philmd@linaro.org>,
	"Gerd Hoffmann" <kraxel@redhat.com>,
	"Paolo Bonzini" <pbonzini@redhat.com>,
	"Palmer Dabbelt" <palmer@dabbelt.com>,
	"Alistair Francis" <alistair.francis@wdc.com>,
	"Bin Meng" <bin.meng@windriver.com>,
	"Weiwei Li" <liweiwei@iscas.ac.cn>,
	"Daniel Henrique Barboza" <dbarboza@ventanamicro.com>,
	"Liu Zhiwei" <zhiwei_liu@linux.alibaba.com>,
	"Anup Patel" <apatel@ventanamicro.com>,
	"Andrew Jones" <ajones@ventanamicro.com>,
	"Atish Kumar Patra" <atishp@rivosinc.com>,
	"Haibo Xu" <haibo1.xu@intel.com>,
	"Sunil V L" <sunilvl@ventanamicro.com>
Subject: [PATCH v3 06/12] hw/riscv/virt-acpi-build.c: Add APLIC in the MADT
Date: Thu, 19 Oct 2023 18:56:42 +0530	[thread overview]
Message-ID: <20231019132648.23703-7-sunilvl@ventanamicro.com> (raw)
In-Reply-To: <20231019132648.23703-1-sunilvl@ventanamicro.com>

Add APLIC structures for each socket in the MADT when system is configured
with APLIC as the external wired interrupt controller.

Signed-off-by: Sunil V L <sunilvl@ventanamicro.com>
Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
---
 hw/riscv/virt-acpi-build.c | 36 ++++++++++++++++++++++++++++++++++--
 1 file changed, 34 insertions(+), 2 deletions(-)

diff --git a/hw/riscv/virt-acpi-build.c b/hw/riscv/virt-acpi-build.c
index 7f1a370e54..8fa358d034 100644
--- a/hw/riscv/virt-acpi-build.c
+++ b/hw/riscv/virt-acpi-build.c
@@ -277,9 +277,9 @@ static void build_madt(GArray *table_data,
     MachineClass *mc = MACHINE_GET_CLASS(s);
     MachineState *ms = MACHINE(s);
     const CPUArchIdList *arch_ids = mc->possible_cpu_arch_ids(ms);
-    uint64_t imsic_socket_addr, imsic_addr;
+    uint64_t imsic_socket_addr, imsic_addr, aplic_addr;
+    uint32_t imsic_size, gsi_base;
     uint8_t  guest_index_bits;
-    uint32_t imsic_size;
     uint32_t local_cpu_id, socket_id;
     uint8_t  hart_index_bits, group_index_bits, group_index_shift;
     uint16_t imsic_max_hart_per_socket = 0;
@@ -341,6 +341,38 @@ static void build_madt(GArray *table_data,
         build_append_int_noprefix(table_data, group_index_shift, 1);
     }
 
+    if (s->aia_type != VIRT_AIA_TYPE_NONE) {
+        /* APLICs */
+        for (socket = 0; socket < riscv_socket_count(ms); socket++) {
+            aplic_addr = s->memmap[VIRT_APLIC_S].base +
+                             s->memmap[VIRT_APLIC_S].size * socket;
+            gsi_base = VIRT_IRQCHIP_NUM_SOURCES * socket;
+            build_append_int_noprefix(table_data, 0x1A, 1);    /* Type */
+            build_append_int_noprefix(table_data, 36, 1);      /* Length */
+            build_append_int_noprefix(table_data, 1, 1);       /* Version */
+            build_append_int_noprefix(table_data, socket, 1);  /* APLIC ID */
+            build_append_int_noprefix(table_data, 0, 4);       /* Flags */
+            build_append_int_noprefix(table_data, 0, 8);       /* Hardware ID */
+            /* Number of IDCs */
+            if (s->aia_type == VIRT_AIA_TYPE_APLIC) {
+                build_append_int_noprefix(table_data,
+                                          s->soc[socket].num_harts,
+                                          2);
+            } else {
+                build_append_int_noprefix(table_data, 0, 2);
+            }
+            /* Total External Interrupt Sources Supported */
+            build_append_int_noprefix(table_data, VIRT_IRQCHIP_NUM_SOURCES, 2);
+            /* Global System Interrupt Base */
+            build_append_int_noprefix(table_data, gsi_base, 4);
+            /* APLIC Address */
+            build_append_int_noprefix(table_data, aplic_addr, 8);
+            /* APLIC size */
+            build_append_int_noprefix(table_data,
+                                      s->memmap[VIRT_APLIC_S].size, 4);
+        }
+    }
+
     acpi_table_end(linker, &table);
 }
 
-- 
2.34.1



  parent reply	other threads:[~2023-10-19 13:28 UTC|newest]

Thread overview: 30+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-10-19 13:26 [PATCH v3 00/12] RISC-V: ACPI: Enable AIA, PLIC and update RHCT Sunil V L
2023-10-19 13:26 ` [PATCH v3 01/12] hw/arm/virt-acpi-build.c: Migrate fw_cfg creation to common location Sunil V L
2023-10-23 12:22   ` Andrew Jones
2023-10-19 13:26 ` [PATCH v3 02/12] hw/arm/virt-acpi-build.c: Migrate virtio " Sunil V L
2023-10-20 11:42   ` Daniel Henrique Barboza
2023-10-23 12:28   ` Andrew Jones
2023-10-25 20:03     ` Sunil V L
2023-10-19 13:26 ` [PATCH v3 03/12] hw/riscv: virt: Make few IMSIC macros and functions public Sunil V L
2023-10-23 12:31   ` Andrew Jones
2023-10-19 13:26 ` [PATCH v3 04/12] hw/riscv/virt-acpi-build.c: Add AIA support in RINTC Sunil V L
2023-10-24  0:07   ` Alistair Francis
2023-10-19 13:26 ` [PATCH v3 05/12] hw/riscv/virt-acpi-build.c: Add IMSIC in the MADT Sunil V L
2023-10-23 12:42   ` Andrew Jones
2023-10-24  0:10   ` Alistair Francis
2023-10-19 13:26 ` Sunil V L [this message]
2023-10-23 12:46   ` [PATCH v3 06/12] hw/riscv/virt-acpi-build.c: Add APLIC " Andrew Jones
2023-10-24  0:10   ` Alistair Francis
2023-10-19 13:26 ` [PATCH v3 07/12] hw/riscv/virt-acpi-build.c: Add CMO information in RHCT Sunil V L
2023-10-23 12:51   ` Andrew Jones
2023-10-23 13:17   ` Andrew Jones
2023-10-24  0:12   ` Alistair Francis
2023-10-19 13:26 ` [PATCH v3 08/12] hw/riscv/virt-acpi-build.c: Add MMU node " Sunil V L
2023-10-23 13:15   ` Andrew Jones
2023-10-19 13:26 ` [PATCH v3 09/12] hw/pci-host/gpex: Define properties for MMIO ranges Sunil V L
2023-10-19 13:26 ` [PATCH v3 10/12] hw/riscv/virt: Update GPEX MMIO related properties Sunil V L
2023-10-20 11:47   ` Daniel Henrique Barboza
2023-10-19 13:26 ` [PATCH v3 11/12] hw/riscv/virt-acpi-build.c: Add IO controllers and devices Sunil V L
2023-10-19 13:26 ` [PATCH v3 12/12] hw/riscv/virt-acpi-build.c: Add PLIC in MADT Sunil V L
2023-10-20 11:49   ` Daniel Henrique Barboza
2023-10-23 13:22   ` Andrew Jones

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