From: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
To: Sunil V L <sunilvl@ventanamicro.com>,
qemu-riscv@nongnu.org, qemu-arm@nongnu.org,
qemu-devel@nongnu.org
Cc: "Shannon Zhao" <shannon.zhaosl@gmail.com>,
"Peter Maydell" <peter.maydell@linaro.org>,
"Michael S . Tsirkin" <mst@redhat.com>,
"Igor Mammedov" <imammedo@redhat.com>,
"Ani Sinha" <anisinha@redhat.com>,
"Philippe Mathieu-Daudé" <philmd@linaro.org>,
"Gerd Hoffmann" <kraxel@redhat.com>,
"Paolo Bonzini" <pbonzini@redhat.com>,
"Palmer Dabbelt" <palmer@dabbelt.com>,
"Alistair Francis" <alistair.francis@wdc.com>,
"Bin Meng" <bin.meng@windriver.com>,
"Weiwei Li" <liweiwei@iscas.ac.cn>,
"Liu Zhiwei" <zhiwei_liu@linux.alibaba.com>,
"Anup Patel" <apatel@ventanamicro.com>,
"Andrew Jones" <ajones@ventanamicro.com>,
"Atish Kumar Patra" <atishp@rivosinc.com>,
"Haibo Xu" <haibo1.xu@intel.com>
Subject: Re: [PATCH v3 12/12] hw/riscv/virt-acpi-build.c: Add PLIC in MADT
Date: Fri, 20 Oct 2023 08:49:20 -0300 [thread overview]
Message-ID: <bdaa5804-eff0-4d5e-ba61-c277aa3195cd@ventanamicro.com> (raw)
In-Reply-To: <20231019132648.23703-13-sunilvl@ventanamicro.com>
On 10/19/23 10:26, Sunil V L wrote:
> Add PLIC structures for each socket in the MADT when system is configured
> with PLIC as the external interrupt controller.
>
> Signed-off-by: Haibo Xu <haibo1.xu@intel.com>
> Signed-off-by: Sunil V L <sunilvl@ventanamicro.com>
> ---
Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
> hw/riscv/virt-acpi-build.c | 29 +++++++++++++++++++++++++++++
> 1 file changed, 29 insertions(+)
>
> diff --git a/hw/riscv/virt-acpi-build.c b/hw/riscv/virt-acpi-build.c
> index 2f1cc92f75..d1761ddddf 100644
> --- a/hw/riscv/virt-acpi-build.c
> +++ b/hw/riscv/virt-acpi-build.c
> @@ -85,6 +85,12 @@ static void riscv_acpi_madt_add_rintc(uint32_t uid,
> arch_ids->cpus[uid].props.node_id,
> local_cpu_id),
> 4);
> + } else if (aia_type == VIRT_AIA_TYPE_NONE) {
> + build_append_int_noprefix(entry,
> + ACPI_BUILD_INTC_ID(
> + arch_ids->cpus[uid].props.node_id,
> + 2 * local_cpu_id + 1),
> + 4);
> } else {
> build_append_int_noprefix(entry, 0, 4);
> }
> @@ -513,6 +519,29 @@ static void build_madt(GArray *table_data,
> build_append_int_noprefix(table_data,
> s->memmap[VIRT_APLIC_S].size, 4);
> }
> + } else {
> + /* PLICs */
> + for (socket = 0; socket < riscv_socket_count(ms); socket++) {
> + aplic_addr = s->memmap[VIRT_PLIC].base +
> + s->memmap[VIRT_PLIC].size * socket;
> + gsi_base = VIRT_IRQCHIP_NUM_SOURCES * socket;
> + build_append_int_noprefix(table_data, 0x1B, 1); /* Type */
> + build_append_int_noprefix(table_data, 36, 1); /* Length */
> + build_append_int_noprefix(table_data, 1, 1); /* Version */
> + build_append_int_noprefix(table_data, socket, 1); /* PLIC ID */
> + build_append_int_noprefix(table_data, 0, 8); /* Hardware ID */
> + /* Total External Interrupt Sources Supported */
> + build_append_int_noprefix(table_data,
> + VIRT_IRQCHIP_NUM_SOURCES - 1, 2);
> + build_append_int_noprefix(table_data, 0, 2); /* Max priority */
> + build_append_int_noprefix(table_data, 0, 4); /* Flags */
> + /* PLIC Size */
> + build_append_int_noprefix(table_data, s->memmap[VIRT_PLIC].size, 4);
> + /* PLIC Address */
> + build_append_int_noprefix(table_data, aplic_addr, 8);
> + /* Global System Interrupt Vector Base */
> + build_append_int_noprefix(table_data, gsi_base, 4);
> + }
> }
>
> acpi_table_end(linker, &table);
next prev parent reply other threads:[~2023-10-20 11:50 UTC|newest]
Thread overview: 30+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-10-19 13:26 [PATCH v3 00/12] RISC-V: ACPI: Enable AIA, PLIC and update RHCT Sunil V L
2023-10-19 13:26 ` [PATCH v3 01/12] hw/arm/virt-acpi-build.c: Migrate fw_cfg creation to common location Sunil V L
2023-10-23 12:22 ` Andrew Jones
2023-10-19 13:26 ` [PATCH v3 02/12] hw/arm/virt-acpi-build.c: Migrate virtio " Sunil V L
2023-10-20 11:42 ` Daniel Henrique Barboza
2023-10-23 12:28 ` Andrew Jones
2023-10-25 20:03 ` Sunil V L
2023-10-19 13:26 ` [PATCH v3 03/12] hw/riscv: virt: Make few IMSIC macros and functions public Sunil V L
2023-10-23 12:31 ` Andrew Jones
2023-10-19 13:26 ` [PATCH v3 04/12] hw/riscv/virt-acpi-build.c: Add AIA support in RINTC Sunil V L
2023-10-24 0:07 ` Alistair Francis
2023-10-19 13:26 ` [PATCH v3 05/12] hw/riscv/virt-acpi-build.c: Add IMSIC in the MADT Sunil V L
2023-10-23 12:42 ` Andrew Jones
2023-10-24 0:10 ` Alistair Francis
2023-10-19 13:26 ` [PATCH v3 06/12] hw/riscv/virt-acpi-build.c: Add APLIC " Sunil V L
2023-10-23 12:46 ` Andrew Jones
2023-10-24 0:10 ` Alistair Francis
2023-10-19 13:26 ` [PATCH v3 07/12] hw/riscv/virt-acpi-build.c: Add CMO information in RHCT Sunil V L
2023-10-23 12:51 ` Andrew Jones
2023-10-23 13:17 ` Andrew Jones
2023-10-24 0:12 ` Alistair Francis
2023-10-19 13:26 ` [PATCH v3 08/12] hw/riscv/virt-acpi-build.c: Add MMU node " Sunil V L
2023-10-23 13:15 ` Andrew Jones
2023-10-19 13:26 ` [PATCH v3 09/12] hw/pci-host/gpex: Define properties for MMIO ranges Sunil V L
2023-10-19 13:26 ` [PATCH v3 10/12] hw/riscv/virt: Update GPEX MMIO related properties Sunil V L
2023-10-20 11:47 ` Daniel Henrique Barboza
2023-10-19 13:26 ` [PATCH v3 11/12] hw/riscv/virt-acpi-build.c: Add IO controllers and devices Sunil V L
2023-10-19 13:26 ` [PATCH v3 12/12] hw/riscv/virt-acpi-build.c: Add PLIC in MADT Sunil V L
2023-10-20 11:49 ` Daniel Henrique Barboza [this message]
2023-10-23 13:22 ` Andrew Jones
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