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From: Jason Gunthorpe <jgg@nvidia.com>
To: Vasant Hegde <vasant.hegde@amd.com>
Cc: iommu@lists.linux.dev, joro@8bytes.org, suravee.suthikulpanit@amd.com
Subject: Re: [PATCH v1 09/13] iommu/amd: Refactor domain flush global function
Date: Mon, 6 Nov 2023 09:01:39 -0400	[thread overview]
Message-ID: <20231106130139.GF4488@nvidia.com> (raw)
In-Reply-To: <e4f69ac2-579a-ab71-653f-81af3c3bb3fb@amd.com>

On Mon, Nov 06, 2023 at 04:23:10PM +0530, Vasant Hegde wrote:
> 
> >> @@ -1553,10 +1553,18 @@ static void domain_flush_pages(struct protection_domain *domain,
> >>  	amd_iommu_domain_flush_complete(domain);
> >>  }
> >>  
> >> +/* Flush range of IO/TLB for a given protection domain */
> >> +void amd_iommu_domain_flush_pages(struct protection_domain *pdom,
> >> +				  u64 address, size_t size)
> >> +{
> >> +	return domain_flush_pages(pdom, address, size);
> >> +}
> > 
> > What is the point of having this maze of functions? Just rename
> > domain_flush_pages?
> 
> Later patch adds PASID check to this function.

I saw that, I still think it is a maze.

> >> @@ -1859,7 +1867,7 @@ static void do_detach(struct iommu_dev_data *dev_data)
> >>  	device_flush_dte(dev_data);
> >>  
> >>  	/* Flush IOTLB and wait for the flushes to finish */
> >> -	amd_iommu_domain_flush_tlb_pde(domain);
> >> +	amd_iommu_domain_flush_all(domain);
> > 
> > This is weird.. The cache tag for a domain shouldn't necessarily be
> > flushed from the iotlb when a domain is removed from a dte, should it?
>
> In this path we need to flush IOMMU cache along with device IOTLB.

The iommu cache only needs to be flushed if the IOPTEs associated with
the cache tag change, and that doesn't happen during "detach".

Some of this is confusing because we've largely removed the word
'detach' from the iommu language, we now just have attach, eg replace.

When the driver has to replace an iommu_domain translation to a PCI
RID with a new translation it should run a sequence depending on how
it is using cache tags.

Cache tag shared in the domain - eg the cache tag is stored in the
iommu_domain struct:

 - Load the DTE/GCR3/etc with the new translation
 - Invalidate any RID -> Cache tag caches (at this point ATS requests
    see the new translation)
 - Invalidate the ATC
 
 The cache tag is flushed when the domain is freed and the tag
 returned to the allocator

Cache tag is unique to the device, replacing the translation continues
to use the existing tag:

 - Load the DTE/GCR3/etc with the new translation
 - Invalidate any RID -> DTE/Cache tag caches (at this point ATS requests
    see the new translation)
 - Invalidate the cache tag, since we changed the translation
 - Invalidate the ATC

 The cache tag is flushed when the GCR3 table is freed and the tag
 returned to the allocator

I agree it does not need to be in this series, but there is a logic to
how all this should flow that should be captured in the APIs. Bundling
all kinds of IOTLB and ATC invalidation into one call chain is not
consistent with where things should end up.

The attach/replace ops should implement the exact sequence of
invalidations they need for what they are doing in a clear sequence.

Jason

  reply	other threads:[~2023-11-06 13:01 UTC|newest]

Thread overview: 45+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-10-06 10:16 [PATCH v1 00/13] Improve TLB invalidation logic Vasant Hegde
2023-10-06 10:16 ` [PATCH v1 01/13] iommu/amd: Rename iommu_flush_all_caches() -> amd_iommu_flush_all_caches() Vasant Hegde
2023-11-03 18:08   ` Jason Gunthorpe
2023-10-06 10:16 ` [PATCH v1 02/13] iommu/amd: Remove redundant domain flush from attach_device() Vasant Hegde
2023-11-03 18:09   ` Jason Gunthorpe
2023-10-06 10:16 ` [PATCH v1 03/13] iommu/amd: Remove redundant passing of PDE bit Vasant Hegde
2023-11-03 18:11   ` Jason Gunthorpe
2023-10-06 10:16 ` [PATCH v1 04/13] iommu/amd: Add support to invalidate multiple guest pages Vasant Hegde
2023-11-03 18:23   ` Jason Gunthorpe
2023-10-06 10:16 ` [PATCH v1 05/13] iommu/amd: Refactor IOMMU tlb invalidation code Vasant Hegde
2023-11-03 18:25   ` Jason Gunthorpe
2023-10-06 10:16 ` [PATCH v1 06/13] iommu/amd: Refactor device iotlb " Vasant Hegde
2023-11-03 18:25   ` Jason Gunthorpe
2023-10-06 10:16 ` [PATCH v1 07/13] iommu/amd: Consolidate device IOTLB flush code Vasant Hegde
2023-11-03 18:44   ` Jason Gunthorpe
2023-11-06 11:39     ` Vasant Hegde
2023-10-06 10:16 ` [PATCH v1 08/13] iommu/amd: Consolidate amd_iommu_domain_flush_complete() call Vasant Hegde
2023-11-03 18:45   ` Jason Gunthorpe
2023-10-06 10:16 ` [PATCH v1 09/13] iommu/amd: Refactor domain flush global function Vasant Hegde
2023-11-05 17:52   ` Jason Gunthorpe
2023-11-06 10:53     ` Vasant Hegde
2023-11-06 13:01       ` Jason Gunthorpe [this message]
2023-11-07  4:53         ` Vasant Hegde
2023-11-07 13:11           ` Jason Gunthorpe
2023-10-06 10:16 ` [PATCH v1 10/13] iommu/amd: Consolidate domain flush logic Vasant Hegde
2023-11-05 17:55   ` Jason Gunthorpe
2023-11-06 11:12     ` Vasant Hegde
2023-11-06 13:13       ` Jason Gunthorpe
2023-11-07  4:44         ` Vasant Hegde
2023-11-07 13:09           ` Jason Gunthorpe
2023-11-09 13:52             ` Vasant Hegde
2023-11-09 14:10               ` Jason Gunthorpe
2023-11-10  5:28                 ` Vasant Hegde
2023-11-10 14:02                   ` Jason Gunthorpe
2023-10-06 10:16 ` [PATCH v1 11/13] iommu/amd/pgtbl_v2: Invalidate updated page ranges only Vasant Hegde
2023-11-05 17:57   ` Jason Gunthorpe
2023-11-06 11:16     ` Vasant Hegde
2023-10-06 10:16 ` [PATCH v1 12/13] iommu/amd: Remove unused flush pasid functions Vasant Hegde
2023-11-05 17:58   ` Jason Gunthorpe
2023-11-06 11:19     ` Vasant Hegde
2023-10-06 10:16 ` [PATCH v1 13/13] iommu/amd: Rearrange device flush code Vasant Hegde
2023-11-05 17:59   ` Jason Gunthorpe
2023-11-06 11:45     ` Vasant Hegde
2023-10-12  6:17 ` [PATCH v1 00/13] Improve TLB invalidation logic Suthikulpanit, Suravee
2023-10-16 10:18 ` Vasant Hegde

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