From: Eric Biggers <ebiggers@kernel.org>
To: Jerry Shih <jerry.shih@sifive.com>
Cc: paul.walmsley@sifive.com, palmer@dabbelt.com,
aou@eecs.berkeley.edu, herbert@gondor.apana.org.au,
davem@davemloft.net, andy.chiu@sifive.com,
greentime.hu@sifive.com, conor.dooley@microchip.com,
guoren@kernel.org, bjorn@rivosinc.com, heiko@sntech.de,
ardb@kernel.org, phoebe.chen@sifive.com, hongrong.hsu@sifive.com,
linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org,
linux-crypto@vger.kernel.org
Subject: Re: [PATCH 12/12] RISC-V: crypto: add Zvkb accelerated ChaCha20 implementation
Date: Tue, 21 Nov 2023 17:29:33 -0800 [thread overview]
Message-ID: <20231122012933.GG2172@sol.localdomain> (raw)
In-Reply-To: <20231025183644.8735-13-jerry.shih@sifive.com>
On Thu, Oct 26, 2023 at 02:36:44AM +0800, Jerry Shih wrote:
> diff --git a/arch/riscv/crypto/chacha-riscv64-glue.c b/arch/riscv/crypto/chacha-riscv64-glue.c
> new file mode 100644
> index 000000000000..72011949f705
> --- /dev/null
> +++ b/arch/riscv/crypto/chacha-riscv64-glue.c
> @@ -0,0 +1,120 @@
> +// SPDX-License-Identifier: GPL-2.0-only
> +/*
> + * Port of the OpenSSL ChaCha20 implementation for RISC-V 64
> + *
> + * Copyright (C) 2023 SiFive, Inc.
> + * Author: Jerry Shih <jerry.shih@sifive.com>
> + */
> +
> +#include <asm/simd.h>
> +#include <asm/vector.h>
> +#include <crypto/internal/chacha.h>
> +#include <crypto/internal/simd.h>
> +#include <crypto/internal/skcipher.h>
> +#include <linux/crypto.h>
> +#include <linux/module.h>
> +#include <linux/types.h>
> +
> +#define CHACHA_BLOCK_VALID_SIZE_MASK (~(CHACHA_BLOCK_SIZE - 1))
> +#define CHACHA_BLOCK_REMAINING_SIZE_MASK (CHACHA_BLOCK_SIZE - 1)
> +#define CHACHA_KEY_OFFSET 4
> +#define CHACHA_IV_OFFSET 12
> +
> +/* chacha20 using zvkb vector crypto extension */
> +void ChaCha20_ctr32_zvkb(u8 *out, const u8 *input, size_t len, const u32 *key,
> + const u32 *counter);
> +
> +static int chacha20_encrypt(struct skcipher_request *req)
> +{
> + u32 state[CHACHA_STATE_WORDS];
This function doesn't need to create the whole state matrix on the stack, since
the underlying assembly function takes as input the key and counter, not the
state matrix. I recommend something like the following:
diff --git a/arch/riscv/crypto/chacha-riscv64-glue.c b/arch/riscv/crypto/chacha-riscv64-glue.c
index df185d0663fcc..216b4cd9d1e01 100644
--- a/arch/riscv/crypto/chacha-riscv64-glue.c
+++ b/arch/riscv/crypto/chacha-riscv64-glue.c
@@ -16,45 +16,42 @@
#include <linux/module.h>
#include <linux/types.h>
-#define CHACHA_KEY_OFFSET 4
-#define CHACHA_IV_OFFSET 12
-
/* chacha20 using zvkb vector crypto extension */
asmlinkage void ChaCha20_ctr32_zvkb(u8 *out, const u8 *input, size_t len,
const u32 *key, const u32 *counter);
static int chacha20_encrypt(struct skcipher_request *req)
{
- u32 state[CHACHA_STATE_WORDS];
u8 block_buffer[CHACHA_BLOCK_SIZE];
struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(req);
const struct chacha_ctx *ctx = crypto_skcipher_ctx(tfm);
struct skcipher_walk walk;
unsigned int nbytes;
unsigned int tail_bytes;
+ u32 iv[4];
int err;
- chacha_init_generic(state, ctx->key, req->iv);
+ iv[0] = get_unaligned_le32(req->iv);
+ iv[1] = get_unaligned_le32(req->iv + 4);
+ iv[2] = get_unaligned_le32(req->iv + 8);
+ iv[3] = get_unaligned_le32(req->iv + 12);
err = skcipher_walk_virt(&walk, req, false);
while (walk.nbytes) {
- nbytes = walk.nbytes & (~(CHACHA_BLOCK_SIZE - 1));
+ nbytes = walk.nbytes & ~(CHACHA_BLOCK_SIZE - 1);
tail_bytes = walk.nbytes & (CHACHA_BLOCK_SIZE - 1);
kernel_vector_begin();
if (nbytes) {
ChaCha20_ctr32_zvkb(walk.dst.virt.addr,
walk.src.virt.addr, nbytes,
- state + CHACHA_KEY_OFFSET,
- state + CHACHA_IV_OFFSET);
- state[CHACHA_IV_OFFSET] += nbytes / CHACHA_BLOCK_SIZE;
+ ctx->key, iv);
+ iv[0] += nbytes / CHACHA_BLOCK_SIZE;
}
if (walk.nbytes == walk.total && tail_bytes > 0) {
memcpy(block_buffer, walk.src.virt.addr + nbytes,
tail_bytes);
ChaCha20_ctr32_zvkb(block_buffer, block_buffer,
- CHACHA_BLOCK_SIZE,
- state + CHACHA_KEY_OFFSET,
- state + CHACHA_IV_OFFSET);
+ CHACHA_BLOCK_SIZE, ctx->key, iv);
memcpy(walk.dst.virt.addr + nbytes, block_buffer,
tail_bytes);
tail_bytes = 0;
WARNING: multiple messages have this Message-ID (diff)
From: Eric Biggers <ebiggers@kernel.org>
To: Jerry Shih <jerry.shih@sifive.com>
Cc: paul.walmsley@sifive.com, palmer@dabbelt.com,
aou@eecs.berkeley.edu, herbert@gondor.apana.org.au,
davem@davemloft.net, andy.chiu@sifive.com,
greentime.hu@sifive.com, conor.dooley@microchip.com,
guoren@kernel.org, bjorn@rivosinc.com, heiko@sntech.de,
ardb@kernel.org, phoebe.chen@sifive.com, hongrong.hsu@sifive.com,
linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org,
linux-crypto@vger.kernel.org
Subject: Re: [PATCH 12/12] RISC-V: crypto: add Zvkb accelerated ChaCha20 implementation
Date: Tue, 21 Nov 2023 17:29:33 -0800 [thread overview]
Message-ID: <20231122012933.GG2172@sol.localdomain> (raw)
In-Reply-To: <20231025183644.8735-13-jerry.shih@sifive.com>
On Thu, Oct 26, 2023 at 02:36:44AM +0800, Jerry Shih wrote:
> diff --git a/arch/riscv/crypto/chacha-riscv64-glue.c b/arch/riscv/crypto/chacha-riscv64-glue.c
> new file mode 100644
> index 000000000000..72011949f705
> --- /dev/null
> +++ b/arch/riscv/crypto/chacha-riscv64-glue.c
> @@ -0,0 +1,120 @@
> +// SPDX-License-Identifier: GPL-2.0-only
> +/*
> + * Port of the OpenSSL ChaCha20 implementation for RISC-V 64
> + *
> + * Copyright (C) 2023 SiFive, Inc.
> + * Author: Jerry Shih <jerry.shih@sifive.com>
> + */
> +
> +#include <asm/simd.h>
> +#include <asm/vector.h>
> +#include <crypto/internal/chacha.h>
> +#include <crypto/internal/simd.h>
> +#include <crypto/internal/skcipher.h>
> +#include <linux/crypto.h>
> +#include <linux/module.h>
> +#include <linux/types.h>
> +
> +#define CHACHA_BLOCK_VALID_SIZE_MASK (~(CHACHA_BLOCK_SIZE - 1))
> +#define CHACHA_BLOCK_REMAINING_SIZE_MASK (CHACHA_BLOCK_SIZE - 1)
> +#define CHACHA_KEY_OFFSET 4
> +#define CHACHA_IV_OFFSET 12
> +
> +/* chacha20 using zvkb vector crypto extension */
> +void ChaCha20_ctr32_zvkb(u8 *out, const u8 *input, size_t len, const u32 *key,
> + const u32 *counter);
> +
> +static int chacha20_encrypt(struct skcipher_request *req)
> +{
> + u32 state[CHACHA_STATE_WORDS];
This function doesn't need to create the whole state matrix on the stack, since
the underlying assembly function takes as input the key and counter, not the
state matrix. I recommend something like the following:
diff --git a/arch/riscv/crypto/chacha-riscv64-glue.c b/arch/riscv/crypto/chacha-riscv64-glue.c
index df185d0663fcc..216b4cd9d1e01 100644
--- a/arch/riscv/crypto/chacha-riscv64-glue.c
+++ b/arch/riscv/crypto/chacha-riscv64-glue.c
@@ -16,45 +16,42 @@
#include <linux/module.h>
#include <linux/types.h>
-#define CHACHA_KEY_OFFSET 4
-#define CHACHA_IV_OFFSET 12
-
/* chacha20 using zvkb vector crypto extension */
asmlinkage void ChaCha20_ctr32_zvkb(u8 *out, const u8 *input, size_t len,
const u32 *key, const u32 *counter);
static int chacha20_encrypt(struct skcipher_request *req)
{
- u32 state[CHACHA_STATE_WORDS];
u8 block_buffer[CHACHA_BLOCK_SIZE];
struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(req);
const struct chacha_ctx *ctx = crypto_skcipher_ctx(tfm);
struct skcipher_walk walk;
unsigned int nbytes;
unsigned int tail_bytes;
+ u32 iv[4];
int err;
- chacha_init_generic(state, ctx->key, req->iv);
+ iv[0] = get_unaligned_le32(req->iv);
+ iv[1] = get_unaligned_le32(req->iv + 4);
+ iv[2] = get_unaligned_le32(req->iv + 8);
+ iv[3] = get_unaligned_le32(req->iv + 12);
err = skcipher_walk_virt(&walk, req, false);
while (walk.nbytes) {
- nbytes = walk.nbytes & (~(CHACHA_BLOCK_SIZE - 1));
+ nbytes = walk.nbytes & ~(CHACHA_BLOCK_SIZE - 1);
tail_bytes = walk.nbytes & (CHACHA_BLOCK_SIZE - 1);
kernel_vector_begin();
if (nbytes) {
ChaCha20_ctr32_zvkb(walk.dst.virt.addr,
walk.src.virt.addr, nbytes,
- state + CHACHA_KEY_OFFSET,
- state + CHACHA_IV_OFFSET);
- state[CHACHA_IV_OFFSET] += nbytes / CHACHA_BLOCK_SIZE;
+ ctx->key, iv);
+ iv[0] += nbytes / CHACHA_BLOCK_SIZE;
}
if (walk.nbytes == walk.total && tail_bytes > 0) {
memcpy(block_buffer, walk.src.virt.addr + nbytes,
tail_bytes);
ChaCha20_ctr32_zvkb(block_buffer, block_buffer,
- CHACHA_BLOCK_SIZE,
- state + CHACHA_KEY_OFFSET,
- state + CHACHA_IV_OFFSET);
+ CHACHA_BLOCK_SIZE, ctx->key, iv);
memcpy(walk.dst.virt.addr + nbytes, block_buffer,
tail_bytes);
tail_bytes = 0;
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next prev parent reply other threads:[~2023-11-22 1:29 UTC|newest]
Thread overview: 100+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-10-25 18:36 [PATCH 00/12] RISC-V: provide some accelerated cryptography implementations using vector extensions Jerry Shih
2023-10-25 18:36 ` Jerry Shih
2023-10-25 18:36 ` [PATCH 01/12] RISC-V: add helper function to read the vector VLEN Jerry Shih
2023-10-25 18:36 ` Jerry Shih
2023-10-25 18:36 ` [PATCH 02/12] RISC-V: hook new crypto subdir into build-system Jerry Shih
2023-10-25 18:36 ` Jerry Shih
2023-10-25 18:36 ` [PATCH 03/12] RISC-V: crypto: add OpenSSL perl module for vector instructions Jerry Shih
2023-10-25 18:36 ` Jerry Shih
2023-10-25 18:36 ` [PATCH 04/12] RISC-V: crypto: add Zvkned accelerated AES implementation Jerry Shih
2023-10-25 18:36 ` Jerry Shih
2023-11-02 4:51 ` Eric Biggers
2023-11-02 4:51 ` Eric Biggers
2023-11-20 2:53 ` Jerry Shih
2023-11-20 2:53 ` Jerry Shih
2023-10-25 18:36 ` [PATCH 05/12] crypto: scatterwalk - Add scatterwalk_next() to get the next scatterlist in scatter_walk Jerry Shih
2023-10-25 18:36 ` Jerry Shih
2023-10-25 18:36 ` [PATCH 06/12] RISC-V: crypto: add accelerated AES-CBC/CTR/ECB/XTS implementations Jerry Shih
2023-10-25 18:36 ` Jerry Shih
2023-11-02 5:16 ` Eric Biggers
2023-11-02 5:16 ` Eric Biggers
2023-11-07 8:53 ` Jerry Shih
2023-11-07 8:53 ` Jerry Shih
2023-11-09 7:16 ` Eric Biggers
2023-11-09 7:16 ` Eric Biggers
2023-11-10 3:58 ` Jerry Shih
2023-11-10 3:58 ` Jerry Shih
2023-11-10 4:34 ` Eric Biggers
2023-11-10 4:34 ` Eric Biggers
2023-11-10 4:58 ` Andy Chiu
2023-11-10 4:58 ` Andy Chiu
2023-11-10 5:44 ` Eric Biggers
2023-11-10 5:44 ` Eric Biggers
2023-11-11 11:08 ` Ard Biesheuvel
2023-11-11 11:08 ` Ard Biesheuvel
2023-11-11 17:52 ` Eric Biggers
2023-11-11 17:52 ` Eric Biggers
2023-11-20 2:47 ` Jerry Shih
2023-11-20 2:47 ` Jerry Shih
2023-11-20 19:28 ` Eric Biggers
2023-11-20 19:28 ` Eric Biggers
2023-11-22 1:14 ` Eric Biggers
2023-11-22 1:14 ` Eric Biggers
2023-11-27 2:52 ` Jerry Shih
2023-11-27 2:52 ` Jerry Shih
2023-11-09 8:05 ` Eric Biggers
2023-11-09 8:05 ` Eric Biggers
2023-11-10 4:06 ` Jerry Shih
2023-11-10 4:06 ` Jerry Shih
2023-11-20 2:36 ` Jerry Shih
2023-11-20 2:36 ` Jerry Shih
2023-10-25 18:36 ` [PATCH 07/12] RISC-V: crypto: add Zvkg accelerated GCM GHASH implementation Jerry Shih
2023-10-25 18:36 ` Jerry Shih
2023-11-22 1:42 ` Eric Biggers
2023-11-22 1:42 ` Eric Biggers
2023-11-27 2:49 ` Jerry Shih
2023-11-27 2:49 ` Jerry Shih
2023-10-25 18:36 ` [PATCH 08/12] RISC-V: crypto: add Zvknha/b accelerated SHA224/256 implementations Jerry Shih
2023-10-25 18:36 ` Jerry Shih
2023-10-25 18:36 ` [PATCH 09/12] RISC-V: crypto: add Zvknhb accelerated SHA384/512 implementations Jerry Shih
2023-10-25 18:36 ` Jerry Shih
2023-11-22 1:32 ` Eric Biggers
2023-11-22 1:32 ` Eric Biggers
2023-11-27 2:50 ` Jerry Shih
2023-11-27 2:50 ` Jerry Shih
2023-10-25 18:36 ` [PATCH 10/12] RISC-V: crypto: add Zvksed accelerated SM4 implementation Jerry Shih
2023-10-25 18:36 ` Jerry Shih
2023-11-02 5:58 ` Eric Biggers
2023-11-02 5:58 ` Eric Biggers
2023-11-20 2:55 ` Jerry Shih
2023-11-20 2:55 ` Jerry Shih
2023-10-25 18:36 ` [PATCH 11/12] RISC-V: crypto: add Zvksh accelerated SM3 implementation Jerry Shih
2023-10-25 18:36 ` Jerry Shih
2023-10-25 18:36 ` [PATCH 12/12] RISC-V: crypto: add Zvkb accelerated ChaCha20 implementation Jerry Shih
2023-10-25 18:36 ` Jerry Shih
2023-11-02 5:43 ` Eric Biggers
2023-11-02 5:43 ` Eric Biggers
2023-11-20 2:55 ` Jerry Shih
2023-11-20 2:55 ` Jerry Shih
2023-11-20 19:18 ` Eric Biggers
2023-11-20 19:18 ` Eric Biggers
2023-11-21 10:55 ` Jerry Shih
2023-11-21 10:55 ` Jerry Shih
2023-11-21 13:14 ` Conor Dooley
2023-11-21 13:14 ` Conor Dooley
2023-11-21 23:37 ` Eric Biggers
2023-11-21 23:37 ` Eric Biggers
2023-11-22 0:39 ` Conor Dooley
2023-11-22 0:39 ` Conor Dooley
2023-11-22 17:37 ` Jerry Shih
2023-11-22 17:37 ` Jerry Shih
2023-11-22 18:05 ` Palmer Dabbelt
2023-11-22 18:05 ` Palmer Dabbelt
2023-11-22 18:20 ` Conor Dooley
2023-11-22 18:20 ` Conor Dooley
2023-11-22 19:05 ` Jerry Shih
2023-11-22 19:05 ` Jerry Shih
2023-11-22 1:29 ` Eric Biggers [this message]
2023-11-22 1:29 ` Eric Biggers
2023-11-27 2:14 ` Jerry Shih
2023-11-27 2:14 ` Jerry Shih
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