All of lore.kernel.org
 help / color / mirror / Atom feed
From: Eric Biggers <ebiggers@kernel.org>
To: Jerry Shih <jerry.shih@sifive.com>
Cc: Paul Walmsley <paul.walmsley@sifive.com>,
	palmer@dabbelt.com, Albert Ou <aou@eecs.berkeley.edu>,
	herbert@gondor.apana.org.au, davem@davemloft.net,
	conor.dooley@microchip.com, ardb@kernel.org, heiko@sntech.de,
	phoebe.chen@sifive.com, hongrong.hsu@sifive.com,
	linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org,
	linux-crypto@vger.kernel.org
Subject: Re: [PATCH v2 04/13] RISC-V: crypto: add Zvkned accelerated AES implementation
Date: Mon, 27 Nov 2023 20:38:52 -0800	[thread overview]
Message-ID: <20231128043852.GM1463@sol.localdomain> (raw)
In-Reply-To: <8BE5BD19-7401-455D-838B-56264F78471B@sifive.com>

On Tue, Nov 28, 2023 at 12:22:26PM +0800, Jerry Shih wrote:
> On Nov 28, 2023, at 11:56, Eric Biggers <ebiggers@kernel.org> wrote:
> > On Mon, Nov 27, 2023 at 03:06:54PM +0800, Jerry Shih wrote:
> >> +int riscv64_aes_setkey(struct crypto_aes_ctx *ctx, const u8 *key,
> >> +		       unsigned int keylen)
> >> +{
> >> +	int ret;
> >> +
> >> +	ret = aes_check_keylen(keylen);
> >> +	if (ret < 0)
> >> +		return -EINVAL;
> >> +
> >> +	/*
> >> +	 * The RISC-V AES vector crypto key expanding doesn't support AES-192.
> >> +	 * Use the generic software key expanding for that case.
> >> +	 */
> >> +	if ((keylen == 16 || keylen == 32) && crypto_simd_usable()) {
> >> +		/*
> >> +		 * All zvkned-based functions use encryption expanding keys for both
> >> +		 * encryption and decryption.
> >> +		 */
> >> +		kernel_vector_begin();
> >> +		rv64i_zvkned_set_encrypt_key(key, keylen, ctx);
> >> +		kernel_vector_end();
> >> +	} else {
> >> +		ret = aes_expandkey(ctx, key, keylen);
> >> +	}
> > 
> > rv64i_zvkned_set_encrypt_key() does not initialize crypto_aes_ctx::key_dec.
> > So, decryption results will be incorrect if !crypto_simd_usable() later.
> 
> Will we have the situation that `crypto_simd_usable()` condition is not consistent
> during the aes_setkey(), aes_enc/dec()? If yes, all accelerated(or HW specific)
> crypto algorithms should do the same implementations as the sw fallback path
> since the `crypto_simd_usable()` will change back and forth.

Yes, the calls to one "crypto_cipher" can happen in different contexts.  For
example, crypto_simd_usable() can be true during setkey and false during
decrypt, or vice versa.

If the RISC-V decryption code wants to use the regular key schedule (key_enc)
instead of the "Equivalent Inverse Cipher key schedule" (key_dec), that's
perfectly fine, but setkey still needs to initialize key_dec in case the
fallback to aes_decrypt() gets taken.

> >> diff --git a/arch/riscv/crypto/aes-riscv64-zvkned.pl b/arch/riscv/crypto/aes-riscv64-zvkned.pl
> >> new file mode 100644
> >> index 000000000000..303e82d9f6f0
> >> --- /dev/null
> >> +++ b/arch/riscv/crypto/aes-riscv64-zvkned.pl
> > [...]
> >> +L_enc_128:
> > [...]
> >> +L_enc_192:
> > [...]
> >> +L_enc_256:
> > 
> > There's some severe source code duplication going on in the AES assembly, with
> > the three AES variants having separate source code.  You can just leave this
> > as-is since this is what was merged into OpenSSL and we are borrowing that for
> > now, but I do expect that we'll want to clean this up later.
> 
> Do we prefer the code with the branches instead of the specified implementation?
> We could make AES-128/192/256 together like:
> 
>     @{[vaesz_vs $V24, $V1]}
>     @{[vaesem_vs $V24, $V2]}
>     @{[vaesem_vs $V24, $V3]}
>     @{[vaesem_vs $V24, $V4]}
>     @{[vaesem_vs $V24, $V5]}
>     @{[vaesem_vs $V24, $V6]}
>     @{[vaesem_vs $V24, $V7]}
>     @{[vaesem_vs $V24, $V8]}
>     @{[vaesem_vs $V24, $V9]}
>     @{[vaesem_vs $V24, $V10]}
>     beq $ROUND, $ROUND_11, 1f
>     @{[vaesem_vs $V24, $V11]}
>     @{[vaesem_vs $V24, $V12]}
>     beq $ROUND, $ROUND_13, 1f
>     @{[vaesem_vs $V24, $V13]}
>     @{[vaesem_vs $V24, $V14]}
> 1:
>     @{[vaesef_vs $V24, $V15]}
> 
> But we will have the additional costs for the branches.
> 

That needs to be decided on a case by case basis depending on the performance
impact and how much binary code is saved.  On some architectures, separate
binary code for AES-{128,192,256} has been found to be worthwhile.  However,
that does *not* mean that they need to have separate source code.  Take a look
at how arch/x86/crypto/aes_ctrby8_avx-x86_64.S generates code for all the AES
variants using macros, for example.

Anyway, I don't think you should bother making too many changes to the "perlasm"
files.  If we decide to make major cleanups I think we should just replace them
with .S files (which already support macros).

- Eric

WARNING: multiple messages have this Message-ID (diff)
From: Eric Biggers <ebiggers@kernel.org>
To: Jerry Shih <jerry.shih@sifive.com>
Cc: Paul Walmsley <paul.walmsley@sifive.com>,
	palmer@dabbelt.com, Albert Ou <aou@eecs.berkeley.edu>,
	herbert@gondor.apana.org.au, davem@davemloft.net,
	conor.dooley@microchip.com, ardb@kernel.org, heiko@sntech.de,
	phoebe.chen@sifive.com, hongrong.hsu@sifive.com,
	linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org,
	linux-crypto@vger.kernel.org
Subject: Re: [PATCH v2 04/13] RISC-V: crypto: add Zvkned accelerated AES implementation
Date: Mon, 27 Nov 2023 20:38:52 -0800	[thread overview]
Message-ID: <20231128043852.GM1463@sol.localdomain> (raw)
In-Reply-To: <8BE5BD19-7401-455D-838B-56264F78471B@sifive.com>

On Tue, Nov 28, 2023 at 12:22:26PM +0800, Jerry Shih wrote:
> On Nov 28, 2023, at 11:56, Eric Biggers <ebiggers@kernel.org> wrote:
> > On Mon, Nov 27, 2023 at 03:06:54PM +0800, Jerry Shih wrote:
> >> +int riscv64_aes_setkey(struct crypto_aes_ctx *ctx, const u8 *key,
> >> +		       unsigned int keylen)
> >> +{
> >> +	int ret;
> >> +
> >> +	ret = aes_check_keylen(keylen);
> >> +	if (ret < 0)
> >> +		return -EINVAL;
> >> +
> >> +	/*
> >> +	 * The RISC-V AES vector crypto key expanding doesn't support AES-192.
> >> +	 * Use the generic software key expanding for that case.
> >> +	 */
> >> +	if ((keylen == 16 || keylen == 32) && crypto_simd_usable()) {
> >> +		/*
> >> +		 * All zvkned-based functions use encryption expanding keys for both
> >> +		 * encryption and decryption.
> >> +		 */
> >> +		kernel_vector_begin();
> >> +		rv64i_zvkned_set_encrypt_key(key, keylen, ctx);
> >> +		kernel_vector_end();
> >> +	} else {
> >> +		ret = aes_expandkey(ctx, key, keylen);
> >> +	}
> > 
> > rv64i_zvkned_set_encrypt_key() does not initialize crypto_aes_ctx::key_dec.
> > So, decryption results will be incorrect if !crypto_simd_usable() later.
> 
> Will we have the situation that `crypto_simd_usable()` condition is not consistent
> during the aes_setkey(), aes_enc/dec()? If yes, all accelerated(or HW specific)
> crypto algorithms should do the same implementations as the sw fallback path
> since the `crypto_simd_usable()` will change back and forth.

Yes, the calls to one "crypto_cipher" can happen in different contexts.  For
example, crypto_simd_usable() can be true during setkey and false during
decrypt, or vice versa.

If the RISC-V decryption code wants to use the regular key schedule (key_enc)
instead of the "Equivalent Inverse Cipher key schedule" (key_dec), that's
perfectly fine, but setkey still needs to initialize key_dec in case the
fallback to aes_decrypt() gets taken.

> >> diff --git a/arch/riscv/crypto/aes-riscv64-zvkned.pl b/arch/riscv/crypto/aes-riscv64-zvkned.pl
> >> new file mode 100644
> >> index 000000000000..303e82d9f6f0
> >> --- /dev/null
> >> +++ b/arch/riscv/crypto/aes-riscv64-zvkned.pl
> > [...]
> >> +L_enc_128:
> > [...]
> >> +L_enc_192:
> > [...]
> >> +L_enc_256:
> > 
> > There's some severe source code duplication going on in the AES assembly, with
> > the three AES variants having separate source code.  You can just leave this
> > as-is since this is what was merged into OpenSSL and we are borrowing that for
> > now, but I do expect that we'll want to clean this up later.
> 
> Do we prefer the code with the branches instead of the specified implementation?
> We could make AES-128/192/256 together like:
> 
>     @{[vaesz_vs $V24, $V1]}
>     @{[vaesem_vs $V24, $V2]}
>     @{[vaesem_vs $V24, $V3]}
>     @{[vaesem_vs $V24, $V4]}
>     @{[vaesem_vs $V24, $V5]}
>     @{[vaesem_vs $V24, $V6]}
>     @{[vaesem_vs $V24, $V7]}
>     @{[vaesem_vs $V24, $V8]}
>     @{[vaesem_vs $V24, $V9]}
>     @{[vaesem_vs $V24, $V10]}
>     beq $ROUND, $ROUND_11, 1f
>     @{[vaesem_vs $V24, $V11]}
>     @{[vaesem_vs $V24, $V12]}
>     beq $ROUND, $ROUND_13, 1f
>     @{[vaesem_vs $V24, $V13]}
>     @{[vaesem_vs $V24, $V14]}
> 1:
>     @{[vaesef_vs $V24, $V15]}
> 
> But we will have the additional costs for the branches.
> 

That needs to be decided on a case by case basis depending on the performance
impact and how much binary code is saved.  On some architectures, separate
binary code for AES-{128,192,256} has been found to be worthwhile.  However,
that does *not* mean that they need to have separate source code.  Take a look
at how arch/x86/crypto/aes_ctrby8_avx-x86_64.S generates code for all the AES
variants using macros, for example.

Anyway, I don't think you should bother making too many changes to the "perlasm"
files.  If we decide to make major cleanups I think we should just replace them
with .S files (which already support macros).

- Eric

_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv

  reply	other threads:[~2023-11-28  4:38 UTC|newest]

Thread overview: 82+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-11-27  7:06 [PATCH v2 00/13] RISC-V: provide some accelerated cryptography implementations using vector extensions Jerry Shih
2023-11-27  7:06 ` Jerry Shih
2023-11-27  7:06 ` [PATCH v2 01/13] RISC-V: add helper function to read the vector VLEN Jerry Shih
2023-11-27  7:06   ` Jerry Shih
2023-11-28  3:45   ` Eric Biggers
2023-11-28  3:45     ` Eric Biggers
2023-11-27  7:06 ` [PATCH v2 02/13] RISC-V: hook new crypto subdir into build-system Jerry Shih
2023-11-27  7:06   ` Jerry Shih
2023-11-28  3:45   ` Eric Biggers
2023-11-28  3:45     ` Eric Biggers
2023-11-27  7:06 ` [PATCH v2 03/13] RISC-V: crypto: add OpenSSL perl module for vector instructions Jerry Shih
2023-11-27  7:06   ` Jerry Shih
2023-11-27  7:06 ` [PATCH v2 04/13] RISC-V: crypto: add Zvkned accelerated AES implementation Jerry Shih
2023-11-27  7:06   ` Jerry Shih
2023-11-28  3:56   ` Eric Biggers
2023-11-28  3:56     ` Eric Biggers
2023-11-28  4:22     ` Jerry Shih
2023-11-28  4:22       ` Jerry Shih
2023-11-28  4:38       ` Eric Biggers [this message]
2023-11-28  4:38         ` Eric Biggers
2023-11-28 17:54   ` Conor Dooley
2023-11-28 17:54     ` Conor Dooley
2023-11-28 20:12     ` Eric Biggers
2023-11-28 20:12       ` Eric Biggers
2023-11-29  2:39       ` Jerry Shih
2023-11-29  2:39         ` Jerry Shih
2023-11-29 11:12         ` Conor Dooley
2023-11-29 11:12           ` Conor Dooley
2023-11-29 20:26           ` Eric Biggers
2023-11-29 20:26             ` Eric Biggers
2023-11-27  7:06 ` [PATCH v2 05/13] crypto: simd - Update `walksize` in simd skcipher Jerry Shih
2023-11-27  7:06   ` Jerry Shih
2023-11-28  3:58   ` Eric Biggers
2023-11-28  3:58     ` Eric Biggers
2023-11-28  5:38     ` Jerry Shih
2023-11-28  5:38       ` Jerry Shih
2023-11-28 17:22       ` Eric Biggers
2023-11-28 17:22         ` Eric Biggers
2023-12-01  2:09         ` Jerry Shih
2023-12-01  2:09           ` Jerry Shih
2023-12-08  4:05   ` Herbert Xu
2023-12-08  4:05     ` Herbert Xu
2023-12-08  4:18     ` Jerry Shih
2023-12-08  4:18       ` Jerry Shih
2023-11-27  7:06 ` [PATCH v2 06/13] crypto: scatterwalk - Add scatterwalk_next() to get the next scatterlist in scatter_walk Jerry Shih
2023-11-27  7:06   ` Jerry Shih
2023-11-27  7:06 ` [PATCH v2 07/13] RISC-V: crypto: add accelerated AES-CBC/CTR/ECB/XTS implementations Jerry Shih
2023-11-27  7:06   ` Jerry Shih
2023-11-28  4:07   ` Eric Biggers
2023-11-28  4:07     ` Eric Biggers
2023-11-29  7:57     ` Jerry Shih
2023-11-29  7:57       ` Jerry Shih
2023-11-29 20:16       ` Eric Biggers
2023-11-29 20:16         ` Eric Biggers
2023-12-02 13:20         ` Jerry Shih
2023-12-02 13:20           ` Jerry Shih
2023-11-27  7:06 ` [PATCH v2 08/13] RISC-V: crypto: add Zvkg accelerated GCM GHASH implementation Jerry Shih
2023-11-27  7:06   ` Jerry Shih
2023-11-27  7:06 ` [PATCH v2 09/13] RISC-V: crypto: add Zvknha/b accelerated SHA224/256 implementations Jerry Shih
2023-11-27  7:06   ` Jerry Shih
2023-11-28  4:12   ` Eric Biggers
2023-11-28  4:12     ` Eric Biggers
2023-11-28  7:16     ` Jerry Shih
2023-11-28  7:16       ` Jerry Shih
2023-11-28 17:23       ` Eric Biggers
2023-11-28 17:23         ` Eric Biggers
2023-11-27  7:07 ` [PATCH v2 10/13] RISC-V: crypto: add Zvknhb accelerated SHA384/512 implementations Jerry Shih
2023-11-27  7:07   ` Jerry Shih
2023-11-27  7:07 ` [PATCH v2 11/13] RISC-V: crypto: add Zvksed accelerated SM4 implementation Jerry Shih
2023-11-27  7:07   ` Jerry Shih
2023-11-27  7:07 ` [PATCH v2 12/13] RISC-V: crypto: add Zvksh accelerated SM3 implementation Jerry Shih
2023-11-27  7:07   ` Jerry Shih
2023-11-28  4:13   ` Eric Biggers
2023-11-28  4:13     ` Eric Biggers
2023-11-29  5:32     ` Jerry Shih
2023-11-29  5:32       ` Jerry Shih
2023-11-27  7:07 ` [PATCH v2 13/13] RISC-V: crypto: add Zvkb accelerated ChaCha20 implementation Jerry Shih
2023-11-27  7:07   ` Jerry Shih
2023-11-28  4:25   ` Eric Biggers
2023-11-28  4:25     ` Eric Biggers
2023-11-28  8:57     ` Jerry Shih
2023-11-28  8:57       ` Jerry Shih

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20231128043852.GM1463@sol.localdomain \
    --to=ebiggers@kernel.org \
    --cc=aou@eecs.berkeley.edu \
    --cc=ardb@kernel.org \
    --cc=conor.dooley@microchip.com \
    --cc=davem@davemloft.net \
    --cc=heiko@sntech.de \
    --cc=herbert@gondor.apana.org.au \
    --cc=hongrong.hsu@sifive.com \
    --cc=jerry.shih@sifive.com \
    --cc=linux-crypto@vger.kernel.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linux-riscv@lists.infradead.org \
    --cc=palmer@dabbelt.com \
    --cc=paul.walmsley@sifive.com \
    --cc=phoebe.chen@sifive.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.