From: Sunil V L <sunilvl@ventanamicro.com>
To: linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org,
linux-acpi@vger.kernel.org, linux-pci@vger.kernel.org
Cc: "Catalin Marinas" <catalin.marinas@arm.com>,
"Will Deacon" <will@kernel.org>,
"Paul Walmsley" <paul.walmsley@sifive.com>,
"Palmer Dabbelt" <palmer@dabbelt.com>,
"Albert Ou" <aou@eecs.berkeley.edu>,
"Rafael J . Wysocki" <rafael@kernel.org>,
"Len Brown" <lenb@kernel.org>, "Anup Patel" <anup@brainfault.org>,
"Thomas Gleixner" <tglx@linutronix.de>,
"Bjorn Helgaas" <bhelgaas@google.com>,
"Haibo Xu" <haibo1.xu@intel.com>,
"Conor Dooley" <conor.dooley@microchip.com>,
"Andrew Jones" <ajones@ventanamicro.com>,
"Björn Töpel" <bjorn@kernel.org>, "Marc Zyngier" <maz@kernel.org>,
"Sunil V L" <sunilvl@ventanamicro.com>
Subject: [RFC PATCH v3 17/17] irqchip: riscv-intc: Set ACPI irqmodel
Date: Tue, 19 Dec 2023 23:15:26 +0530 [thread overview]
Message-ID: <20231219174526.2235150-18-sunilvl@ventanamicro.com> (raw)
In-Reply-To: <20231219174526.2235150-1-sunilvl@ventanamicro.com>
INTC being the root interrupt controller, set the ACPI irqmodel with
callback function to get the GSI domain id.
Signed-off-by: Sunil V L <sunilvl@ventanamicro.com>
---
arch/riscv/include/asm/irq.h | 13 +------------
drivers/irqchip/irq-riscv-intc.c | 1 +
2 files changed, 2 insertions(+), 12 deletions(-)
diff --git a/arch/riscv/include/asm/irq.h b/arch/riscv/include/asm/irq.h
index 7b14f3ebe242..9c2bdf4bd880 100644
--- a/arch/riscv/include/asm/irq.h
+++ b/arch/riscv/include/asm/irq.h
@@ -22,18 +22,7 @@
#define APLIC_PLIC_ID(x) ((x) >> 24)
#define IDC_CONTEXT_ID(x) ((x) & 0x0000ffff)
-#ifdef CONFIG_RISCV_APLIC
-struct fwnode_handle *aplic_get_gsi_domain_id(u32 gsi);
-#else
-static inline struct fwnode_handle *aplic_get_gsi_domain_id(u32 gsi) { return NULL; }
-#endif
-
-#ifdef CONFIG_SIFIVE_PLIC
-struct fwnode_handle *plic_get_gsi_domain_id(u32 gsi);
-#else
-static inline struct fwnode_handle *plic_get_gsi_domain_id(u32 gsi) { return NULL; }
-#endif
-
+struct fwnode_handle *ext_entc_get_gsi_domain_id(u32 gsi);
int __init acpi_get_intc_index_hartid(u32 index, unsigned long *hartid);
int acpi_get_ext_intc_parent_hartid(u8 id, u32 idx, unsigned long *hartid);
void acpi_get_plic_nr_contexts(u8 id, int *nr_contexts);
diff --git a/drivers/irqchip/irq-riscv-intc.c b/drivers/irqchip/irq-riscv-intc.c
index 24bbc5bfc30f..bddfe47df27b 100644
--- a/drivers/irqchip/irq-riscv-intc.c
+++ b/drivers/irqchip/irq-riscv-intc.c
@@ -311,6 +311,7 @@ static int __init riscv_intc_acpi_init(union acpi_subtable_headers *header,
return rc;
}
+ acpi_set_irq_model(ACPI_IRQ_MODEL_RINTC, ext_entc_get_gsi_domain_id);
return 0;
}
--
2.39.2
WARNING: multiple messages have this Message-ID (diff)
From: Sunil V L <sunilvl@ventanamicro.com>
To: linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org,
linux-acpi@vger.kernel.org, linux-pci@vger.kernel.org
Cc: "Marc Zyngier" <maz@kernel.org>,
"Albert Ou" <aou@eecs.berkeley.edu>,
"Haibo Xu" <haibo1.xu@intel.com>,
"Rafael J . Wysocki" <rafael@kernel.org>,
"Catalin Marinas" <catalin.marinas@arm.com>,
"Anup Patel" <anup@brainfault.org>,
"Björn Töpel" <bjorn@kernel.org>,
"Conor Dooley" <conor.dooley@microchip.com>,
"Palmer Dabbelt" <palmer@dabbelt.com>,
"Paul Walmsley" <paul.walmsley@sifive.com>,
"Bjorn Helgaas" <bhelgaas@google.com>,
"Thomas Gleixner" <tglx@linutronix.de>,
"Andrew Jones" <ajones@ventanamicro.com>,
"Will Deacon" <will@kernel.org>, "Len Brown" <lenb@kernel.org>
Subject: [RFC PATCH v3 17/17] irqchip: riscv-intc: Set ACPI irqmodel
Date: Tue, 19 Dec 2023 23:15:26 +0530 [thread overview]
Message-ID: <20231219174526.2235150-18-sunilvl@ventanamicro.com> (raw)
In-Reply-To: <20231219174526.2235150-1-sunilvl@ventanamicro.com>
INTC being the root interrupt controller, set the ACPI irqmodel with
callback function to get the GSI domain id.
Signed-off-by: Sunil V L <sunilvl@ventanamicro.com>
---
arch/riscv/include/asm/irq.h | 13 +------------
drivers/irqchip/irq-riscv-intc.c | 1 +
2 files changed, 2 insertions(+), 12 deletions(-)
diff --git a/arch/riscv/include/asm/irq.h b/arch/riscv/include/asm/irq.h
index 7b14f3ebe242..9c2bdf4bd880 100644
--- a/arch/riscv/include/asm/irq.h
+++ b/arch/riscv/include/asm/irq.h
@@ -22,18 +22,7 @@
#define APLIC_PLIC_ID(x) ((x) >> 24)
#define IDC_CONTEXT_ID(x) ((x) & 0x0000ffff)
-#ifdef CONFIG_RISCV_APLIC
-struct fwnode_handle *aplic_get_gsi_domain_id(u32 gsi);
-#else
-static inline struct fwnode_handle *aplic_get_gsi_domain_id(u32 gsi) { return NULL; }
-#endif
-
-#ifdef CONFIG_SIFIVE_PLIC
-struct fwnode_handle *plic_get_gsi_domain_id(u32 gsi);
-#else
-static inline struct fwnode_handle *plic_get_gsi_domain_id(u32 gsi) { return NULL; }
-#endif
-
+struct fwnode_handle *ext_entc_get_gsi_domain_id(u32 gsi);
int __init acpi_get_intc_index_hartid(u32 index, unsigned long *hartid);
int acpi_get_ext_intc_parent_hartid(u8 id, u32 idx, unsigned long *hartid);
void acpi_get_plic_nr_contexts(u8 id, int *nr_contexts);
diff --git a/drivers/irqchip/irq-riscv-intc.c b/drivers/irqchip/irq-riscv-intc.c
index 24bbc5bfc30f..bddfe47df27b 100644
--- a/drivers/irqchip/irq-riscv-intc.c
+++ b/drivers/irqchip/irq-riscv-intc.c
@@ -311,6 +311,7 @@ static int __init riscv_intc_acpi_init(union acpi_subtable_headers *header,
return rc;
}
+ acpi_set_irq_model(ACPI_IRQ_MODEL_RINTC, ext_entc_get_gsi_domain_id);
return 0;
}
--
2.39.2
_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv
WARNING: multiple messages have this Message-ID (diff)
From: Sunil V L <sunilvl@ventanamicro.com>
To: linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org,
linux-acpi@vger.kernel.org, linux-pci@vger.kernel.org
Cc: "Catalin Marinas" <catalin.marinas@arm.com>,
"Will Deacon" <will@kernel.org>,
"Paul Walmsley" <paul.walmsley@sifive.com>,
"Palmer Dabbelt" <palmer@dabbelt.com>,
"Albert Ou" <aou@eecs.berkeley.edu>,
"Rafael J . Wysocki" <rafael@kernel.org>,
"Len Brown" <lenb@kernel.org>, "Anup Patel" <anup@brainfault.org>,
"Thomas Gleixner" <tglx@linutronix.de>,
"Bjorn Helgaas" <bhelgaas@google.com>,
"Haibo Xu" <haibo1.xu@intel.com>,
"Conor Dooley" <conor.dooley@microchip.com>,
"Andrew Jones" <ajones@ventanamicro.com>,
"Björn Töpel" <bjorn@kernel.org>, "Marc Zyngier" <maz@kernel.org>,
"Sunil V L" <sunilvl@ventanamicro.com>
Subject: [RFC PATCH v3 17/17] irqchip: riscv-intc: Set ACPI irqmodel
Date: Tue, 19 Dec 2023 23:15:26 +0530 [thread overview]
Message-ID: <20231219174526.2235150-18-sunilvl@ventanamicro.com> (raw)
In-Reply-To: <20231219174526.2235150-1-sunilvl@ventanamicro.com>
INTC being the root interrupt controller, set the ACPI irqmodel with
callback function to get the GSI domain id.
Signed-off-by: Sunil V L <sunilvl@ventanamicro.com>
---
arch/riscv/include/asm/irq.h | 13 +------------
drivers/irqchip/irq-riscv-intc.c | 1 +
2 files changed, 2 insertions(+), 12 deletions(-)
diff --git a/arch/riscv/include/asm/irq.h b/arch/riscv/include/asm/irq.h
index 7b14f3ebe242..9c2bdf4bd880 100644
--- a/arch/riscv/include/asm/irq.h
+++ b/arch/riscv/include/asm/irq.h
@@ -22,18 +22,7 @@
#define APLIC_PLIC_ID(x) ((x) >> 24)
#define IDC_CONTEXT_ID(x) ((x) & 0x0000ffff)
-#ifdef CONFIG_RISCV_APLIC
-struct fwnode_handle *aplic_get_gsi_domain_id(u32 gsi);
-#else
-static inline struct fwnode_handle *aplic_get_gsi_domain_id(u32 gsi) { return NULL; }
-#endif
-
-#ifdef CONFIG_SIFIVE_PLIC
-struct fwnode_handle *plic_get_gsi_domain_id(u32 gsi);
-#else
-static inline struct fwnode_handle *plic_get_gsi_domain_id(u32 gsi) { return NULL; }
-#endif
-
+struct fwnode_handle *ext_entc_get_gsi_domain_id(u32 gsi);
int __init acpi_get_intc_index_hartid(u32 index, unsigned long *hartid);
int acpi_get_ext_intc_parent_hartid(u8 id, u32 idx, unsigned long *hartid);
void acpi_get_plic_nr_contexts(u8 id, int *nr_contexts);
diff --git a/drivers/irqchip/irq-riscv-intc.c b/drivers/irqchip/irq-riscv-intc.c
index 24bbc5bfc30f..bddfe47df27b 100644
--- a/drivers/irqchip/irq-riscv-intc.c
+++ b/drivers/irqchip/irq-riscv-intc.c
@@ -311,6 +311,7 @@ static int __init riscv_intc_acpi_init(union acpi_subtable_headers *header,
return rc;
}
+ acpi_set_irq_model(ACPI_IRQ_MODEL_RINTC, ext_entc_get_gsi_domain_id);
return 0;
}
--
2.39.2
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2023-12-19 17:47 UTC|newest]
Thread overview: 84+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-12-19 17:45 [RFC PATCH v3 00/17] RISC-V: ACPI: Add external interrupt controller support Sunil V L
2023-12-19 17:45 ` Sunil V L
2023-12-19 17:45 ` Sunil V L
2023-12-19 17:45 ` [RFC PATCH v3 01/17] arm64: PCI: Migrate ACPI related functions to pci-acpi.c Sunil V L
2023-12-19 17:45 ` Sunil V L
2023-12-19 17:45 ` Sunil V L
2023-12-19 17:45 ` [RFC PATCH v3 02/17] RISC-V: ACPI: Implement PCI related functionality Sunil V L
2023-12-19 17:45 ` Sunil V L
2023-12-19 17:45 ` Sunil V L
2023-12-19 17:45 ` [RFC PATCH v3 03/17] PCI: Make pci_create_root_bus() declare its reliance on MSI domains Sunil V L
2023-12-19 17:45 ` Sunil V L
2023-12-19 17:45 ` Sunil V L
2023-12-26 23:56 ` Bjorn Helgaas
2023-12-26 23:56 ` Bjorn Helgaas
2023-12-26 23:56 ` Bjorn Helgaas
2023-12-28 13:08 ` Sunil V L
2023-12-28 13:08 ` Sunil V L
2023-12-28 13:08 ` Sunil V L
2023-12-19 17:45 ` [RFC PATCH v3 04/17] ACPI: Add fw_devlink support for ACPI fwnode for IRQ dependency Sunil V L
2023-12-19 17:45 ` Sunil V L
2023-12-19 17:45 ` Sunil V L
2023-12-19 17:45 ` [RFC PATCH v3 05/17] ACPI: irq: Add support for deferred probe in acpi_register_gsi() Sunil V L
2023-12-19 17:45 ` Sunil V L
2023-12-19 17:45 ` Sunil V L
2023-12-19 17:45 ` [RFC PATCH v3 06/17] pnp.h: Reconfigure IRQ in pnp_irq() to support deferred probe Sunil V L
2023-12-19 17:45 ` Sunil V L
2023-12-19 17:45 ` Sunil V L
2023-12-19 17:45 ` [RFC PATCH v3 07/17] ACPI: scan.c: Add weak arch specific function to reorder the IRQCHIP probe Sunil V L
2023-12-19 17:45 ` Sunil V L
2023-12-19 17:45 ` Sunil V L
2023-12-19 17:45 ` [RFC PATCH v3 08/17] ACPI: RISC-V: Implement arch function to reorder irqchip probe entries Sunil V L
2023-12-19 17:45 ` Sunil V L
2023-12-19 17:45 ` Sunil V L
2023-12-19 17:45 ` [RFC PATCH v3 09/17] irqchip: riscv-intc: Add ACPI support for AIA Sunil V L
2023-12-19 17:45 ` Sunil V L
2023-12-19 17:45 ` Sunil V L
2023-12-19 17:45 ` [RFC PATCH v3 10/17] irqchip: riscv-imsic: Add ACPI support Sunil V L
2023-12-19 17:45 ` Sunil V L
2023-12-19 17:45 ` Sunil V L
2023-12-19 17:45 ` [RFC PATCH v3 11/17] irqchip: riscv-aplic: " Sunil V L
2023-12-19 17:45 ` Sunil V L
2023-12-19 17:45 ` Sunil V L
2023-12-19 17:45 ` [RFC PATCH v3 12/17] irqchip: irq-sifive-plic: " Sunil V L
2023-12-19 17:45 ` Sunil V L
2023-12-19 17:45 ` Sunil V L
2023-12-19 17:45 ` [RFC PATCH v3 13/17] ACPI: bus: Add RINTC IRQ model for RISC-V Sunil V L
2023-12-19 17:45 ` Sunil V L
2023-12-19 17:45 ` Sunil V L
2023-12-19 17:45 ` [RFC PATCH v3 14/17] ACPI: bus: Add acpi_riscv_init function Sunil V L
2023-12-19 17:45 ` Sunil V L
2023-12-19 17:45 ` Sunil V L
2023-12-19 17:45 ` [RFC PATCH v3 15/17] ACPI: RISC-V: Create APLIC platform device Sunil V L
2023-12-19 17:45 ` Sunil V L
2023-12-19 17:45 ` Sunil V L
2023-12-19 17:45 ` [RFC PATCH v3 16/17] ACPI: RISC-V: Create PLIC " Sunil V L
2023-12-19 17:45 ` Sunil V L
2023-12-19 17:45 ` Sunil V L
2023-12-19 17:45 ` Sunil V L [this message]
2023-12-19 17:45 ` [RFC PATCH v3 17/17] irqchip: riscv-intc: Set ACPI irqmodel Sunil V L
2023-12-19 17:45 ` Sunil V L
2023-12-19 17:50 ` [RFC PATCH v3 00/17] RISC-V: ACPI: Add external interrupt controller support Rafael J. Wysocki
2023-12-19 17:50 ` Rafael J. Wysocki
2023-12-19 17:50 ` Rafael J. Wysocki
2023-12-20 3:49 ` Sunil V L
2023-12-20 3:49 ` Sunil V L
2023-12-20 3:49 ` Sunil V L
2024-01-30 6:02 ` Sunil V L
2024-01-30 6:02 ` Sunil V L
2024-01-30 6:02 ` Sunil V L
2024-02-01 18:10 ` Rafael J. Wysocki
2024-02-01 18:10 ` Rafael J. Wysocki
2024-02-01 18:10 ` Rafael J. Wysocki
2024-02-02 12:17 ` Sunil V L
2024-02-02 12:17 ` Sunil V L
2024-02-02 12:17 ` Sunil V L
2024-03-04 10:20 ` Sunil V L
2024-03-04 10:20 ` Sunil V L
2024-03-04 10:20 ` Sunil V L
2024-04-15 15:09 ` Sunil V L
2024-04-15 15:09 ` Sunil V L
2024-04-15 15:09 ` Sunil V L
2024-04-15 15:18 ` Rafael J. Wysocki
2024-04-15 15:18 ` Rafael J. Wysocki
2024-04-15 15:18 ` Rafael J. Wysocki
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