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From: Marc Zyngier <maz@kernel.org>
To: linux-arm-kernel@lists.infradead.org, kvmarm@lists.linux.dev
Cc: Catalin Marinas <catalin.marinas@arm.com>,
	Will Deacon <will@kernel.org>,
	Mark Rutland <mark.rutland@arm.com>,
	Suzuki K Poulose <suzuki.poulose@arm.com>,
	Ard Biesheuvel <ardb@kernel.org>,
	James Morse <james.morse@arm.com>,
	Oliver Upton <oliver.upton@linux.dev>,
	Zenghui Yu <yuzenghui@huawei.com>
Subject: [PATCH v4 04/10] arm64: sysreg: Add layout for ID_AA64MMFR4_EL1
Date: Mon, 22 Jan 2024 18:13:38 +0000	[thread overview]
Message-ID: <20240122181344.258974-5-maz@kernel.org> (raw)
In-Reply-To: <20240122181344.258974-1-maz@kernel.org>

ARMv9.5 has infroduced ID_AA64MMFR4_EL1 with a bunch of new features.
Add the corresponding layout.

This is extracted from the public ARM SysReg_xml_A_profile-2023-09
delivery, timestamped d55f5af8e09052abe92a02adf820deea2eaed717.

Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Signed-off-by: Marc Zyngier <maz@kernel.org>
---
 arch/arm64/tools/sysreg | 37 +++++++++++++++++++++++++++++++++++++
 1 file changed, 37 insertions(+)

diff --git a/arch/arm64/tools/sysreg b/arch/arm64/tools/sysreg
index 4c9b67934367..fa3fe0856880 100644
--- a/arch/arm64/tools/sysreg
+++ b/arch/arm64/tools/sysreg
@@ -1791,6 +1791,43 @@ UnsignedEnum	3:0	TCRX
 EndEnum
 EndSysreg
 
+Sysreg	ID_AA64MMFR4_EL1	3	0	0	7	4
+Res0	63:40
+UnsignedEnum	39:36	E3DSE
+	0b0000	NI
+	0b0001	IMP
+EndEnum
+Res0	35:28
+SignedEnum	27:24	E2H0
+	0b0000	IMP
+	0b1110	NI_NV1
+	0b1111	NI
+EndEnum
+UnsignedEnum	23:20	NV_frac
+	0b0000	NV_NV2
+	0b0001	NV2_ONLY
+EndEnum
+UnsignedEnum	19:16	FGWTE3
+	0b0000	NI
+	0b0001	IMP
+EndEnum
+UnsignedEnum	15:12	HACDBS
+	0b0000	NI
+	0b0001	IMP
+EndEnum
+UnsignedEnum	11:8	ASID2
+	0b0000	NI
+	0b0001	IMP
+EndEnum
+SignedEnum	7:4	EIESB
+	0b0000	NI
+	0b0001	ToEL3
+	0b0010	ToELx
+	0b1111	ANY
+EndEnum
+Res0	3:0
+EndSysreg
+
 Sysreg	SCTLR_EL1	3	0	1	0	0
 Field	63	TIDCP
 Field	62	SPINTMASK
-- 
2.39.2


WARNING: multiple messages have this Message-ID (diff)
From: Marc Zyngier <maz@kernel.org>
To: linux-arm-kernel@lists.infradead.org, kvmarm@lists.linux.dev
Cc: Catalin Marinas <catalin.marinas@arm.com>,
	Will Deacon <will@kernel.org>,
	Mark Rutland <mark.rutland@arm.com>,
	Suzuki K Poulose <suzuki.poulose@arm.com>,
	Ard Biesheuvel <ardb@kernel.org>,
	James Morse <james.morse@arm.com>,
	Oliver Upton <oliver.upton@linux.dev>,
	Zenghui Yu <yuzenghui@huawei.com>
Subject: [PATCH v4 04/10] arm64: sysreg: Add layout for ID_AA64MMFR4_EL1
Date: Mon, 22 Jan 2024 18:13:38 +0000	[thread overview]
Message-ID: <20240122181344.258974-5-maz@kernel.org> (raw)
In-Reply-To: <20240122181344.258974-1-maz@kernel.org>

ARMv9.5 has infroduced ID_AA64MMFR4_EL1 with a bunch of new features.
Add the corresponding layout.

This is extracted from the public ARM SysReg_xml_A_profile-2023-09
delivery, timestamped d55f5af8e09052abe92a02adf820deea2eaed717.

Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Signed-off-by: Marc Zyngier <maz@kernel.org>
---
 arch/arm64/tools/sysreg | 37 +++++++++++++++++++++++++++++++++++++
 1 file changed, 37 insertions(+)

diff --git a/arch/arm64/tools/sysreg b/arch/arm64/tools/sysreg
index 4c9b67934367..fa3fe0856880 100644
--- a/arch/arm64/tools/sysreg
+++ b/arch/arm64/tools/sysreg
@@ -1791,6 +1791,43 @@ UnsignedEnum	3:0	TCRX
 EndEnum
 EndSysreg
 
+Sysreg	ID_AA64MMFR4_EL1	3	0	0	7	4
+Res0	63:40
+UnsignedEnum	39:36	E3DSE
+	0b0000	NI
+	0b0001	IMP
+EndEnum
+Res0	35:28
+SignedEnum	27:24	E2H0
+	0b0000	IMP
+	0b1110	NI_NV1
+	0b1111	NI
+EndEnum
+UnsignedEnum	23:20	NV_frac
+	0b0000	NV_NV2
+	0b0001	NV2_ONLY
+EndEnum
+UnsignedEnum	19:16	FGWTE3
+	0b0000	NI
+	0b0001	IMP
+EndEnum
+UnsignedEnum	15:12	HACDBS
+	0b0000	NI
+	0b0001	IMP
+EndEnum
+UnsignedEnum	11:8	ASID2
+	0b0000	NI
+	0b0001	IMP
+EndEnum
+SignedEnum	7:4	EIESB
+	0b0000	NI
+	0b0001	ToEL3
+	0b0010	ToELx
+	0b1111	ANY
+EndEnum
+Res0	3:0
+EndSysreg
+
 Sysreg	SCTLR_EL1	3	0	1	0	0
 Field	63	TIDCP
 Field	62	SPINTMASK
-- 
2.39.2


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  parent reply	other threads:[~2024-01-22 18:14 UTC|newest]

Thread overview: 56+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-01-22 18:13 [PATCH v4 00/10] arm64: Add support for FEAT_E2H0, or lack thereof Marc Zyngier
2024-01-22 18:13 ` Marc Zyngier
2024-01-22 18:13 ` [PATCH v4 01/10] arm64: Add macro to compose a sysreg field value Marc Zyngier
2024-01-22 18:13   ` Marc Zyngier
2024-02-08 11:40   ` Catalin Marinas
2024-02-08 11:40     ` Catalin Marinas
2024-01-22 18:13 ` [PATCH v4 02/10] arm64: cpufeatures: Correctly handle signed values Marc Zyngier
2024-01-22 18:13   ` Marc Zyngier
2024-02-08 12:13   ` Catalin Marinas
2024-02-08 12:13     ` Catalin Marinas
2024-01-22 18:13 ` [PATCH v4 03/10] arm64: cpufeature: Correctly display signed override values Marc Zyngier
2024-01-22 18:13   ` Marc Zyngier
2024-02-08 12:14   ` Catalin Marinas
2024-02-08 12:14     ` Catalin Marinas
2024-01-22 18:13 ` Marc Zyngier [this message]
2024-01-22 18:13   ` [PATCH v4 04/10] arm64: sysreg: Add layout for ID_AA64MMFR4_EL1 Marc Zyngier
2024-02-08 12:25   ` Catalin Marinas
2024-02-08 12:25     ` Catalin Marinas
2024-02-08 13:06   ` Miguel Luis
2024-02-08 13:06     ` Miguel Luis
2024-02-08 13:15     ` Marc Zyngier
2024-02-08 13:15       ` Marc Zyngier
2024-01-22 18:13 ` [PATCH v4 05/10] arm64: cpufeature: Add ID_AA64MMFR4_EL1 handling Marc Zyngier
2024-01-22 18:13   ` Marc Zyngier
2024-02-08 12:25   ` Catalin Marinas
2024-02-08 12:25     ` Catalin Marinas
2024-01-22 18:13 ` [PATCH v4 06/10] arm64: cpufeature: Detect HCR_EL2.NV1 being RES0 Marc Zyngier
2024-01-22 18:13   ` Marc Zyngier
2024-02-08 12:26   ` Catalin Marinas
2024-02-08 12:26     ` Catalin Marinas
2024-02-08 12:27   ` Catalin Marinas
2024-02-08 12:27     ` Catalin Marinas
2024-02-12 12:48   ` Marek Szyprowski
2024-02-12 12:48     ` Marek Szyprowski
2024-02-12 14:00     ` Marc Zyngier
2024-02-12 14:00       ` Marc Zyngier
2024-02-12 14:21       ` Marek Szyprowski
2024-02-12 14:21         ` Marek Szyprowski
2024-01-22 18:13 ` [PATCH v4 07/10] arm64: Treat HCR_EL2.E2H as RES1 when ID_AA64MMFR4_EL1.E2H0 is negative Marc Zyngier
2024-01-22 18:13   ` Marc Zyngier
2024-02-08 12:27   ` Catalin Marinas
2024-02-08 12:27     ` Catalin Marinas
2024-01-22 18:13 ` [PATCH v4 08/10] KVM: arm64: Expose ID_AA64MMFR4_EL1 to guests Marc Zyngier
2024-01-22 18:13   ` Marc Zyngier
2024-01-22 18:13 ` [PATCH v4 09/10] KVM: arm64: Force guest's HCR_EL2.E2H RES1 when NV1 is not implemented Marc Zyngier
2024-01-22 18:13   ` Marc Zyngier
2024-01-22 18:13 ` [PATCH v4 10/10] KVM: arm64: Handle Apple M2 as not having HCR_EL2.NV1 implemented Marc Zyngier
2024-01-22 18:13   ` Marc Zyngier
2024-02-08 12:29   ` Catalin Marinas
2024-02-08 12:29     ` Catalin Marinas
2024-02-02 19:03 ` [PATCH v4 00/10] arm64: Add support for FEAT_E2H0, or lack thereof Oliver Upton
2024-02-02 19:03   ` Oliver Upton
2024-02-08 12:30   ` Catalin Marinas
2024-02-08 12:30     ` Catalin Marinas
2024-02-08 15:24 ` Oliver Upton
2024-02-08 15:24   ` Oliver Upton

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