From: Conor Dooley <conor@kernel.org>
To: Samuel Holland <samuel.holland@sifive.com>
Cc: Conor Dooley <conor.dooley@microchip.com>,
Palmer Dabbelt <palmer@dabbelt.com>,
linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH 2/4] riscv: Fix loading 64-bit NOMMU kernels past the start of RAM
Date: Wed, 28 Feb 2024 15:37:30 +0000 [thread overview]
Message-ID: <20240228-cavity-aground-d1e8072a2c0d@spud> (raw)
In-Reply-To: <9673cbe7-41ec-4261-9be8-fc5191ade56c@sifive.com>
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On Tue, Feb 27, 2024 at 01:22:12PM -0600, Samuel Holland wrote:
> Hi Conor,
>
> On 2024-02-27 6:18 AM, Conor Dooley wrote:
> > On Mon, Feb 26, 2024 at 04:34:47PM -0800, Samuel Holland wrote:
> >> commit 3335068f8721 ("riscv: Use PUD/P4D/PGD pages for the linear
> >> mapping") added logic to allow using RAM below the kernel load address.
> >> However, this does not work for NOMMU, where PAGE_OFFSET is fixed to the
> >> kernel load address. Since that range of memory corresponds to PFNs
> >> below ARCH_PFN_OFFSET, mm initialization runs off the beginning of
> >> mem_map and corrupts adjacent kernel memory. Fix this by restoring the
> >> previous behavior for NOMMU kernels.
> >>
> >> Fixes: 3335068f8721 ("riscv: Use PUD/P4D/PGD pages for the linear mapping")
> >
> > This commit was a year ago, why has nobody reported this as being an
> > issue before?
>
> I can think of a few reasons:
> 1) NOMMU users are likely to be using RV32, which is not affected.
> 2) Before patch 4 of this series, NOMMU implied M-mode, so there was nothing in
> the way to prevent loading Linux at the very beginning of RAM. (U-Boot/SPL
> relocates itself to the end of RAM, so it would not cause a problem.)
> 3) Platforms where RAM does not begin at exactly 0x80000000 would be affected,
> there are several workarounds: change the start of RAM (for soft cores), change
> PAGE_OFFSET, or change the memory ranges in the devicetree to exclude anything
> below PAGE_OFFSET.
>
> It's possible that nobody was affected, but it's still technically a regression
> (a hypothetical platform with RAM from 0x40000000 to 0xc0000000 would crash
> instead of only being able to use half its RAM), so I thought it still deserved
> the Fixes: tag.
Right, thanks for explaining.
Cheers,
Conor.
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WARNING: multiple messages have this Message-ID (diff)
From: Conor Dooley <conor@kernel.org>
To: Samuel Holland <samuel.holland@sifive.com>
Cc: Conor Dooley <conor.dooley@microchip.com>,
Palmer Dabbelt <palmer@dabbelt.com>,
linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH 2/4] riscv: Fix loading 64-bit NOMMU kernels past the start of RAM
Date: Wed, 28 Feb 2024 15:37:30 +0000 [thread overview]
Message-ID: <20240228-cavity-aground-d1e8072a2c0d@spud> (raw)
In-Reply-To: <9673cbe7-41ec-4261-9be8-fc5191ade56c@sifive.com>
[-- Attachment #1: Type: text/plain, Size: 1810 bytes --]
On Tue, Feb 27, 2024 at 01:22:12PM -0600, Samuel Holland wrote:
> Hi Conor,
>
> On 2024-02-27 6:18 AM, Conor Dooley wrote:
> > On Mon, Feb 26, 2024 at 04:34:47PM -0800, Samuel Holland wrote:
> >> commit 3335068f8721 ("riscv: Use PUD/P4D/PGD pages for the linear
> >> mapping") added logic to allow using RAM below the kernel load address.
> >> However, this does not work for NOMMU, where PAGE_OFFSET is fixed to the
> >> kernel load address. Since that range of memory corresponds to PFNs
> >> below ARCH_PFN_OFFSET, mm initialization runs off the beginning of
> >> mem_map and corrupts adjacent kernel memory. Fix this by restoring the
> >> previous behavior for NOMMU kernels.
> >>
> >> Fixes: 3335068f8721 ("riscv: Use PUD/P4D/PGD pages for the linear mapping")
> >
> > This commit was a year ago, why has nobody reported this as being an
> > issue before?
>
> I can think of a few reasons:
> 1) NOMMU users are likely to be using RV32, which is not affected.
> 2) Before patch 4 of this series, NOMMU implied M-mode, so there was nothing in
> the way to prevent loading Linux at the very beginning of RAM. (U-Boot/SPL
> relocates itself to the end of RAM, so it would not cause a problem.)
> 3) Platforms where RAM does not begin at exactly 0x80000000 would be affected,
> there are several workarounds: change the start of RAM (for soft cores), change
> PAGE_OFFSET, or change the memory ranges in the devicetree to exclude anything
> below PAGE_OFFSET.
>
> It's possible that nobody was affected, but it's still technically a regression
> (a hypothetical platform with RAM from 0x40000000 to 0xc0000000 would crash
> instead of only being able to use half its RAM), so I thought it still deserved
> the Fixes: tag.
Right, thanks for explaining.
Cheers,
Conor.
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next prev parent reply other threads:[~2024-02-28 15:37 UTC|newest]
Thread overview: 36+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-02-27 0:34 [PATCH 0/4] riscv: 64-bit NOMMU fixes and enhancements Samuel Holland
2024-02-27 0:34 ` Samuel Holland
2024-02-27 0:34 ` [PATCH 1/4] riscv: Fix TASK_SIZE on 64-bit NOMMU Samuel Holland
2024-02-27 0:34 ` Samuel Holland
2024-03-27 7:04 ` Jisheng Zhang
2024-03-27 7:04 ` Jisheng Zhang
2024-03-27 7:54 ` Bo Gan
2024-03-27 7:54 ` Bo Gan
2024-02-27 0:34 ` [PATCH 2/4] riscv: Fix loading 64-bit NOMMU kernels past the start of RAM Samuel Holland
2024-02-27 0:34 ` Samuel Holland
2024-02-27 12:18 ` Conor Dooley
2024-02-27 12:18 ` Conor Dooley
2024-02-27 19:22 ` Samuel Holland
2024-02-27 19:22 ` Samuel Holland
2024-02-28 15:37 ` Conor Dooley [this message]
2024-02-28 15:37 ` Conor Dooley
2024-02-27 0:34 ` [PATCH 3/4] riscv: Remove MMU dependency from Zbb and Zicboz Samuel Holland
2024-02-27 0:34 ` Samuel Holland
2024-02-27 11:51 ` Conor Dooley
2024-02-27 11:51 ` Conor Dooley
2024-02-27 0:34 ` [PATCH 4/4] riscv: Allow NOMMU kernels to run in S-mode Samuel Holland
2024-02-27 0:34 ` Samuel Holland
2024-02-27 12:24 ` Conor Dooley
2024-02-27 12:24 ` Conor Dooley
2024-02-27 19:02 ` Samuel Holland
2024-02-27 19:02 ` Samuel Holland
2024-02-28 15:21 ` Conor Dooley
2024-02-28 15:21 ` Conor Dooley
2024-02-27 12:13 ` [PATCH 0/4] riscv: 64-bit NOMMU fixes and enhancements Conor Dooley
2024-02-27 12:13 ` Conor Dooley
2024-02-27 18:51 ` Samuel Holland
2024-02-27 18:51 ` Samuel Holland
2024-04-10 14:00 ` patchwork-bot+linux-riscv
2024-04-10 14:00 ` patchwork-bot+linux-riscv
2024-04-10 14:20 ` patchwork-bot+linux-riscv
2024-04-10 14:20 ` patchwork-bot+linux-riscv
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