From: Jisheng Zhang <jszhang@kernel.org>
To: Samuel Holland <samuel.holland@sifive.com>
Cc: Palmer Dabbelt <palmer@dabbelt.com>,
linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH 1/4] riscv: Fix TASK_SIZE on 64-bit NOMMU
Date: Wed, 27 Mar 2024 15:04:05 +0800 [thread overview]
Message-ID: <ZgPE5e7FzB5H4MnK@xhacker> (raw)
In-Reply-To: <20240227003630.3634533-2-samuel.holland@sifive.com>
On Mon, Feb 26, 2024 at 04:34:46PM -0800, Samuel Holland wrote:
> On NOMMU, userspace memory can come from anywhere in physical RAM. The
> current definition of TASK_SIZE is wrong if any RAM exists above 4G,
> causing spurious failures in the userspace access routines.
>
> Fixes: 6bd33e1ece52 ("riscv: add nommu support")
> Fixes: c3f896dcf1e4 ("mm: switch the test_vmalloc module to use __vmalloc_node")
> Signed-off-by: Samuel Holland <samuel.holland@sifive.com>
Reviewed-by: Jisheng Zhang <jszhang@kernel.org>
> ---
>
> arch/riscv/include/asm/pgtable.h | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/arch/riscv/include/asm/pgtable.h b/arch/riscv/include/asm/pgtable.h
> index 0c94260b5d0c..a564a39e5676 100644
> --- a/arch/riscv/include/asm/pgtable.h
> +++ b/arch/riscv/include/asm/pgtable.h
> @@ -882,7 +882,7 @@ static inline pte_t pte_swp_clear_exclusive(pte_t pte)
> #define PAGE_SHARED __pgprot(0)
> #define PAGE_KERNEL __pgprot(0)
> #define swapper_pg_dir NULL
> -#define TASK_SIZE 0xffffffffUL
> +#define TASK_SIZE _AC(-1, UL)
> #define VMALLOC_START _AC(0, UL)
> #define VMALLOC_END TASK_SIZE
>
> --
> 2.43.0
>
>
> _______________________________________________
> linux-riscv mailing list
> linux-riscv@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-riscv
_______________________________________________
linux-riscv mailing list
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http://lists.infradead.org/mailman/listinfo/linux-riscv
WARNING: multiple messages have this Message-ID (diff)
From: Jisheng Zhang <jszhang@kernel.org>
To: Samuel Holland <samuel.holland@sifive.com>
Cc: Palmer Dabbelt <palmer@dabbelt.com>,
linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH 1/4] riscv: Fix TASK_SIZE on 64-bit NOMMU
Date: Wed, 27 Mar 2024 15:04:05 +0800 [thread overview]
Message-ID: <ZgPE5e7FzB5H4MnK@xhacker> (raw)
In-Reply-To: <20240227003630.3634533-2-samuel.holland@sifive.com>
On Mon, Feb 26, 2024 at 04:34:46PM -0800, Samuel Holland wrote:
> On NOMMU, userspace memory can come from anywhere in physical RAM. The
> current definition of TASK_SIZE is wrong if any RAM exists above 4G,
> causing spurious failures in the userspace access routines.
>
> Fixes: 6bd33e1ece52 ("riscv: add nommu support")
> Fixes: c3f896dcf1e4 ("mm: switch the test_vmalloc module to use __vmalloc_node")
> Signed-off-by: Samuel Holland <samuel.holland@sifive.com>
Reviewed-by: Jisheng Zhang <jszhang@kernel.org>
> ---
>
> arch/riscv/include/asm/pgtable.h | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/arch/riscv/include/asm/pgtable.h b/arch/riscv/include/asm/pgtable.h
> index 0c94260b5d0c..a564a39e5676 100644
> --- a/arch/riscv/include/asm/pgtable.h
> +++ b/arch/riscv/include/asm/pgtable.h
> @@ -882,7 +882,7 @@ static inline pte_t pte_swp_clear_exclusive(pte_t pte)
> #define PAGE_SHARED __pgprot(0)
> #define PAGE_KERNEL __pgprot(0)
> #define swapper_pg_dir NULL
> -#define TASK_SIZE 0xffffffffUL
> +#define TASK_SIZE _AC(-1, UL)
> #define VMALLOC_START _AC(0, UL)
> #define VMALLOC_END TASK_SIZE
>
> --
> 2.43.0
>
>
> _______________________________________________
> linux-riscv mailing list
> linux-riscv@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-riscv
next prev parent reply other threads:[~2024-03-27 7:17 UTC|newest]
Thread overview: 36+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-02-27 0:34 [PATCH 0/4] riscv: 64-bit NOMMU fixes and enhancements Samuel Holland
2024-02-27 0:34 ` Samuel Holland
2024-02-27 0:34 ` [PATCH 1/4] riscv: Fix TASK_SIZE on 64-bit NOMMU Samuel Holland
2024-02-27 0:34 ` Samuel Holland
2024-03-27 7:04 ` Jisheng Zhang [this message]
2024-03-27 7:04 ` Jisheng Zhang
2024-03-27 7:54 ` Bo Gan
2024-03-27 7:54 ` Bo Gan
2024-02-27 0:34 ` [PATCH 2/4] riscv: Fix loading 64-bit NOMMU kernels past the start of RAM Samuel Holland
2024-02-27 0:34 ` Samuel Holland
2024-02-27 12:18 ` Conor Dooley
2024-02-27 12:18 ` Conor Dooley
2024-02-27 19:22 ` Samuel Holland
2024-02-27 19:22 ` Samuel Holland
2024-02-28 15:37 ` Conor Dooley
2024-02-28 15:37 ` Conor Dooley
2024-02-27 0:34 ` [PATCH 3/4] riscv: Remove MMU dependency from Zbb and Zicboz Samuel Holland
2024-02-27 0:34 ` Samuel Holland
2024-02-27 11:51 ` Conor Dooley
2024-02-27 11:51 ` Conor Dooley
2024-02-27 0:34 ` [PATCH 4/4] riscv: Allow NOMMU kernels to run in S-mode Samuel Holland
2024-02-27 0:34 ` Samuel Holland
2024-02-27 12:24 ` Conor Dooley
2024-02-27 12:24 ` Conor Dooley
2024-02-27 19:02 ` Samuel Holland
2024-02-27 19:02 ` Samuel Holland
2024-02-28 15:21 ` Conor Dooley
2024-02-28 15:21 ` Conor Dooley
2024-02-27 12:13 ` [PATCH 0/4] riscv: 64-bit NOMMU fixes and enhancements Conor Dooley
2024-02-27 12:13 ` Conor Dooley
2024-02-27 18:51 ` Samuel Holland
2024-02-27 18:51 ` Samuel Holland
2024-04-10 14:00 ` patchwork-bot+linux-riscv
2024-04-10 14:00 ` patchwork-bot+linux-riscv
2024-04-10 14:20 ` patchwork-bot+linux-riscv
2024-04-10 14:20 ` patchwork-bot+linux-riscv
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