* [PATCH 01/46] drm/amd/display: Do cursor programming with rest of pipe
2024-04-24 8:31 [PATCH 00/46] DC Patches April 29, 2024 Wayne Lin
@ 2024-04-24 8:31 ` Wayne Lin
2024-04-24 8:31 ` [PATCH 02/46] drm/amd/display: Always use legacy way of setting cursor on DCE Wayne Lin
` (13 subsequent siblings)
14 siblings, 0 replies; 17+ messages in thread
From: Wayne Lin @ 2024-04-24 8:31 UTC (permalink / raw)
To: amd-gfx
Cc: Harry.Wentland, Sunpeng.Li, Rodrigo.Siqueira, Aurabindo.Pillai,
roman.li, wayne.lin, agustin.gutierrez, chiahsuan.chung,
hersenxs.wu, jerry.zuo, Harry Wentland
From: Harry Wentland <harry.wentland@amd.com>
Cursors are always programmed independently of updates on other
planes. When atomic commits program cursor and surface updates
together the cursor update might be locked out by the surface
update and not take effect.
To combat this program cursor and surface updates together via
dc_update_planes_and_stream to ensure they can be applied
atomically.
When cursor updates come on their own use the old method
to program the cursor as dc_update_planes_and_stream isn't
handling this case correctly (yet), leading to a flickering
screen.
Closes: https://gitlab.freedesktop.org/drm/amd/-/issues/2186
Reviewed-by: Agustin Gutierrez <agustin.gutierrez@amd.com>
Acked-by: Wayne Lin <wayne.lin@amd.com>
Signed-off-by: Harry Wentland <harry.wentland@amd.com>
---
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 79 ++++++++++++++++++-
.../amd/display/amdgpu_dm/amdgpu_dm_plane.c | 4 +-
.../amd/display/amdgpu_dm/amdgpu_dm_plane.h | 3 +
drivers/gpu/drm/amd/display/dc/core/dc.c | 5 ++
.../gpu/drm/amd/display/dc/core/dc_stream.c | 14 ++--
drivers/gpu/drm/amd/display/dc/dc_stream.h | 12 +++
6 files changed, 105 insertions(+), 12 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
index 7481440ab124..75b65b243f1e 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
@@ -8365,6 +8365,77 @@ static inline uint32_t get_mem_type(struct drm_framebuffer *fb)
return abo->tbo.resource ? abo->tbo.resource->mem_type : 0;
}
+static void amdgpu_dm_update_cursor(struct drm_plane *plane,
+ struct drm_plane_state *old_plane_state,
+ struct dc_stream_update *update)
+{
+ struct amdgpu_device *adev = drm_to_adev(plane->dev);
+ struct amdgpu_framebuffer *afb = to_amdgpu_framebuffer(plane->state->fb);
+ struct drm_crtc *crtc = afb ? plane->state->crtc : old_plane_state->crtc;
+ struct dm_crtc_state *crtc_state = crtc ? to_dm_crtc_state(crtc->state) : NULL;
+ struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc);
+ uint64_t address = afb ? afb->address : 0;
+ struct dc_cursor_position position = {0};
+ struct dc_cursor_attributes attributes;
+ int ret;
+
+ if (!plane->state->fb && !old_plane_state->fb)
+ return;
+
+ drm_dbg_atomic(plane->dev, "crtc_id=%d with size %d to %d\n",
+ amdgpu_crtc->crtc_id, plane->state->crtc_w,
+ plane->state->crtc_h);
+
+ ret = amdgpu_dm_plane_get_cursor_position(plane, crtc, &position);
+ if (ret)
+ return;
+
+ if (!position.enable) {
+ /* turn off cursor */
+ if (crtc_state && crtc_state->stream) {
+ dc_stream_set_cursor_position(crtc_state->stream,
+ &position);
+ update->cursor_position = &crtc_state->stream->cursor_position;
+ }
+ return;
+ }
+
+ amdgpu_crtc->cursor_width = plane->state->crtc_w;
+ amdgpu_crtc->cursor_height = plane->state->crtc_h;
+
+ memset(&attributes, 0, sizeof(attributes));
+ attributes.address.high_part = upper_32_bits(address);
+ attributes.address.low_part = lower_32_bits(address);
+ attributes.width = plane->state->crtc_w;
+ attributes.height = plane->state->crtc_h;
+ attributes.color_format = CURSOR_MODE_COLOR_PRE_MULTIPLIED_ALPHA;
+ attributes.rotation_angle = 0;
+ attributes.attribute_flags.value = 0;
+
+ /* Enable cursor degamma ROM on DCN3+ for implicit sRGB degamma in DRM
+ * legacy gamma setup.
+ */
+ if (crtc_state->cm_is_degamma_srgb &&
+ adev->dm.dc->caps.color.dpp.gamma_corr)
+ attributes.attribute_flags.bits.ENABLE_CURSOR_DEGAMMA = 1;
+
+ attributes.pitch = afb->base.pitches[0] / afb->base.format->cpp[0];
+
+ if (crtc_state->stream) {
+ if (!dc_stream_set_cursor_attributes(crtc_state->stream,
+ &attributes))
+ DRM_ERROR("DC failed to set cursor attributes\n");
+
+ update->cursor_attributes = &crtc_state->stream->cursor_attributes;
+
+ if (!dc_stream_set_cursor_position(crtc_state->stream,
+ &position))
+ DRM_ERROR("DC failed to set cursor position\n");
+
+ update->cursor_position = &crtc_state->stream->cursor_position;
+ }
+}
+
static void amdgpu_dm_commit_planes(struct drm_atomic_state *state,
struct drm_device *dev,
struct amdgpu_display_manager *dm,
@@ -8388,6 +8459,7 @@ static void amdgpu_dm_commit_planes(struct drm_atomic_state *state,
bool cursor_update = false;
bool pflip_present = false;
bool dirty_rects_changed = false;
+ bool updated_planes_and_streams = false;
struct {
struct dc_surface_update surface_updates[MAX_SURFACES];
struct dc_plane_info plane_infos[MAX_SURFACES];
@@ -8424,8 +8496,10 @@ static void amdgpu_dm_commit_planes(struct drm_atomic_state *state,
/* Cursor plane is handled after stream updates */
if (plane->type == DRM_PLANE_TYPE_CURSOR) {
if ((fb && crtc == pcrtc) ||
- (old_plane_state->fb && old_plane_state->crtc == pcrtc))
+ (old_plane_state->fb && old_plane_state->crtc == pcrtc)) {
cursor_update = true;
+ amdgpu_dm_update_cursor(plane, old_plane_state, &bundle->stream_update);
+ }
continue;
}
@@ -8698,6 +8772,7 @@ static void amdgpu_dm_commit_planes(struct drm_atomic_state *state,
acrtc_state->stream,
&bundle->stream_update,
bundle->surface_updates);
+ updated_planes_and_streams = true;
/**
* Enable or disable the interrupts on the backend.
@@ -8775,7 +8850,7 @@ static void amdgpu_dm_commit_planes(struct drm_atomic_state *state,
* This avoids redundant programming in the case where we're going
* to be disabling a single plane - those pipes are being disabled.
*/
- if (acrtc_state->active_planes)
+ if (acrtc_state->active_planes && !updated_planes_and_streams)
amdgpu_dm_commit_cursors(state);
cleanup:
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c
index 3c03f690852c..a64f20fcddaa 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c
@@ -1197,8 +1197,8 @@ static int amdgpu_dm_plane_atomic_async_check(struct drm_plane *plane,
return 0;
}
-static int amdgpu_dm_plane_get_cursor_position(struct drm_plane *plane, struct drm_crtc *crtc,
- struct dc_cursor_position *position)
+int amdgpu_dm_plane_get_cursor_position(struct drm_plane *plane, struct drm_crtc *crtc,
+ struct dc_cursor_position *position)
{
struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc);
int x, y;
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.h b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.h
index b51a6b57bd9b..6498359bff6f 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.h
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.h
@@ -29,6 +29,9 @@
#include "dc.h"
+int amdgpu_dm_plane_get_cursor_position(struct drm_plane *plane, struct drm_crtc *crtc,
+ struct dc_cursor_position *position);
+
void amdgpu_dm_plane_handle_cursor_update(struct drm_plane *plane,
struct drm_plane_state *old_plane_state);
diff --git a/drivers/gpu/drm/amd/display/dc/core/dc.c b/drivers/gpu/drm/amd/display/dc/core/dc.c
index 3e16041bf4f9..e955c97697ff 100644
--- a/drivers/gpu/drm/amd/display/dc/core/dc.c
+++ b/drivers/gpu/drm/amd/display/dc/core/dc.c
@@ -3340,6 +3340,11 @@ static void commit_planes_do_stream_update(struct dc *dc,
}
}
+ if (stream_update->cursor_attributes)
+ program_cursor_attributes(dc, stream);
+
+ if (stream_update->cursor_position)
+ program_cursor_position(dc, stream);
/* Full fe update*/
if (update_type == UPDATE_TYPE_FAST)
diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_stream.c b/drivers/gpu/drm/amd/display/dc/core/dc_stream.c
index 3ac1fec4bf53..b5a89b587d86 100644
--- a/drivers/gpu/drm/amd/display/dc/core/dc_stream.c
+++ b/drivers/gpu/drm/amd/display/dc/core/dc_stream.c
@@ -219,10 +219,9 @@ struct dc_stream_status *dc_stream_get_status(
return dc_state_get_stream_status(dc->current_state, stream);
}
-static void program_cursor_attributes(
+void program_cursor_attributes(
struct dc *dc,
- struct dc_stream_state *stream,
- const struct dc_cursor_attributes *attributes)
+ struct dc_stream_state *stream)
{
int i;
struct resource_context *res_ctx;
@@ -318,7 +317,7 @@ bool dc_stream_program_cursor_attributes(
reset_idle_optimizations = true;
}
- program_cursor_attributes(dc, stream, attributes);
+ program_cursor_attributes(dc, stream);
/* re-enable idle optimizations if necessary */
if (reset_idle_optimizations && !dc->debug.disable_dmub_reallow_idle)
@@ -330,10 +329,9 @@ bool dc_stream_program_cursor_attributes(
return false;
}
-static void program_cursor_position(
+void program_cursor_position(
struct dc *dc,
- struct dc_stream_state *stream,
- const struct dc_cursor_position *position)
+ struct dc_stream_state *stream)
{
int i;
struct resource_context *res_ctx;
@@ -410,7 +408,7 @@ bool dc_stream_program_cursor_position(
reset_idle_optimizations = true;
}
- program_cursor_position(dc, stream, position);
+ program_cursor_position(dc, stream);
/* re-enable idle optimizations if necessary */
if (reset_idle_optimizations && !dc->debug.disable_dmub_reallow_idle)
dc_allow_idle_optimizations(dc, true);
diff --git a/drivers/gpu/drm/amd/display/dc/dc_stream.h b/drivers/gpu/drm/amd/display/dc/dc_stream.h
index 8dd65a95d84b..1469a20f2511 100644
--- a/drivers/gpu/drm/amd/display/dc/dc_stream.h
+++ b/drivers/gpu/drm/amd/display/dc/dc_stream.h
@@ -341,6 +341,9 @@ struct dc_stream_update {
struct test_pattern *pending_test_pattern;
struct dc_crtc_timing_adjust *crtc_timing_adjust;
+
+ struct dc_cursor_attributes *cursor_attributes;
+ struct dc_cursor_position *cursor_position;
};
bool dc_is_stream_unchanged(
@@ -480,6 +483,15 @@ struct dc_stream_status *dc_stream_get_status(
* Cursor interfaces - To manages the cursor within a stream
******************************************************************************/
/* TODO: Deprecated once we switch to dc_set_cursor_position */
+
+void program_cursor_attributes(
+ struct dc *dc,
+ struct dc_stream_state *stream);
+
+void program_cursor_position(
+ struct dc *dc,
+ struct dc_stream_state *stream);
+
bool dc_stream_set_cursor_attributes(
struct dc_stream_state *stream,
const struct dc_cursor_attributes *attributes);
--
2.37.3
^ permalink raw reply related [flat|nested] 17+ messages in thread* [PATCH 02/46] drm/amd/display: Always use legacy way of setting cursor on DCE
2024-04-24 8:31 [PATCH 00/46] DC Patches April 29, 2024 Wayne Lin
2024-04-24 8:31 ` [PATCH 01/46] drm/amd/display: Do cursor programming with rest of pipe Wayne Lin
@ 2024-04-24 8:31 ` Wayne Lin
2024-04-24 8:31 ` [PATCH 03/46] drm/amd/display: Add NULL pointer check for kzalloc Wayne Lin
` (12 subsequent siblings)
14 siblings, 0 replies; 17+ messages in thread
From: Wayne Lin @ 2024-04-24 8:31 UTC (permalink / raw)
To: amd-gfx
Cc: Harry.Wentland, Sunpeng.Li, Rodrigo.Siqueira, Aurabindo.Pillai,
roman.li, wayne.lin, agustin.gutierrez, chiahsuan.chung,
hersenxs.wu, jerry.zuo, Harry Wentland, Sun peng Li
From: Harry Wentland <harry.wentland@amd.com>
Some IGT tests fail with the new atomic cursor updates
when running on older DCE-based ASICs. To work around
these issues keep calling the amdgpu_dm_commit_cursors
for each cursor update on DCE, even if those cursor
updates coincide with other plane updates.
Reviewed-by: Agustin Gutierrez <agustin.gutierrez@amd.com>
Reviewed-by: Sun peng Li <sunpeng.li@amd.com>
Acked-by: Wayne Lin <wayne.lin@amd.com>
Signed-off-by: Harry Wentland <harry.wentland@amd.com>
---
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 6 ++++--
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
index 75b65b243f1e..9d36dba914e9 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
@@ -8498,7 +8498,8 @@ static void amdgpu_dm_commit_planes(struct drm_atomic_state *state,
if ((fb && crtc == pcrtc) ||
(old_plane_state->fb && old_plane_state->crtc == pcrtc)) {
cursor_update = true;
- amdgpu_dm_update_cursor(plane, old_plane_state, &bundle->stream_update);
+ if (amdgpu_ip_version(dm->adev, DCE_HWIP, 0) != 0)
+ amdgpu_dm_update_cursor(plane, old_plane_state, &bundle->stream_update);
}
continue;
@@ -8850,7 +8851,8 @@ static void amdgpu_dm_commit_planes(struct drm_atomic_state *state,
* This avoids redundant programming in the case where we're going
* to be disabling a single plane - those pipes are being disabled.
*/
- if (acrtc_state->active_planes && !updated_planes_and_streams)
+ if (acrtc_state->active_planes &&
+ (!updated_planes_and_streams || amdgpu_ip_version(dm->adev, DCE_HWIP, 0) == 0))
amdgpu_dm_commit_cursors(state);
cleanup:
--
2.37.3
^ permalink raw reply related [flat|nested] 17+ messages in thread* [PATCH 03/46] drm/amd/display: Add NULL pointer check for kzalloc
2024-04-24 8:31 [PATCH 00/46] DC Patches April 29, 2024 Wayne Lin
2024-04-24 8:31 ` [PATCH 01/46] drm/amd/display: Do cursor programming with rest of pipe Wayne Lin
2024-04-24 8:31 ` [PATCH 02/46] drm/amd/display: Always use legacy way of setting cursor on DCE Wayne Lin
@ 2024-04-24 8:31 ` Wayne Lin
2024-04-24 8:31 ` [PATCH 04/46] drm/amd/display: Check index msg_id before read or write Wayne Lin
` (11 subsequent siblings)
14 siblings, 0 replies; 17+ messages in thread
From: Wayne Lin @ 2024-04-24 8:31 UTC (permalink / raw)
To: amd-gfx
Cc: Harry.Wentland, Sunpeng.Li, Rodrigo.Siqueira, Aurabindo.Pillai,
roman.li, wayne.lin, agustin.gutierrez, chiahsuan.chung,
hersenxs.wu, jerry.zuo, Alex Hung
From: Hersen Wu <hersenxs.wu@amd.com>
[Why & How]
Check return pointer of kzalloc before using it.
Reviewed-by: Alex Hung <alex.hung@amd.com>
Acked-by: Wayne Lin <wayne.lin@amd.com>
Signed-off-by: Hersen Wu <hersenxs.wu@amd.com>
---
.../gpu/drm/amd/display/dc/clk_mgr/dcn30/dcn30_clk_mgr.c | 8 ++++++++
.../gpu/drm/amd/display/dc/clk_mgr/dcn32/dcn32_clk_mgr.c | 8 ++++++++
.../drm/amd/display/dc/resource/dcn30/dcn30_resource.c | 3 +++
.../drm/amd/display/dc/resource/dcn31/dcn31_resource.c | 5 +++++
.../drm/amd/display/dc/resource/dcn314/dcn314_resource.c | 5 +++++
.../drm/amd/display/dc/resource/dcn315/dcn315_resource.c | 2 ++
.../drm/amd/display/dc/resource/dcn316/dcn316_resource.c | 2 ++
.../drm/amd/display/dc/resource/dcn32/dcn32_resource.c | 5 +++++
.../drm/amd/display/dc/resource/dcn321/dcn321_resource.c | 2 ++
.../drm/amd/display/dc/resource/dcn35/dcn35_resource.c | 2 ++
.../drm/amd/display/dc/resource/dcn351/dcn351_resource.c | 2 ++
11 files changed, 44 insertions(+)
diff --git a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn30/dcn30_clk_mgr.c b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn30/dcn30_clk_mgr.c
index 4cb0db0ed92f..8083a553c60e 100644
--- a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn30/dcn30_clk_mgr.c
+++ b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn30/dcn30_clk_mgr.c
@@ -560,11 +560,19 @@ void dcn3_clk_mgr_construct(
dce_clock_read_ss_info(clk_mgr);
clk_mgr->base.bw_params = kzalloc(sizeof(*clk_mgr->base.bw_params), GFP_KERNEL);
+ if (!clk_mgr->base.bw_params) {
+ BREAK_TO_DEBUGGER();
+ return;
+ }
/* need physical address of table to give to PMFW */
clk_mgr->wm_range_table = dm_helpers_allocate_gpu_mem(clk_mgr->base.ctx,
DC_MEM_ALLOC_TYPE_GART, sizeof(WatermarksExternal_t),
&clk_mgr->wm_range_table_addr);
+ if (!clk_mgr->wm_range_table) {
+ BREAK_TO_DEBUGGER();
+ return;
+ }
}
void dcn3_clk_mgr_destroy(struct clk_mgr_internal *clk_mgr)
diff --git a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn32/dcn32_clk_mgr.c b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn32/dcn32_clk_mgr.c
index d7bbb0891398..b9e1f3e0b31d 100644
--- a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn32/dcn32_clk_mgr.c
+++ b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn32/dcn32_clk_mgr.c
@@ -1199,11 +1199,19 @@ void dcn32_clk_mgr_construct(
clk_mgr->smu_present = false;
clk_mgr->base.bw_params = kzalloc(sizeof(*clk_mgr->base.bw_params), GFP_KERNEL);
+ if (!clk_mgr->base.bw_params) {
+ BREAK_TO_DEBUGGER();
+ return;
+ }
/* need physical address of table to give to PMFW */
clk_mgr->wm_range_table = dm_helpers_allocate_gpu_mem(clk_mgr->base.ctx,
DC_MEM_ALLOC_TYPE_GART, sizeof(WatermarksExternal_t),
&clk_mgr->wm_range_table_addr);
+ if (!clk_mgr->wm_range_table) {
+ BREAK_TO_DEBUGGER();
+ return;
+ }
}
void dcn32_clk_mgr_destroy(struct clk_mgr_internal *clk_mgr)
diff --git a/drivers/gpu/drm/amd/display/dc/resource/dcn30/dcn30_resource.c b/drivers/gpu/drm/amd/display/dc/resource/dcn30/dcn30_resource.c
index d9e98abb3640..fa1305f04341 100644
--- a/drivers/gpu/drm/amd/display/dc/resource/dcn30/dcn30_resource.c
+++ b/drivers/gpu/drm/amd/display/dc/resource/dcn30/dcn30_resource.c
@@ -2050,6 +2050,9 @@ bool dcn30_validate_bandwidth(struct dc *dc,
BW_VAL_TRACE_COUNT();
+ if (!pipes)
+ goto validate_fail;
+
DC_FP_START();
out = dcn30_internal_validate_bw(dc, context, pipes, &pipe_cnt, &vlevel, fast_validate, true);
DC_FP_END();
diff --git a/drivers/gpu/drm/amd/display/dc/resource/dcn31/dcn31_resource.c b/drivers/gpu/drm/amd/display/dc/resource/dcn31/dcn31_resource.c
index ecec3b69bb88..d4c3e2754f51 100644
--- a/drivers/gpu/drm/amd/display/dc/resource/dcn31/dcn31_resource.c
+++ b/drivers/gpu/drm/amd/display/dc/resource/dcn31/dcn31_resource.c
@@ -1310,6 +1310,8 @@ static struct hpo_dp_link_encoder *dcn31_hpo_dp_link_encoder_create(
/* allocate HPO link encoder */
hpo_dp_enc31 = kzalloc(sizeof(struct dcn31_hpo_dp_link_encoder), GFP_KERNEL);
+ if (!hpo_dp_enc31)
+ return NULL; /* out of memory */
hpo_dp_link_encoder31_construct(hpo_dp_enc31, ctx, inst,
&hpo_dp_link_enc_regs[inst],
@@ -1766,6 +1768,9 @@ bool dcn31_validate_bandwidth(struct dc *dc,
BW_VAL_TRACE_COUNT();
+ if (!pipes)
+ goto validate_fail;
+
DC_FP_START();
out = dcn30_internal_validate_bw(dc, context, pipes, &pipe_cnt, &vlevel, fast_validate, true);
DC_FP_END();
diff --git a/drivers/gpu/drm/amd/display/dc/resource/dcn314/dcn314_resource.c b/drivers/gpu/drm/amd/display/dc/resource/dcn314/dcn314_resource.c
index 3bae606ed700..ff50f43e4c00 100644
--- a/drivers/gpu/drm/amd/display/dc/resource/dcn314/dcn314_resource.c
+++ b/drivers/gpu/drm/amd/display/dc/resource/dcn314/dcn314_resource.c
@@ -1367,6 +1367,8 @@ static struct hpo_dp_link_encoder *dcn31_hpo_dp_link_encoder_create(
/* allocate HPO link encoder */
hpo_dp_enc31 = kzalloc(sizeof(struct dcn31_hpo_dp_link_encoder), GFP_KERNEL);
+ if (!hpo_dp_enc31)
+ return NULL; /* out of memory */
hpo_dp_link_encoder31_construct(hpo_dp_enc31, ctx, inst,
&hpo_dp_link_enc_regs[inst],
@@ -1727,6 +1729,9 @@ bool dcn314_validate_bandwidth(struct dc *dc,
BW_VAL_TRACE_COUNT();
+ if (!pipes)
+ goto validate_fail;
+
if (filter_modes_for_single_channel_workaround(dc, context))
goto validate_fail;
diff --git a/drivers/gpu/drm/amd/display/dc/resource/dcn315/dcn315_resource.c b/drivers/gpu/drm/amd/display/dc/resource/dcn315/dcn315_resource.c
index 515ba435f759..4ce0f4bf1d9b 100644
--- a/drivers/gpu/drm/amd/display/dc/resource/dcn315/dcn315_resource.c
+++ b/drivers/gpu/drm/amd/display/dc/resource/dcn315/dcn315_resource.c
@@ -1309,6 +1309,8 @@ static struct hpo_dp_link_encoder *dcn31_hpo_dp_link_encoder_create(
/* allocate HPO link encoder */
hpo_dp_enc31 = kzalloc(sizeof(struct dcn31_hpo_dp_link_encoder), GFP_KERNEL);
+ if (!hpo_dp_enc31)
+ return NULL; /* out of memory */
hpo_dp_link_encoder31_construct(hpo_dp_enc31, ctx, inst,
&hpo_dp_link_enc_regs[inst],
diff --git a/drivers/gpu/drm/amd/display/dc/resource/dcn316/dcn316_resource.c b/drivers/gpu/drm/amd/display/dc/resource/dcn316/dcn316_resource.c
index e808231e8478..5fd52c5fcee4 100644
--- a/drivers/gpu/drm/amd/display/dc/resource/dcn316/dcn316_resource.c
+++ b/drivers/gpu/drm/amd/display/dc/resource/dcn316/dcn316_resource.c
@@ -1305,6 +1305,8 @@ static struct hpo_dp_link_encoder *dcn31_hpo_dp_link_encoder_create(
/* allocate HPO link encoder */
hpo_dp_enc31 = kzalloc(sizeof(struct dcn31_hpo_dp_link_encoder), GFP_KERNEL);
+ if (!hpo_dp_enc31)
+ return NULL; /* out of memory */
hpo_dp_link_encoder31_construct(hpo_dp_enc31, ctx, inst,
&hpo_dp_link_enc_regs[inst],
diff --git a/drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.c b/drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.c
index d17241a882bd..022d320be1d5 100644
--- a/drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.c
+++ b/drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.c
@@ -1305,6 +1305,8 @@ static struct hpo_dp_link_encoder *dcn32_hpo_dp_link_encoder_create(
/* allocate HPO link encoder */
hpo_dp_enc31 = kzalloc(sizeof(struct dcn31_hpo_dp_link_encoder), GFP_KERNEL);
+ if (!hpo_dp_enc31)
+ return NULL; /* out of memory */
#undef REG_STRUCT
#define REG_STRUCT hpo_dp_link_enc_regs
@@ -1752,6 +1754,9 @@ static bool dml1_validate(struct dc *dc, struct dc_state *context, bool fast_val
BW_VAL_TRACE_COUNT();
+ if (!pipes)
+ goto validate_fail;
+
DC_FP_START();
out = dcn32_internal_validate_bw(dc, context, pipes, &pipe_cnt, &vlevel, fast_validate);
DC_FP_END();
diff --git a/drivers/gpu/drm/amd/display/dc/resource/dcn321/dcn321_resource.c b/drivers/gpu/drm/amd/display/dc/resource/dcn321/dcn321_resource.c
index 3816678b044f..e4b360d89b3b 100644
--- a/drivers/gpu/drm/amd/display/dc/resource/dcn321/dcn321_resource.c
+++ b/drivers/gpu/drm/amd/display/dc/resource/dcn321/dcn321_resource.c
@@ -1288,6 +1288,8 @@ static struct hpo_dp_link_encoder *dcn321_hpo_dp_link_encoder_create(
/* allocate HPO link encoder */
hpo_dp_enc31 = kzalloc(sizeof(struct dcn31_hpo_dp_link_encoder), GFP_KERNEL);
+ if (!hpo_dp_enc31)
+ return NULL; /* out of memory */
#undef REG_STRUCT
#define REG_STRUCT hpo_dp_link_enc_regs
diff --git a/drivers/gpu/drm/amd/display/dc/resource/dcn35/dcn35_resource.c b/drivers/gpu/drm/amd/display/dc/resource/dcn35/dcn35_resource.c
index 25ac450944e7..2df8a742516c 100644
--- a/drivers/gpu/drm/amd/display/dc/resource/dcn35/dcn35_resource.c
+++ b/drivers/gpu/drm/amd/display/dc/resource/dcn35/dcn35_resource.c
@@ -1368,6 +1368,8 @@ static struct hpo_dp_link_encoder *dcn31_hpo_dp_link_encoder_create(
/* allocate HPO link encoder */
hpo_dp_enc31 = kzalloc(sizeof(struct dcn31_hpo_dp_link_encoder), GFP_KERNEL);
+ if (!hpo_dp_enc31)
+ return NULL; /* out of memory */
#undef REG_STRUCT
#define REG_STRUCT hpo_dp_link_enc_regs
diff --git a/drivers/gpu/drm/amd/display/dc/resource/dcn351/dcn351_resource.c b/drivers/gpu/drm/amd/display/dc/resource/dcn351/dcn351_resource.c
index ed98bfd9622a..982526c41d55 100644
--- a/drivers/gpu/drm/amd/display/dc/resource/dcn351/dcn351_resource.c
+++ b/drivers/gpu/drm/amd/display/dc/resource/dcn351/dcn351_resource.c
@@ -1348,6 +1348,8 @@ static struct hpo_dp_link_encoder *dcn31_hpo_dp_link_encoder_create(
/* allocate HPO link encoder */
hpo_dp_enc31 = kzalloc(sizeof(struct dcn31_hpo_dp_link_encoder), GFP_KERNEL);
+ if (!hpo_dp_enc31)
+ return NULL; /* out of memory */
#undef REG_STRUCT
#define REG_STRUCT hpo_dp_link_enc_regs
--
2.37.3
^ permalink raw reply related [flat|nested] 17+ messages in thread* [PATCH 04/46] drm/amd/display: Check index msg_id before read or write
2024-04-24 8:31 [PATCH 00/46] DC Patches April 29, 2024 Wayne Lin
` (2 preceding siblings ...)
2024-04-24 8:31 ` [PATCH 03/46] drm/amd/display: Add NULL pointer check for kzalloc Wayne Lin
@ 2024-04-24 8:31 ` Wayne Lin
2024-04-24 8:31 ` [PATCH 05/46] drm/amd/display: Check pipe offset before setting vblank Wayne Lin
` (10 subsequent siblings)
14 siblings, 0 replies; 17+ messages in thread
From: Wayne Lin @ 2024-04-24 8:31 UTC (permalink / raw)
To: amd-gfx
Cc: Harry.Wentland, Sunpeng.Li, Rodrigo.Siqueira, Aurabindo.Pillai,
roman.li, wayne.lin, agustin.gutierrez, chiahsuan.chung,
hersenxs.wu, jerry.zuo, Alex Hung, Rodrigo Siqueira
From: Alex Hung <alex.hung@amd.com>
[WHAT]
msg_id is used as an array index and it cannot be a negative value, and
therefore cannot be equal to MOD_HDCP_MESSAGE_ID_INVALID (-1).
[HOW]
Check whether msg_id is valid before reading and setting.
This fixes 4 OVERRUN issues reported by Coverity.
Reviewed-by: Rodrigo Siqueira <rodrigo.siqueira@amd.com>
Acked-by: Wayne Lin <wayne.lin@amd.com>
Signed-off-by: Alex Hung <alex.hung@amd.com>
---
drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c b/drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c
index f7b5583ee609..8e9caae7c955 100644
--- a/drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c
+++ b/drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c
@@ -156,6 +156,10 @@ static enum mod_hdcp_status read(struct mod_hdcp *hdcp,
uint32_t cur_size = 0;
uint32_t data_offset = 0;
+ if (msg_id == MOD_HDCP_MESSAGE_ID_INVALID) {
+ return MOD_HDCP_STATUS_DDC_FAILURE;
+ }
+
if (is_dp_hdcp(hdcp)) {
while (buf_len > 0) {
cur_size = MIN(buf_len, HDCP_MAX_AUX_TRANSACTION_SIZE);
@@ -215,6 +219,10 @@ static enum mod_hdcp_status write(struct mod_hdcp *hdcp,
uint32_t cur_size = 0;
uint32_t data_offset = 0;
+ if (msg_id == MOD_HDCP_MESSAGE_ID_INVALID) {
+ return MOD_HDCP_STATUS_DDC_FAILURE;
+ }
+
if (is_dp_hdcp(hdcp)) {
while (buf_len > 0) {
cur_size = MIN(buf_len, HDCP_MAX_AUX_TRANSACTION_SIZE);
--
2.37.3
^ permalink raw reply related [flat|nested] 17+ messages in thread* [PATCH 05/46] drm/amd/display: Check pipe offset before setting vblank
2024-04-24 8:31 [PATCH 00/46] DC Patches April 29, 2024 Wayne Lin
` (3 preceding siblings ...)
2024-04-24 8:31 ` [PATCH 04/46] drm/amd/display: Check index msg_id before read or write Wayne Lin
@ 2024-04-24 8:31 ` Wayne Lin
2024-04-24 8:31 ` [PATCH 06/46] drm/amd/display: Skip finding free audio for unknown engine_id Wayne Lin
` (9 subsequent siblings)
14 siblings, 0 replies; 17+ messages in thread
From: Wayne Lin @ 2024-04-24 8:31 UTC (permalink / raw)
To: amd-gfx
Cc: Harry.Wentland, Sunpeng.Li, Rodrigo.Siqueira, Aurabindo.Pillai,
roman.li, wayne.lin, agustin.gutierrez, chiahsuan.chung,
hersenxs.wu, jerry.zuo, Alex Hung, Rodrigo Siqueira
From: Alex Hung <alex.hung@amd.com>
pipe_ctx has a size of MAX_PIPES so checking its index before accessing
the array.
This fixes an OVERRUN issue reported by Coverity.
Reviewed-by: Rodrigo Siqueira <rodrigo.siqueira@amd.com>
Acked-by: Wayne Lin <wayne.lin@amd.com>
Signed-off-by: Alex Hung <alex.hung@amd.com>
---
.../drm/amd/display/dc/irq/dce110/irq_service_dce110.c | 8 ++++++--
1 file changed, 6 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/irq/dce110/irq_service_dce110.c b/drivers/gpu/drm/amd/display/dc/irq/dce110/irq_service_dce110.c
index 1c0d89e675da..bb576a9c5fdb 100644
--- a/drivers/gpu/drm/amd/display/dc/irq/dce110/irq_service_dce110.c
+++ b/drivers/gpu/drm/amd/display/dc/irq/dce110/irq_service_dce110.c
@@ -211,8 +211,12 @@ bool dce110_vblank_set(struct irq_service *irq_service,
info->ext_id);
uint8_t pipe_offset = dal_irq_src - IRQ_TYPE_VBLANK;
- struct timing_generator *tg =
- dc->current_state->res_ctx.pipe_ctx[pipe_offset].stream_res.tg;
+ struct timing_generator *tg;
+
+ if (pipe_offset >= MAX_PIPES)
+ return false;
+
+ tg = dc->current_state->res_ctx.pipe_ctx[pipe_offset].stream_res.tg;
if (enable) {
if (!tg || !tg->funcs->arm_vert_intr(tg, 2)) {
--
2.37.3
^ permalink raw reply related [flat|nested] 17+ messages in thread* [PATCH 06/46] drm/amd/display: Skip finding free audio for unknown engine_id
2024-04-24 8:31 [PATCH 00/46] DC Patches April 29, 2024 Wayne Lin
` (4 preceding siblings ...)
2024-04-24 8:31 ` [PATCH 05/46] drm/amd/display: Check pipe offset before setting vblank Wayne Lin
@ 2024-04-24 8:31 ` Wayne Lin
2024-04-24 8:31 ` [PATCH 07/46] drm/amd/display: Fix overlapping copy within dml_core_mode_programming Wayne Lin
` (8 subsequent siblings)
14 siblings, 0 replies; 17+ messages in thread
From: Wayne Lin @ 2024-04-24 8:31 UTC (permalink / raw)
To: amd-gfx
Cc: Harry.Wentland, Sunpeng.Li, Rodrigo.Siqueira, Aurabindo.Pillai,
roman.li, wayne.lin, agustin.gutierrez, chiahsuan.chung,
hersenxs.wu, jerry.zuo, Alex Hung, Rodrigo Siqueira
From: Alex Hung <alex.hung@amd.com>
[WHY]
ENGINE_ID_UNKNOWN = -1 and can not be used as an array index. Plus, it
also means it is uninitialized and does not need free audio.
[HOW]
Skip and return NULL.
This fixes 2 OVERRUN issues reported by Coverity.
Reviewed-by: Rodrigo Siqueira <rodrigo.siqueira@amd.com>
Acked-by: Wayne Lin <wayne.lin@amd.com>
Signed-off-by: Alex Hung <alex.hung@amd.com>
---
drivers/gpu/drm/amd/display/dc/core/dc_resource.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_resource.c b/drivers/gpu/drm/amd/display/dc/core/dc_resource.c
index fa93d6d6563d..93f05e2080f4 100644
--- a/drivers/gpu/drm/amd/display/dc/core/dc_resource.c
+++ b/drivers/gpu/drm/amd/display/dc/core/dc_resource.c
@@ -3230,6 +3230,9 @@ static struct audio *find_first_free_audio(
{
int i, available_audio_count;
+ if (id == ENGINE_ID_UNKNOWN)
+ return NULL;
+
available_audio_count = pool->audio_count;
for (i = 0; i < available_audio_count; i++) {
--
2.37.3
^ permalink raw reply related [flat|nested] 17+ messages in thread* [PATCH 07/46] drm/amd/display: Fix overlapping copy within dml_core_mode_programming
2024-04-24 8:31 [PATCH 00/46] DC Patches April 29, 2024 Wayne Lin
` (5 preceding siblings ...)
2024-04-24 8:31 ` [PATCH 06/46] drm/amd/display: Skip finding free audio for unknown engine_id Wayne Lin
@ 2024-04-24 8:31 ` Wayne Lin
2024-04-24 8:31 ` [PATCH 08/46] drm/amd/display: Do not return negative stream id for array Wayne Lin
` (7 subsequent siblings)
14 siblings, 0 replies; 17+ messages in thread
From: Wayne Lin @ 2024-04-24 8:31 UTC (permalink / raw)
To: amd-gfx
Cc: Harry.Wentland, Sunpeng.Li, Rodrigo.Siqueira, Aurabindo.Pillai,
roman.li, wayne.lin, agustin.gutierrez, chiahsuan.chung,
hersenxs.wu, jerry.zuo, Rodrigo Siqueira, Alex Hung
From: Hersen Wu <hersenxs.wu@amd.com>
[WHY]
&mode_lib->mp.Watermark and &locals->Watermark are
the same address. memcpy may lead to unexpected behavior.
[HOW]
memmove should be used.
Reviewed-by: Rodrigo Siqueira <rodrigo.siqueira@amd.com>
Acked-by: Wayne Lin <wayne.lin@amd.com>
Reviewed-by: Alex Hung <alex.hung@amd.com>
Signed-off-by: Hersen Wu <hersenxs.wu@amd.com>
---
drivers/gpu/drm/amd/display/dc/dml2/display_mode_core.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dml2/display_mode_core.c b/drivers/gpu/drm/amd/display/dc/dml2/display_mode_core.c
index 6255101737b5..3e919f5c00ca 100644
--- a/drivers/gpu/drm/amd/display/dc/dml2/display_mode_core.c
+++ b/drivers/gpu/drm/amd/display/dc/dml2/display_mode_core.c
@@ -9460,8 +9460,10 @@ void dml_core_mode_programming(struct display_mode_lib_st *mode_lib, const struc
/* Copy the calculated watermarks to mp.Watermark as the getter functions are
* implemented by the DML team to copy the calculated values from the mp.Watermark interface.
+ * &mode_lib->mp.Watermark and &locals->Watermark are the same address, memcpy may lead to
+ * unexpected behavior. memmove should be used.
*/
- memcpy(&mode_lib->mp.Watermark, CalculateWatermarks_params->Watermark, sizeof(struct Watermarks));
+ memmove(&mode_lib->mp.Watermark, CalculateWatermarks_params->Watermark, sizeof(struct Watermarks));
for (k = 0; k < mode_lib->ms.num_active_planes; ++k) {
if (mode_lib->ms.cache_display_cfg.writeback.WritebackEnable[k] == true) {
--
2.37.3
^ permalink raw reply related [flat|nested] 17+ messages in thread* [PATCH 08/46] drm/amd/display: Do not return negative stream id for array
2024-04-24 8:31 [PATCH 00/46] DC Patches April 29, 2024 Wayne Lin
` (6 preceding siblings ...)
2024-04-24 8:31 ` [PATCH 07/46] drm/amd/display: Fix overlapping copy within dml_core_mode_programming Wayne Lin
@ 2024-04-24 8:31 ` Wayne Lin
2024-04-24 8:31 ` [PATCH 09/46] drm/amd/display: ASSERT when failing to find index by plane/stream id Wayne Lin
` (6 subsequent siblings)
14 siblings, 0 replies; 17+ messages in thread
From: Wayne Lin @ 2024-04-24 8:31 UTC (permalink / raw)
To: amd-gfx
Cc: Harry.Wentland, Sunpeng.Li, Rodrigo.Siqueira, Aurabindo.Pillai,
roman.li, wayne.lin, agustin.gutierrez, chiahsuan.chung,
hersenxs.wu, jerry.zuo, Alex Hung, Rodrigo Siqueira
From: Alex Hung <alex.hung@amd.com>
[WHY]
resource_stream_to_stream_idx returns an array index and it return -1
when not found; however, -1 is not a valid array index number.
[HOW]
When this happens, call ASSERT(), and return a zero instead.
This fixes an OVERRUN and an NEGATIVE_RETURNS issues reported by Coverity.
Reviewed-by: Rodrigo Siqueira <rodrigo.siqueira@amd.com>
Acked-by: Wayne Lin <wayne.lin@amd.com>
Signed-off-by: Alex Hung <alex.hung@amd.com>
---
drivers/gpu/drm/amd/display/dc/core/dc_resource.c | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_resource.c b/drivers/gpu/drm/amd/display/dc/core/dc_resource.c
index 93f05e2080f4..25c64fdcfa44 100644
--- a/drivers/gpu/drm/amd/display/dc/core/dc_resource.c
+++ b/drivers/gpu/drm/amd/display/dc/core/dc_resource.c
@@ -2282,6 +2282,13 @@ static int resource_stream_to_stream_idx(struct dc_state *state,
stream_idx = i;
break;
}
+
+ /* never return negative array index */
+ if (stream_idx == -1) {
+ ASSERT(0);
+ return 0;
+ }
+
return stream_idx;
}
--
2.37.3
^ permalink raw reply related [flat|nested] 17+ messages in thread* [PATCH 09/46] drm/amd/display: ASSERT when failing to find index by plane/stream id
2024-04-24 8:31 [PATCH 00/46] DC Patches April 29, 2024 Wayne Lin
` (7 preceding siblings ...)
2024-04-24 8:31 ` [PATCH 08/46] drm/amd/display: Do not return negative stream id for array Wayne Lin
@ 2024-04-24 8:31 ` Wayne Lin
2024-04-24 8:31 ` [PATCH 10/46] drm/amd/display: Remove unnecessary files Wayne Lin
` (5 subsequent siblings)
14 siblings, 0 replies; 17+ messages in thread
From: Wayne Lin @ 2024-04-24 8:31 UTC (permalink / raw)
To: amd-gfx
Cc: Harry.Wentland, Sunpeng.Li, Rodrigo.Siqueira, Aurabindo.Pillai,
roman.li, wayne.lin, agustin.gutierrez, chiahsuan.chung,
hersenxs.wu, jerry.zuo, Alex Hung, Rodrigo Siqueira
From: Alex Hung <alex.hung@amd.com>
[WHY]
find_disp_cfg_idx_by_plane_id and find_disp_cfg_idx_by_stream_id returns
an array index and they return -1 when not found; however, -1 is not a
valid index number.
[HOW]
When this happens, call ASSERT(), and return a positive number (which is
fewer than callers' array size) instead.
This fixes 4 OVERRUN and 2 NEGATIVE_RETURNS issues reported by Coverity.
Reviewed-by: Rodrigo Siqueira <rodrigo.siqueira@amd.com>
Acked-by: Wayne Lin <wayne.lin@amd.com>
Signed-off-by: Alex Hung <alex.hung@amd.com>
---
drivers/gpu/drm/amd/display/dc/dml2/dml2_dc_resource_mgmt.c | 6 ++++--
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dml2/dml2_dc_resource_mgmt.c b/drivers/gpu/drm/amd/display/dc/dml2/dml2_dc_resource_mgmt.c
index b82d56ed1ef4..a2ced0bc772c 100644
--- a/drivers/gpu/drm/amd/display/dc/dml2/dml2_dc_resource_mgmt.c
+++ b/drivers/gpu/drm/amd/display/dc/dml2/dml2_dc_resource_mgmt.c
@@ -88,7 +88,8 @@ static int find_disp_cfg_idx_by_plane_id(struct dml2_dml_to_dc_pipe_mapping *map
return i;
}
- return -1;
+ ASSERT(false);
+ return __DML2_WRAPPER_MAX_STREAMS_PLANES__;
}
static int find_disp_cfg_idx_by_stream_id(struct dml2_dml_to_dc_pipe_mapping *mapping, unsigned int stream_id)
@@ -100,7 +101,8 @@ static int find_disp_cfg_idx_by_stream_id(struct dml2_dml_to_dc_pipe_mapping *ma
return i;
}
- return -1;
+ ASSERT(false);
+ return __DML2_WRAPPER_MAX_STREAMS_PLANES__;
}
// The master pipe of a stream is defined as the top pipe in odm slice 0
--
2.37.3
^ permalink raw reply related [flat|nested] 17+ messages in thread* [PATCH 10/46] drm/amd/display: Remove unnecessary files
2024-04-24 8:31 [PATCH 00/46] DC Patches April 29, 2024 Wayne Lin
` (8 preceding siblings ...)
2024-04-24 8:31 ` [PATCH 09/46] drm/amd/display: ASSERT when failing to find index by plane/stream id Wayne Lin
@ 2024-04-24 8:31 ` Wayne Lin
2024-04-24 8:31 ` [PATCH 11/46] drm/amd/display: Improve registers write Wayne Lin
` (4 subsequent siblings)
14 siblings, 0 replies; 17+ messages in thread
From: Wayne Lin @ 2024-04-24 8:31 UTC (permalink / raw)
To: amd-gfx
Cc: Harry.Wentland, Sunpeng.Li, Rodrigo.Siqueira, Aurabindo.Pillai,
roman.li, wayne.lin, agustin.gutierrez, chiahsuan.chung,
hersenxs.wu, jerry.zuo, Wayne Lin
[Why & How]
We accidentally upstream unnecessary files. Remove them.
Reviewed-by: Tom Chung <chiahsuan.chung@amd.com>
Signed-off-by: Wayne Lin <Wayne.Lin@amd.com>
---
drivers/gpu/drm/amd/display/dc/dpp/dcn10/CMakeLists.txt | 6 ------
drivers/gpu/drm/amd/display/dc/dpp/dcn20/CMakeLists.txt | 5 -----
drivers/gpu/drm/amd/display/dc/dpp/dcn201/CMakeLists.txt | 4 ----
drivers/gpu/drm/amd/display/dc/dpp/dcn30/CMakeLists.txt | 5 -----
drivers/gpu/drm/amd/display/dc/dpp/dcn32/CMakeLists.txt | 4 ----
drivers/gpu/drm/amd/display/dc/dpp/dcn35/CMakeLists.txt | 4 ----
.../gpu/drm/amd/display/dc/resource/dce80/CMakeLists.txt | 4 ----
7 files changed, 32 deletions(-)
delete mode 100644 drivers/gpu/drm/amd/display/dc/dpp/dcn10/CMakeLists.txt
delete mode 100644 drivers/gpu/drm/amd/display/dc/dpp/dcn20/CMakeLists.txt
delete mode 100644 drivers/gpu/drm/amd/display/dc/dpp/dcn201/CMakeLists.txt
delete mode 100644 drivers/gpu/drm/amd/display/dc/dpp/dcn30/CMakeLists.txt
delete mode 100644 drivers/gpu/drm/amd/display/dc/dpp/dcn32/CMakeLists.txt
delete mode 100644 drivers/gpu/drm/amd/display/dc/dpp/dcn35/CMakeLists.txt
delete mode 100644 drivers/gpu/drm/amd/display/dc/resource/dce80/CMakeLists.txt
diff --git a/drivers/gpu/drm/amd/display/dc/dpp/dcn10/CMakeLists.txt b/drivers/gpu/drm/amd/display/dc/dpp/dcn10/CMakeLists.txt
deleted file mode 100644
index 1318c6fba3e7..000000000000
--- a/drivers/gpu/drm/amd/display/dc/dpp/dcn10/CMakeLists.txt
+++ /dev/null
@@ -1,6 +0,0 @@
-dal3_subdirectory_sources(
- dcn10_dpp.c
- dcn10_dpp_cm.c
- dcn10_dpp_dscl.c
- dcn10_dpp.h
-)
diff --git a/drivers/gpu/drm/amd/display/dc/dpp/dcn20/CMakeLists.txt b/drivers/gpu/drm/amd/display/dc/dpp/dcn20/CMakeLists.txt
deleted file mode 100644
index 9c2d7096348e..000000000000
--- a/drivers/gpu/drm/amd/display/dc/dpp/dcn20/CMakeLists.txt
+++ /dev/null
@@ -1,5 +0,0 @@
-dal3_subdirectory_sources(
- dcn20_dpp.c
- dcn20_dpp_cm.c
- dcn20_dpp.h
-)
diff --git a/drivers/gpu/drm/amd/display/dc/dpp/dcn201/CMakeLists.txt b/drivers/gpu/drm/amd/display/dc/dpp/dcn201/CMakeLists.txt
deleted file mode 100644
index 7711cd3c47a7..000000000000
--- a/drivers/gpu/drm/amd/display/dc/dpp/dcn201/CMakeLists.txt
+++ /dev/null
@@ -1,4 +0,0 @@
-dal3_subdirectory_sources(
- dcn201_dpp.c
- dcn201_dpp.h
-)
diff --git a/drivers/gpu/drm/amd/display/dc/dpp/dcn30/CMakeLists.txt b/drivers/gpu/drm/amd/display/dc/dpp/dcn30/CMakeLists.txt
deleted file mode 100644
index 0faee2a1e32b..000000000000
--- a/drivers/gpu/drm/amd/display/dc/dpp/dcn30/CMakeLists.txt
+++ /dev/null
@@ -1,5 +0,0 @@
-dal3_subdirectory_sources(
- dcn30_dpp.c
- dcn30_dpp_cm.c
- dcn30_dpp.h
-)
diff --git a/drivers/gpu/drm/amd/display/dc/dpp/dcn32/CMakeLists.txt b/drivers/gpu/drm/amd/display/dc/dpp/dcn32/CMakeLists.txt
deleted file mode 100644
index 7743edc4599f..000000000000
--- a/drivers/gpu/drm/amd/display/dc/dpp/dcn32/CMakeLists.txt
+++ /dev/null
@@ -1,4 +0,0 @@
-dal3_subdirectory_sources(
- dcn32_dpp.c
- dcn32_dpp.h
-)
diff --git a/drivers/gpu/drm/amd/display/dc/dpp/dcn35/CMakeLists.txt b/drivers/gpu/drm/amd/display/dc/dpp/dcn35/CMakeLists.txt
deleted file mode 100644
index 91df5db26435..000000000000
--- a/drivers/gpu/drm/amd/display/dc/dpp/dcn35/CMakeLists.txt
+++ /dev/null
@@ -1,4 +0,0 @@
-dal3_subdirectory_sources(
- dcn35_dpp.c
- dcn35_dpp.h
-)
diff --git a/drivers/gpu/drm/amd/display/dc/resource/dce80/CMakeLists.txt b/drivers/gpu/drm/amd/display/dc/resource/dce80/CMakeLists.txt
deleted file mode 100644
index 19dd73bc9ab0..000000000000
--- a/drivers/gpu/drm/amd/display/dc/resource/dce80/CMakeLists.txt
+++ /dev/null
@@ -1,4 +0,0 @@
-dal3_subdirectory_sources(
- dce80_resource.c
- dce80_resource.h
- )
\ No newline at end of file
--
2.37.3
^ permalink raw reply related [flat|nested] 17+ messages in thread* [PATCH 11/46] drm/amd/display: Improve registers write
2024-04-24 8:31 [PATCH 00/46] DC Patches April 29, 2024 Wayne Lin
` (9 preceding siblings ...)
2024-04-24 8:31 ` [PATCH 10/46] drm/amd/display: Remove unnecessary files Wayne Lin
@ 2024-04-24 8:31 ` Wayne Lin
2024-04-24 8:31 ` [PATCH 12/46] drm/amd/display: Add missing SMU version Wayne Lin
` (3 subsequent siblings)
14 siblings, 0 replies; 17+ messages in thread
From: Wayne Lin @ 2024-04-24 8:31 UTC (permalink / raw)
To: amd-gfx
Cc: Harry.Wentland, Sunpeng.Li, Rodrigo.Siqueira, Aurabindo.Pillai,
roman.li, wayne.lin, agustin.gutierrez, chiahsuan.chung,
hersenxs.wu, jerry.zuo
From: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Add REG_SEQ_SUBMIT and REG_SEQ_WAIT_DONE to optimize the burst write for
the regama lut.
Acked-by: Wayne Lin <wayne.lin@amd.com>
Signed-off-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
---
drivers/gpu/drm/amd/display/dc/dpp/dcn10/dcn10_dpp_cm.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dpp/dcn10/dcn10_dpp_cm.c b/drivers/gpu/drm/amd/display/dc/dpp/dcn10/dcn10_dpp_cm.c
index 20481b144609..2d5d64276cb0 100644
--- a/drivers/gpu/drm/amd/display/dc/dpp/dcn10/dcn10_dpp_cm.c
+++ b/drivers/gpu/drm/amd/display/dc/dpp/dcn10/dcn10_dpp_cm.c
@@ -410,9 +410,10 @@ void dpp1_cm_program_regamma_lut(struct dpp *dpp_base,
REG_SET(CM_RGAM_LUT_DATA, 0, CM_RGAM_LUT_DATA, rgb[i].delta_red_reg);
REG_SET(CM_RGAM_LUT_DATA, 0, CM_RGAM_LUT_DATA, rgb[i].delta_green_reg);
REG_SET(CM_RGAM_LUT_DATA, 0, CM_RGAM_LUT_DATA, rgb[i].delta_blue_reg);
-
}
+ REG_SEQ_SUBMIT();
+ REG_SEQ_WAIT_DONE();
}
void dpp1_cm_configure_regamma_lut(
--
2.37.3
^ permalink raw reply related [flat|nested] 17+ messages in thread* [PATCH 12/46] drm/amd/display: Add missing SMU version
2024-04-24 8:31 [PATCH 00/46] DC Patches April 29, 2024 Wayne Lin
` (10 preceding siblings ...)
2024-04-24 8:31 ` [PATCH 11/46] drm/amd/display: Improve registers write Wayne Lin
@ 2024-04-24 8:31 ` Wayne Lin
2024-04-24 8:31 ` [PATCH 13/46] drm/amd/display: Adjust codestyle for dcn31 and hdcp_msg Wayne Lin
` (2 subsequent siblings)
14 siblings, 0 replies; 17+ messages in thread
From: Wayne Lin @ 2024-04-24 8:31 UTC (permalink / raw)
To: amd-gfx
Cc: Harry.Wentland, Sunpeng.Li, Rodrigo.Siqueira, Aurabindo.Pillai,
roman.li, wayne.lin, agustin.gutierrez, chiahsuan.chung,
hersenxs.wu, jerry.zuo
From: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
This commit add PP_SMU_VER_VG to the pp_smu_ver list.
Acked-by: Wayne Lin <wayne.lin@amd.com>
Signed-off-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
---
drivers/gpu/drm/amd/display/dc/dm_pp_smu.h | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dm_pp_smu.h b/drivers/gpu/drm/amd/display/dc/dm_pp_smu.h
index bd7ba0a25198..b0e17a594ec3 100644
--- a/drivers/gpu/drm/amd/display/dc/dm_pp_smu.h
+++ b/drivers/gpu/drm/amd/display/dc/dm_pp_smu.h
@@ -40,8 +40,9 @@ enum pp_smu_ver {
PP_SMU_UNSUPPORTED,
PP_SMU_VER_RV,
PP_SMU_VER_NV,
- PP_SMU_VER_RN,
+ PP_SMU_VER_RN,
+ PP_SMU_VER_VG,
PP_SMU_VER_MAX
};
--
2.37.3
^ permalink raw reply related [flat|nested] 17+ messages in thread* [PATCH 13/46] drm/amd/display: Adjust codestyle for dcn31 and hdcp_msg
2024-04-24 8:31 [PATCH 00/46] DC Patches April 29, 2024 Wayne Lin
` (11 preceding siblings ...)
2024-04-24 8:31 ` [PATCH 12/46] drm/amd/display: Add missing SMU version Wayne Lin
@ 2024-04-24 8:31 ` Wayne Lin
2024-04-24 8:31 ` [PATCH 14/46] drm/amd/display: Add VCO speed parameter for DCN31 FPU Wayne Lin
2024-04-24 8:31 ` [PATCH 15/46] drm/amd/display: Adjust functions prefix for some of the dcn301 fpu functions Wayne Lin
14 siblings, 0 replies; 17+ messages in thread
From: Wayne Lin @ 2024-04-24 8:31 UTC (permalink / raw)
To: amd-gfx
Cc: Harry.Wentland, Sunpeng.Li, Rodrigo.Siqueira, Aurabindo.Pillai,
roman.li, wayne.lin, agustin.gutierrez, chiahsuan.chung,
hersenxs.wu, jerry.zuo
From: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
This commit just update the code style in two if conditions and in an
static array.
Acked-by: Wayne Lin <wayne.lin@amd.com>
Signed-off-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
---
drivers/gpu/drm/amd/display/dc/dml/dcn31/dcn31_fpu.c | 8 ++++----
drivers/gpu/drm/amd/display/dc/hdcp/hdcp_msg.c | 2 +-
2 files changed, 5 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn31/dcn31_fpu.c b/drivers/gpu/drm/amd/display/dc/dml/dcn31/dcn31_fpu.c
index 59a902313200..4407640c5f87 100644
--- a/drivers/gpu/drm/amd/display/dc/dml/dcn31/dcn31_fpu.c
+++ b/drivers/gpu/drm/amd/display/dc/dml/dcn31/dcn31_fpu.c
@@ -645,9 +645,9 @@ void dcn31_update_bw_bounding_box(struct dc *dc, struct clk_bw_params *bw_params
dcn3_1_soc.clock_limits[closest_clk_lvl].phyclk_d18_mhz;
s[i].phyclk_mhz = dcn3_1_soc.clock_limits[closest_clk_lvl].phyclk_mhz;
}
- if (clk_table->num_entries) {
+
+ if (clk_table->num_entries)
dcn3_1_soc.num_states = clk_table->num_entries;
- }
memcpy(dcn3_1_soc.clock_limits, s, sizeof(dcn3_1_soc.clock_limits));
@@ -797,9 +797,9 @@ void dcn316_update_bw_bounding_box(struct dc *dc, struct clk_bw_params *bw_param
dcn3_16_soc.clock_limits[closest_clk_lvl].phyclk_d18_mhz;
s[i].phyclk_mhz = dcn3_16_soc.clock_limits[closest_clk_lvl].phyclk_mhz;
}
- if (clk_table->num_entries) {
+
+ if (clk_table->num_entries)
dcn3_16_soc.num_states = clk_table->num_entries;
- }
memcpy(dcn3_16_soc.clock_limits, s, sizeof(dcn3_16_soc.clock_limits));
diff --git a/drivers/gpu/drm/amd/display/dc/hdcp/hdcp_msg.c b/drivers/gpu/drm/amd/display/dc/hdcp/hdcp_msg.c
index 99e17c164ce7..076a829c2378 100644
--- a/drivers/gpu/drm/amd/display/dc/hdcp/hdcp_msg.c
+++ b/drivers/gpu/drm/amd/display/dc/hdcp/hdcp_msg.c
@@ -70,7 +70,7 @@ static const bool hdcp_cmd_is_read[HDCP_MESSAGE_ID_MAX] = {
[HDCP_MESSAGE_ID_WRITE_REPEATER_AUTH_STREAM_MANAGE] = false,
[HDCP_MESSAGE_ID_READ_REPEATER_AUTH_STREAM_READY] = true,
[HDCP_MESSAGE_ID_READ_RXSTATUS] = true,
- [HDCP_MESSAGE_ID_WRITE_CONTENT_STREAM_TYPE] = false
+ [HDCP_MESSAGE_ID_WRITE_CONTENT_STREAM_TYPE] = false,
};
static const uint8_t hdcp_i2c_offsets[HDCP_MESSAGE_ID_MAX] = {
--
2.37.3
^ permalink raw reply related [flat|nested] 17+ messages in thread* [PATCH 14/46] drm/amd/display: Add VCO speed parameter for DCN31 FPU
2024-04-24 8:31 [PATCH 00/46] DC Patches April 29, 2024 Wayne Lin
` (12 preceding siblings ...)
2024-04-24 8:31 ` [PATCH 13/46] drm/amd/display: Adjust codestyle for dcn31 and hdcp_msg Wayne Lin
@ 2024-04-24 8:31 ` Wayne Lin
2024-04-24 8:31 ` [PATCH 15/46] drm/amd/display: Adjust functions prefix for some of the dcn301 fpu functions Wayne Lin
14 siblings, 0 replies; 17+ messages in thread
From: Wayne Lin @ 2024-04-24 8:31 UTC (permalink / raw)
To: amd-gfx
Cc: Harry.Wentland, Sunpeng.Li, Rodrigo.Siqueira, Aurabindo.Pillai,
roman.li, wayne.lin, agustin.gutierrez, chiahsuan.chung,
hersenxs.wu, jerry.zuo
From: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Add VCO speed parameters in the bounding box array.
Acked-by: Wayne Lin <wayne.lin@amd.com>
Signed-off-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
---
drivers/gpu/drm/amd/display/dc/dml/dcn31/dcn31_fpu.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn31/dcn31_fpu.c b/drivers/gpu/drm/amd/display/dc/dml/dcn31/dcn31_fpu.c
index 4407640c5f87..bfc042209007 100644
--- a/drivers/gpu/drm/amd/display/dc/dml/dcn31/dcn31_fpu.c
+++ b/drivers/gpu/drm/amd/display/dc/dml/dcn31/dcn31_fpu.c
@@ -291,6 +291,7 @@ static struct _vcs_dpi_soc_bounding_box_st dcn3_15_soc = {
.do_urgent_latency_adjustment = false,
.urgent_latency_adjustment_fabric_clock_component_us = 0,
.urgent_latency_adjustment_fabric_clock_reference_mhz = 0,
+ .dispclk_dppclk_vco_speed_mhz = 2400.0,
.num_chans = 4,
.dummy_pstate_latency_us = 10.0
};
@@ -438,6 +439,7 @@ static struct _vcs_dpi_soc_bounding_box_st dcn3_16_soc = {
.do_urgent_latency_adjustment = false,
.urgent_latency_adjustment_fabric_clock_component_us = 0,
.urgent_latency_adjustment_fabric_clock_reference_mhz = 0,
+ .dispclk_dppclk_vco_speed_mhz = 2500.0,
};
void dcn31_zero_pipe_dcc_fraction(display_e2e_pipe_params_st *pipes,
--
2.37.3
^ permalink raw reply related [flat|nested] 17+ messages in thread* [PATCH 15/46] drm/amd/display: Adjust functions prefix for some of the dcn301 fpu functions
2024-04-24 8:31 [PATCH 00/46] DC Patches April 29, 2024 Wayne Lin
` (13 preceding siblings ...)
2024-04-24 8:31 ` [PATCH 14/46] drm/amd/display: Add VCO speed parameter for DCN31 FPU Wayne Lin
@ 2024-04-24 8:31 ` Wayne Lin
14 siblings, 0 replies; 17+ messages in thread
From: Wayne Lin @ 2024-04-24 8:31 UTC (permalink / raw)
To: amd-gfx
Cc: Harry.Wentland, Sunpeng.Li, Rodrigo.Siqueira, Aurabindo.Pillai,
roman.li, wayne.lin, agustin.gutierrez, chiahsuan.chung,
hersenxs.wu, jerry.zuo
From: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Add dcn301_fpu prefix to some of the FPU function with the required
adjustments.
Acked-by: Wayne Lin <wayne.lin@amd.com>
Signed-off-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
---
.../amd/display/dc/dml/dcn301/dcn301_fpu.c | 4 ++--
.../amd/display/dc/dml/dcn301/dcn301_fpu.h | 7 +++----
.../dc/resource/dcn301/dcn301_resource.c | 19 +++++++++++++------
3 files changed, 18 insertions(+), 12 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn301/dcn301_fpu.c b/drivers/gpu/drm/amd/display/dc/dml/dcn301/dcn301_fpu.c
index 6ce90678b33c..0c0b2d67c9cd 100644
--- a/drivers/gpu/drm/amd/display/dc/dml/dcn301/dcn301_fpu.c
+++ b/drivers/gpu/drm/amd/display/dc/dml/dcn301/dcn301_fpu.c
@@ -320,7 +320,7 @@ static void calculate_wm_set_for_vlevel(int vlevel,
}
-void dcn301_update_bw_bounding_box(struct dc *dc, struct clk_bw_params *bw_params)
+void dcn301_fpu_update_bw_bounding_box(struct dc *dc, struct clk_bw_params *bw_params)
{
struct _vcs_dpi_voltage_scaling_st *s = dc->scratch.update_bw_bounding_box.clock_limits;
struct dcn301_resource_pool *pool = TO_DCN301_RES_POOL(dc->res_pool);
@@ -409,7 +409,7 @@ void dcn301_fpu_init_soc_bounding_box(struct bp_soc_bb_info bb_info)
dcn3_01_soc.sr_exit_time_us = bb_info.dram_sr_exit_latency_100ns * 10;
}
-void dcn301_calculate_wm_and_dlg_fp(struct dc *dc,
+void dcn301_fpu_calculate_wm_and_dlg(struct dc *dc,
struct dc_state *context,
display_e2e_pipe_params_st *pipes,
int pipe_cnt,
diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn301/dcn301_fpu.h b/drivers/gpu/drm/amd/display/dc/dml/dcn301/dcn301_fpu.h
index 774b0fdfc80b..3e103e23dc6f 100644
--- a/drivers/gpu/drm/amd/display/dc/dml/dcn301/dcn301_fpu.h
+++ b/drivers/gpu/drm/amd/display/dc/dml/dcn301/dcn301_fpu.h
@@ -26,15 +26,14 @@
#ifndef __DCN301_FPU_H__
#define __DCN301_FPU_H__
-void dcn301_update_bw_bounding_box(struct dc *dc, struct clk_bw_params *bw_params);
+void dcn301_fpu_init_soc_bounding_box(struct bp_soc_bb_info bb_info);
+void dcn301_fpu_update_bw_bounding_box(struct dc *dc, struct clk_bw_params *bw_params);
void dcn301_fpu_set_wm_ranges(int i,
struct pp_smu_wm_range_sets *ranges,
struct _vcs_dpi_soc_bounding_box_st *loaded_bb);
-void dcn301_fpu_init_soc_bounding_box(struct bp_soc_bb_info bb_info);
-
-void dcn301_calculate_wm_and_dlg_fp(struct dc *dc,
+void dcn301_fpu_calculate_wm_and_dlg(struct dc *dc,
struct dc_state *context,
display_e2e_pipe_params_st *pipes,
int pipe_cnt,
diff --git a/drivers/gpu/drm/amd/display/dc/resource/dcn301/dcn301_resource.c b/drivers/gpu/drm/amd/display/dc/resource/dcn301/dcn301_resource.c
index 7538b548c572..346cec70de96 100644
--- a/drivers/gpu/drm/amd/display/dc/resource/dcn301/dcn301_resource.c
+++ b/drivers/gpu/drm/amd/display/dc/resource/dcn301/dcn301_resource.c
@@ -1363,14 +1363,21 @@ static void set_wm_ranges(
pp_smu->nv_funcs.set_wm_ranges(&pp_smu->nv_funcs.pp_smu, &ranges);
}
-static void dcn301_calculate_wm_and_dlg(
- struct dc *dc, struct dc_state *context,
- display_e2e_pipe_params_st *pipes,
- int pipe_cnt,
- int vlevel)
+static void dcn301_update_bw_bounding_box(struct dc *dc, struct clk_bw_params *bw_params)
{
DC_FP_START();
- dcn301_calculate_wm_and_dlg_fp(dc, context, pipes, pipe_cnt, vlevel);
+ dcn301_fpu_update_bw_bounding_box(dc, bw_params);
+ DC_FP_END();
+}
+
+static void dcn301_calculate_wm_and_dlg(struct dc *dc,
+ struct dc_state *context,
+ display_e2e_pipe_params_st *pipes,
+ int pipe_cnt,
+ int vlevel_req)
+{
+ DC_FP_START();
+ dcn301_fpu_calculate_wm_and_dlg(dc, context, pipes, pipe_cnt, vlevel_req);
DC_FP_END();
}
--
2.37.3
^ permalink raw reply related [flat|nested] 17+ messages in thread