Re: [PATCH 06/17] dt-bindings: net: mscc-miim: Add resets property

From: Herve Codina <herve.codina@bootlin.com>
To: Andrew Lunn <andrew@lunn.ch>
Cc: Thomas Gleixner <tglx@linutronix.de>,
	Rob Herring <robh@kernel.org>,
	Krzysztof Kozlowski <krzk+dt@kernel.org>,
	Conor Dooley <conor+dt@kernel.org>,
	"David S. Miller" <davem@davemloft.net>,
	Eric Dumazet <edumazet@google.com>,
	Jakub Kicinski <kuba@kernel.org>, Paolo Abeni <pabeni@redhat.com>,
	Lee Jones <lee@kernel.org>, Arnd Bergmann <arnd@arndb.de>,
	Horatiu Vultur <horatiu.vultur@microchip.com>,
	UNGLinuxDriver@microchip.com,
	Heiner Kallweit <hkallweit1@gmail.com>,
	Russell King <linux@armlinux.org.uk>,
	Saravana Kannan <saravanak@google.com>,
	Bjorn Helgaas <bhelgaas@google.com>,
	Philipp Zabel <p.zabel@pengutronix.de>,
	Lars Povlsen <lars.povlsen@microchip.com>,
	Steen Hegelund <Steen.Hegelund@microchip.com>,
	Daniel Machon <daniel.machon@microchip.com>,
	Alexandre Belloni <alexandre.belloni@bootlin.com>,
	linux-kernel@vger.kernel.org, devicetree@vger.kernel.org,
	netdev@vger.kernel.org, linux-pci@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	Allan Nielsen <allan.nielsen@microchip.com>,
	Luca Ceresoli <luca.ceresoli@bootlin.com>,
	Thomas Petazzoni <thomas.petazzoni@bootlin.com>
Subject: Re: [PATCH 06/17] dt-bindings: net: mscc-miim: Add resets property
Date: Tue, 30 Apr 2024 17:40:23 +0200	[thread overview]
Message-ID: <20240430174023.4d15a8a4@bootlin.com> (raw)
In-Reply-To: <5d899584-38ed-4eee-9ba5-befdedbc5734@lunn.ch>

Hi Andrew,

On Tue, 30 Apr 2024 15:55:58 +0200
Andrew Lunn <andrew@lunn.ch> wrote:

> On Tue, Apr 30, 2024 at 10:37:15AM +0200, Herve Codina wrote:
> > Add the (optional) resets property.
> > The mscc-miim device is impacted by the switch reset especially when the
> > mscc-miim device is used as part of the LAN966x PCI device.
> > 
> > Signed-off-by: Herve Codina <herve.codina@bootlin.com>
> > ---
> >  Documentation/devicetree/bindings/net/mscc,miim.yaml | 8 ++++++++
> >  1 file changed, 8 insertions(+)
> > 
> > diff --git a/Documentation/devicetree/bindings/net/mscc,miim.yaml b/Documentation/devicetree/bindings/net/mscc,miim.yaml
> > index 5b292e7c9e46..a8c92cec85a6 100644
> > --- a/Documentation/devicetree/bindings/net/mscc,miim.yaml
> > +++ b/Documentation/devicetree/bindings/net/mscc,miim.yaml
> > @@ -38,6 +38,14 @@ properties:
> >  
> >    clock-frequency: true
> >  
> > +  resets:
> > +    items:
> > +      - description: Reset controller used for switch core reset (soft reset)  
> 
> A follow up to the comment on the next patch. I think it should be
> made clear in the patch and the binding, the aim is to reset the MDIO
> bus master, not the switch. It just happens that the MDIO bus master
> is within the domain of the switch core, and so the switch core reset
> also resets the MDIO bus master.

Exactly.

> 
> Architecturally, this is important. I would not expect the MDIO driver
> to be resetting the switch, the switch driver should be doing
> that. But we have seen some odd Qualcomm patches where the MDIO driver
> has been doing things outside the scope of MDIO, playing with resets
> and clocks which are not directly related to the MDIO bus master. I
> want to avoid any confusion here, especially when Qualcomm tries
> again, and maybe points at this code.
> 

Sure.

We have the same construction with the pinctrl driver used in the LAN966x
  Documentation/devicetree/bindings/pinctrl/mscc,ocelot-pinctrl.yaml

The reset name is 'switch' in the pinctrl binding.
I can use the same description here as the one present in the pinctrl binding:
  description: Optional shared switch reset.
and keep 'switch' as reset name here (consistent with pinctrl reset name).

What do you think about that ?

Best regards,
Hervé

-- 
Hervé Codina, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com