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From: Conor Dooley <conor@kernel.org>
To: Conor Dooley <conor.dooley@microchip.com>
Cc: "Andy Chiu" <andy.chiu@sifive.com>,
	"Eric Biggers" <ebiggers@kernel.org>,
	"Paul Walmsley" <paul.walmsley@sifive.com>,
	"Palmer Dabbelt" <palmer@dabbelt.com>,
	"Albert Ou" <aou@eecs.berkeley.edu>,
	"Heiko Stuebner" <heiko@sntech.de>, "Guo Ren" <guoren@kernel.org>,
	"Rob Herring" <robh@kernel.org>,
	"Krzysztof Kozlowski" <krzysztof.kozlowski+dt@linaro.org>,
	"Jonathan Corbet" <corbet@lwn.net>,
	"Evan Green" <evan@rivosinc.com>,
	"Clément Léger" <cleger@rivosinc.com>,
	"Shuah Khan" <shuah@kernel.org>,
	linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org,
	"Palmer Dabbelt" <palmer@rivosinc.com>,
	"Vincent Chen" <vincent.chen@sifive.com>,
	"Greentime Hu" <greentime.hu@sifive.com>,
	devicetree@vger.kernel.org, linux-doc@vger.kernel.org,
	linux-kselftest@vger.kernel.org,
	"Joel Granados" <j.granados@samsung.com>,
	"Jerry Shih" <jerry.shih@sifive.com>,
	"Charlie Jenkins" <charlie@rivosinc.com>
Subject: Re: [PATCH v4 7/9] riscv: vector: adjust minimum Vector requirement to ZVE32X
Date: Thu, 9 May 2024 23:22:42 +0100	[thread overview]
Message-ID: <20240509-irritant-morphing-a25428a4f750@spud> (raw)
In-Reply-To: <20240509-habitable-unrefined-02322f228d5a@wendy>

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On Thu, May 09, 2024 at 09:25:25AM +0100, Conor Dooley wrote:
> On Thu, May 09, 2024 at 08:48:09AM +0100, Conor Dooley wrote:
> > On Thu, May 09, 2024 at 02:56:30PM +0800, Andy Chiu wrote:
> > > Hi Conor,
> > > 
> > > Should we check if "v" presents for vector crypto extensions in
> > > riscv_isa_extension_check()? We are not checking this for now. So a
> > > kernel compiled with RISCV_ISA_V still has a problem if its isa-string
> > > includes any of vector crypto ("zvbb, zvkg, etc") but not "v".
> > 
> > 
> > Yeah, one of the things I took away from this discussion is that we need
> > to improve the implementation of both the methods we have at the moment
> > for drivers etc to check if extensions are present and usable.
> > In general, I don't think checks like that are "safe" to do in
> > riscv_isa_extension_check(), because the dependencies may not all have
> > been resolved when we probe an extension (Clement's current Zca etc
> > series improves the situation though by only calling the checks after
> > we probe all extensions).
> > 
> > The simple V cases are all fine though - the DT binding and ACPI rules
> > for compatible strings all mandate that single-letter extensions must
> > come before multi-letter ones. For riscv,isa-extensions we control the
> > probe ordering and probe V before any multi-letter stuff. Additionally,
> > we should make it a requirement for V to be present if things that
> > depend on it are.
> > 
> > That said, is it permitted by the specs to have any of the extensions
> > you mention without the full V extension, but with one of the cut-down
> > variants you mention here? If not, I'd be more interested in figuring
> > out the non-extension dependencies: whether or not the kernel itself
> > supports vector and if the kernel has opted to disable vector due to
> > detecting that harts have mismatching vector lengths.
> > 
> > TL;DR: I think we should add some checks in riscv_isa_extension_check().
> 
> Also, unless this only becomes a problem with this series that adds the
> cut-down forms of vector, I think this is a separate problem to solve
> and I can send some patches for it (along with some other cleanup I'd like
> to do as a result of Eric's comments) and you can just submit the v2 you
> were planning to without it. I can't, off the top of my head, think of
> why this particular series would break the vector crypto stuff though,
> the problems with enabling extensions seem underlying.

Here's something buggy that I chucked together as an idea of what I
meant:
https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux.git/commit/?h=riscv-check_vector
Beware, it is entirely untested :)
It's based on both this series and patches 2 & 3 of Charlie's series doing
the T-Head vector stuff. It really needs Clement's extension_check()
rework that I mentioned 2 mails ago to function correctly for any of these
vector subsets. Without Clement's stuff, it'll have "random" behaviour
depending on probe order for riscv,isa and a determinate, but incorrect,
behaviour otherwise.

Cheers,
Conor.

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WARNING: multiple messages have this Message-ID (diff)
From: Conor Dooley <conor@kernel.org>
To: Conor Dooley <conor.dooley@microchip.com>
Cc: "Andy Chiu" <andy.chiu@sifive.com>,
	"Eric Biggers" <ebiggers@kernel.org>,
	"Paul Walmsley" <paul.walmsley@sifive.com>,
	"Palmer Dabbelt" <palmer@dabbelt.com>,
	"Albert Ou" <aou@eecs.berkeley.edu>,
	"Heiko Stuebner" <heiko@sntech.de>, "Guo Ren" <guoren@kernel.org>,
	"Rob Herring" <robh@kernel.org>,
	"Krzysztof Kozlowski" <krzysztof.kozlowski+dt@linaro.org>,
	"Jonathan Corbet" <corbet@lwn.net>,
	"Evan Green" <evan@rivosinc.com>,
	"Clément Léger" <cleger@rivosinc.com>,
	"Shuah Khan" <shuah@kernel.org>,
	linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org,
	"Palmer Dabbelt" <palmer@rivosinc.com>,
	"Vincent Chen" <vincent.chen@sifive.com>,
	"Greentime Hu" <greentime.hu@sifive.com>,
	devicetree@vger.kernel.org, linux-doc@vger.kernel.org,
	linux-kselftest@vger.kernel.org,
	"Joel Granados" <j.granados@samsung.com>,
	"Jerry Shih" <jerry.shih@sifive.com>,
	"Charlie Jenkins" <charlie@rivosinc.com>
Subject: Re: [PATCH v4 7/9] riscv: vector: adjust minimum Vector requirement to ZVE32X
Date: Thu, 9 May 2024 23:22:42 +0100	[thread overview]
Message-ID: <20240509-irritant-morphing-a25428a4f750@spud> (raw)
In-Reply-To: <20240509-habitable-unrefined-02322f228d5a@wendy>


[-- Attachment #1.1: Type: text/plain, Size: 3127 bytes --]

On Thu, May 09, 2024 at 09:25:25AM +0100, Conor Dooley wrote:
> On Thu, May 09, 2024 at 08:48:09AM +0100, Conor Dooley wrote:
> > On Thu, May 09, 2024 at 02:56:30PM +0800, Andy Chiu wrote:
> > > Hi Conor,
> > > 
> > > Should we check if "v" presents for vector crypto extensions in
> > > riscv_isa_extension_check()? We are not checking this for now. So a
> > > kernel compiled with RISCV_ISA_V still has a problem if its isa-string
> > > includes any of vector crypto ("zvbb, zvkg, etc") but not "v".
> > 
> > 
> > Yeah, one of the things I took away from this discussion is that we need
> > to improve the implementation of both the methods we have at the moment
> > for drivers etc to check if extensions are present and usable.
> > In general, I don't think checks like that are "safe" to do in
> > riscv_isa_extension_check(), because the dependencies may not all have
> > been resolved when we probe an extension (Clement's current Zca etc
> > series improves the situation though by only calling the checks after
> > we probe all extensions).
> > 
> > The simple V cases are all fine though - the DT binding and ACPI rules
> > for compatible strings all mandate that single-letter extensions must
> > come before multi-letter ones. For riscv,isa-extensions we control the
> > probe ordering and probe V before any multi-letter stuff. Additionally,
> > we should make it a requirement for V to be present if things that
> > depend on it are.
> > 
> > That said, is it permitted by the specs to have any of the extensions
> > you mention without the full V extension, but with one of the cut-down
> > variants you mention here? If not, I'd be more interested in figuring
> > out the non-extension dependencies: whether or not the kernel itself
> > supports vector and if the kernel has opted to disable vector due to
> > detecting that harts have mismatching vector lengths.
> > 
> > TL;DR: I think we should add some checks in riscv_isa_extension_check().
> 
> Also, unless this only becomes a problem with this series that adds the
> cut-down forms of vector, I think this is a separate problem to solve
> and I can send some patches for it (along with some other cleanup I'd like
> to do as a result of Eric's comments) and you can just submit the v2 you
> were planning to without it. I can't, off the top of my head, think of
> why this particular series would break the vector crypto stuff though,
> the problems with enabling extensions seem underlying.

Here's something buggy that I chucked together as an idea of what I
meant:
https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux.git/commit/?h=riscv-check_vector
Beware, it is entirely untested :)
It's based on both this series and patches 2 & 3 of Charlie's series doing
the T-Head vector stuff. It really needs Clement's extension_check()
rework that I mentioned 2 mails ago to function correctly for any of these
vector subsets. Without Clement's stuff, it'll have "random" behaviour
depending on probe order for riscv,isa and a determinate, but incorrect,
behaviour otherwise.

Cheers,
Conor.

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  reply	other threads:[~2024-05-09 22:22 UTC|newest]

Thread overview: 66+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-04-12  6:48 [PATCH v4 0/9] Support Zve32[xf] and Zve64[xfd] Vector subextensions Andy Chiu
2024-04-12  6:48 ` Andy Chiu
2024-04-12  6:48 ` [PATCH v4 1/9] riscv: vector: add a comment when calling riscv_setup_vsize() Andy Chiu
2024-04-12  6:48   ` Andy Chiu
2024-04-18  9:54   ` Conor Dooley
2024-04-18  9:54     ` Conor Dooley
2024-04-12  6:48 ` [PATCH v4 2/9] riscv: smp: fail booting up smp if inconsistent vlen is detected Andy Chiu
2024-04-12  6:48   ` Andy Chiu
2024-04-18 10:17   ` Conor Dooley
2024-04-18 10:17     ` Conor Dooley
2024-04-19  6:09   ` [External] " yunhui cui
2024-04-19  6:09     ` yunhui cui
2024-04-24 20:01   ` Alexandre Ghiti
2024-04-24 20:01     ` Alexandre Ghiti
2024-05-08  8:21     ` Andy Chiu
2024-05-08  8:21       ` Andy Chiu
2024-05-08 10:43       ` Alexandre Ghiti
2024-05-08 10:43         ` Alexandre Ghiti
2024-04-12  6:48 ` [PATCH v4 3/9] riscv: cpufeature: call match_isa_ext() for single-letter extensions Andy Chiu
2024-04-12  6:48   ` Andy Chiu
2024-04-18 10:29   ` Conor Dooley
2024-04-18 10:29     ` Conor Dooley
2024-04-12  6:49 ` [PATCH v4 4/9] riscv: cpufeature: add zve32[xf] and zve64[xfd] isa detection Andy Chiu
2024-04-12  6:49   ` Andy Chiu
2024-04-18 10:19   ` Conor Dooley
2024-04-18 10:19     ` Conor Dooley
2024-04-12  6:49 ` [PATCH v4 5/9] dt-bindings: riscv: add Zve32[xf] Zve64[xfd] ISA extension description Andy Chiu
2024-04-12  6:49   ` Andy Chiu
2024-04-18 10:21   ` Conor Dooley
2024-04-18 10:21     ` Conor Dooley
2024-04-12  6:49 ` [PATCH v4 6/9] riscv: hwprobe: add zve Vector subextensions into hwprobe interface Andy Chiu
2024-04-12  6:49   ` Andy Chiu
2024-04-12  6:49 ` [PATCH v4 7/9] riscv: vector: adjust minimum Vector requirement to ZVE32X Andy Chiu
2024-04-12  6:49   ` Andy Chiu
2024-04-18 11:02   ` Conor Dooley
2024-04-18 11:02     ` Conor Dooley
2024-04-18 15:52     ` Eric Biggers
2024-04-18 15:52       ` Eric Biggers
2024-04-18 16:53       ` Conor Dooley
2024-04-18 16:53         ` Conor Dooley
2024-04-18 17:32         ` Eric Biggers
2024-04-18 17:32           ` Eric Biggers
2024-04-18 17:39           ` Eric Biggers
2024-04-18 17:39             ` Eric Biggers
2024-04-18 18:26             ` Conor Dooley
2024-04-18 18:26               ` Conor Dooley
2024-04-18 18:28               ` Conor Dooley
2024-04-18 18:28                 ` Conor Dooley
2024-04-18 18:41               ` Eric Biggers
2024-04-18 18:41                 ` Eric Biggers
2024-04-18 20:00                 ` Conor Dooley
2024-04-18 20:00                   ` Conor Dooley
2024-05-09  6:56               ` Andy Chiu
2024-05-09  6:56                 ` Andy Chiu
2024-05-09  7:48                 ` Conor Dooley
2024-05-09  7:48                   ` Conor Dooley
2024-05-09  8:25                   ` Conor Dooley
2024-05-09  8:25                     ` Conor Dooley
2024-05-09 22:22                     ` Conor Dooley [this message]
2024-05-09 22:22                       ` Conor Dooley
2024-04-12  6:49 ` [PATCH v4 8/9] hwprobe: fix integer promotion in RISCV_HWPROBE_EXT macro Andy Chiu
2024-04-12  6:49   ` Andy Chiu
2024-04-12  6:49 ` [PATCH v4 9/9] selftest: run vector prctl test for ZVE32X Andy Chiu
2024-04-12  6:49   ` Andy Chiu
2024-04-25 23:00 ` [PATCH v4 0/9] Support Zve32[xf] and Zve64[xfd] Vector subextensions patchwork-bot+linux-riscv
2024-04-25 23:00   ` patchwork-bot+linux-riscv

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