From: Bjorn Helgaas <helgaas@kernel.org>
To: Sunil V L <sunilvl@ventanamicro.com>
Cc: linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org,
linux-acpi@vger.kernel.org, linux-pci@vger.kernel.org,
linux-serial@vger.kernel.org, acpica-devel@lists.linux.dev,
"Catalin Marinas" <catalin.marinas@arm.com>,
"Will Deacon" <will@kernel.org>,
"Paul Walmsley" <paul.walmsley@sifive.com>,
"Albert Ou" <aou@eecs.berkeley.edu>,
"Rafael J . Wysocki" <rafael@kernel.org>,
"Len Brown" <lenb@kernel.org>,
"Bjorn Helgaas" <bhelgaas@google.com>,
"Anup Patel" <anup@brainfault.org>,
"Thomas Gleixner" <tglx@linutronix.de>,
"Samuel Holland" <samuel.holland@sifive.com>,
"Greg Kroah-Hartman" <gregkh@linuxfoundation.org>,
"Jiri Slaby" <jirislaby@kernel.org>,
"Robert Moore" <robert.moore@intel.com>,
"Conor Dooley" <conor.dooley@microchip.com>,
"Andrew Jones" <ajones@ventanamicro.com>,
"Andy Shevchenko" <andriy.shevchenko@linux.intel.com>,
"Marc Zyngier" <maz@kernel.org>,
"Atish Kumar Patra" <atishp@rivosinc.com>,
"Andrei Warkentin" <andrei.warkentin@intel.com>,
"Haibo1 Xu" <haibo1.xu@intel.com>,
"Björn Töpel" <bjorn@kernel.org>
Subject: Re: [PATCH v5 07/17] ACPI: bus: Add RINTC IRQ model for RISC-V
Date: Thu, 23 May 2024 16:59:03 -0500 [thread overview]
Message-ID: <20240523215903.GA138985@bhelgaas> (raw)
In-Reply-To: <20240501121742.1215792-8-sunilvl@ventanamicro.com>
On Wed, May 01, 2024 at 05:47:32PM +0530, Sunil V L wrote:
> Add the IRQ model for RISC-V INTC so that acpi_set_irq_model can use this
> for RISC-V.
>
> Signed-off-by: Sunil V L <sunilvl@ventanamicro.com>
> ---
> drivers/acpi/bus.c | 3 +++
> include/linux/acpi.h | 1 +
> 2 files changed, 4 insertions(+)
>
> diff --git a/drivers/acpi/bus.c b/drivers/acpi/bus.c
> index 17ee483c3bf4..6739db258a95 100644
> --- a/drivers/acpi/bus.c
> +++ b/drivers/acpi/bus.c
> @@ -1190,6 +1190,9 @@ static int __init acpi_bus_init_irq(void)
> case ACPI_IRQ_MODEL_LPIC:
> message = "LPIC";
> break;
> + case ACPI_IRQ_MODEL_RINTC:
> + message = "RINTC";
> + break;
> default:
> pr_info("Unknown interrupt routing model\n");
> return -ENODEV;
> diff --git a/include/linux/acpi.h b/include/linux/acpi.h
> index 846a4001b5e0..c1a01fd02873 100644
> --- a/include/linux/acpi.h
> +++ b/include/linux/acpi.h
> @@ -107,6 +107,7 @@ enum acpi_irq_model_id {
> ACPI_IRQ_MODEL_PLATFORM,
> ACPI_IRQ_MODEL_GIC,
> ACPI_IRQ_MODEL_LPIC,
> + ACPI_IRQ_MODEL_RINTC,
Is the ACPI_IRQ_MODEL_RINTC value documented somewhere? Maybe an ECR
for the ACPI spec?
acpi_bus_init_irq() is going to pass ACPI_IRQ_MODEL_RINTC to _PIC, and
ACPI r6.5, sec 5.8.1 only mentions the ACPI_IRQ_MODEL_PIC,
ACPI_IRQ_MODEL_IOAPIC, and ACPI_IRQ_MODEL_IOSAPIC values.
Even the existing ACPI_IRQ_MODEL_PLATFORM, ACPI_IRQ_MODEL_GIC, and
ACPI_IRQ_MODEL_LPIC values aren't mentioned in ACPI r6.5.
> ACPI_IRQ_MODEL_COUNT
> };
>
> --
> 2.40.1
>
WARNING: multiple messages have this Message-ID (diff)
From: Bjorn Helgaas <helgaas@kernel.org>
To: Sunil V L <sunilvl@ventanamicro.com>
Cc: linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org,
linux-acpi@vger.kernel.org, linux-pci@vger.kernel.org,
linux-serial@vger.kernel.org, acpica-devel@lists.linux.dev,
"Catalin Marinas" <catalin.marinas@arm.com>,
"Will Deacon" <will@kernel.org>,
"Paul Walmsley" <paul.walmsley@sifive.com>,
"Albert Ou" <aou@eecs.berkeley.edu>,
"Rafael J . Wysocki" <rafael@kernel.org>,
"Len Brown" <lenb@kernel.org>,
"Bjorn Helgaas" <bhelgaas@google.com>,
"Anup Patel" <anup@brainfault.org>,
"Thomas Gleixner" <tglx@linutronix.de>,
"Samuel Holland" <samuel.holland@sifive.com>,
"Greg Kroah-Hartman" <gregkh@linuxfoundation.org>,
"Jiri Slaby" <jirislaby@kernel.org>,
"Robert Moore" <robert.moore@intel.com>,
"Conor Dooley" <conor.dooley@microchip.com>,
"Andrew Jones" <ajones@ventanamicro.com>,
"Andy Shevchenko" <andriy.shevchenko@linux.intel.com>,
"Marc Zyngier" <maz@kernel.org>,
"Atish Kumar Patra" <atishp@rivosinc.com>,
"Andrei Warkentin" <andrei.warkentin@intel.com>,
"Haibo1 Xu" <haibo1.xu@intel.com>,
"Björn Töpel" <bjorn@kernel.org>
Subject: Re: [PATCH v5 07/17] ACPI: bus: Add RINTC IRQ model for RISC-V
Date: Thu, 23 May 2024 16:59:03 -0500 [thread overview]
Message-ID: <20240523215903.GA138985@bhelgaas> (raw)
In-Reply-To: <20240501121742.1215792-8-sunilvl@ventanamicro.com>
On Wed, May 01, 2024 at 05:47:32PM +0530, Sunil V L wrote:
> Add the IRQ model for RISC-V INTC so that acpi_set_irq_model can use this
> for RISC-V.
>
> Signed-off-by: Sunil V L <sunilvl@ventanamicro.com>
> ---
> drivers/acpi/bus.c | 3 +++
> include/linux/acpi.h | 1 +
> 2 files changed, 4 insertions(+)
>
> diff --git a/drivers/acpi/bus.c b/drivers/acpi/bus.c
> index 17ee483c3bf4..6739db258a95 100644
> --- a/drivers/acpi/bus.c
> +++ b/drivers/acpi/bus.c
> @@ -1190,6 +1190,9 @@ static int __init acpi_bus_init_irq(void)
> case ACPI_IRQ_MODEL_LPIC:
> message = "LPIC";
> break;
> + case ACPI_IRQ_MODEL_RINTC:
> + message = "RINTC";
> + break;
> default:
> pr_info("Unknown interrupt routing model\n");
> return -ENODEV;
> diff --git a/include/linux/acpi.h b/include/linux/acpi.h
> index 846a4001b5e0..c1a01fd02873 100644
> --- a/include/linux/acpi.h
> +++ b/include/linux/acpi.h
> @@ -107,6 +107,7 @@ enum acpi_irq_model_id {
> ACPI_IRQ_MODEL_PLATFORM,
> ACPI_IRQ_MODEL_GIC,
> ACPI_IRQ_MODEL_LPIC,
> + ACPI_IRQ_MODEL_RINTC,
Is the ACPI_IRQ_MODEL_RINTC value documented somewhere? Maybe an ECR
for the ACPI spec?
acpi_bus_init_irq() is going to pass ACPI_IRQ_MODEL_RINTC to _PIC, and
ACPI r6.5, sec 5.8.1 only mentions the ACPI_IRQ_MODEL_PIC,
ACPI_IRQ_MODEL_IOAPIC, and ACPI_IRQ_MODEL_IOSAPIC values.
Even the existing ACPI_IRQ_MODEL_PLATFORM, ACPI_IRQ_MODEL_GIC, and
ACPI_IRQ_MODEL_LPIC values aren't mentioned in ACPI r6.5.
> ACPI_IRQ_MODEL_COUNT
> };
>
> --
> 2.40.1
>
_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv
WARNING: multiple messages have this Message-ID (diff)
From: Bjorn Helgaas <helgaas@kernel.org>
To: Sunil V L <sunilvl@ventanamicro.com>
Cc: linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org,
linux-acpi@vger.kernel.org, linux-pci@vger.kernel.org,
linux-serial@vger.kernel.org, acpica-devel@lists.linux.dev,
"Catalin Marinas" <catalin.marinas@arm.com>,
"Will Deacon" <will@kernel.org>,
"Paul Walmsley" <paul.walmsley@sifive.com>,
"Albert Ou" <aou@eecs.berkeley.edu>,
"Rafael J . Wysocki" <rafael@kernel.org>,
"Len Brown" <lenb@kernel.org>,
"Bjorn Helgaas" <bhelgaas@google.com>,
"Anup Patel" <anup@brainfault.org>,
"Thomas Gleixner" <tglx@linutronix.de>,
"Samuel Holland" <samuel.holland@sifive.com>,
"Greg Kroah-Hartman" <gregkh@linuxfoundation.org>,
"Jiri Slaby" <jirislaby@kernel.org>,
"Robert Moore" <robert.moore@intel.com>,
"Conor Dooley" <conor.dooley@microchip.com>,
"Andrew Jones" <ajones@ventanamicro.com>,
"Andy Shevchenko" <andriy.shevchenko@linux.intel.com>,
"Marc Zyngier" <maz@kernel.org>,
"Atish Kumar Patra" <atishp@rivosinc.com>,
"Andrei Warkentin" <andrei.warkentin@intel.com>,
"Haibo1 Xu" <haibo1.xu@intel.com>,
"Björn Töpel" <bjorn@kernel.org>
Subject: Re: [PATCH v5 07/17] ACPI: bus: Add RINTC IRQ model for RISC-V
Date: Thu, 23 May 2024 16:59:03 -0500 [thread overview]
Message-ID: <20240523215903.GA138985@bhelgaas> (raw)
In-Reply-To: <20240501121742.1215792-8-sunilvl@ventanamicro.com>
On Wed, May 01, 2024 at 05:47:32PM +0530, Sunil V L wrote:
> Add the IRQ model for RISC-V INTC so that acpi_set_irq_model can use this
> for RISC-V.
>
> Signed-off-by: Sunil V L <sunilvl@ventanamicro.com>
> ---
> drivers/acpi/bus.c | 3 +++
> include/linux/acpi.h | 1 +
> 2 files changed, 4 insertions(+)
>
> diff --git a/drivers/acpi/bus.c b/drivers/acpi/bus.c
> index 17ee483c3bf4..6739db258a95 100644
> --- a/drivers/acpi/bus.c
> +++ b/drivers/acpi/bus.c
> @@ -1190,6 +1190,9 @@ static int __init acpi_bus_init_irq(void)
> case ACPI_IRQ_MODEL_LPIC:
> message = "LPIC";
> break;
> + case ACPI_IRQ_MODEL_RINTC:
> + message = "RINTC";
> + break;
> default:
> pr_info("Unknown interrupt routing model\n");
> return -ENODEV;
> diff --git a/include/linux/acpi.h b/include/linux/acpi.h
> index 846a4001b5e0..c1a01fd02873 100644
> --- a/include/linux/acpi.h
> +++ b/include/linux/acpi.h
> @@ -107,6 +107,7 @@ enum acpi_irq_model_id {
> ACPI_IRQ_MODEL_PLATFORM,
> ACPI_IRQ_MODEL_GIC,
> ACPI_IRQ_MODEL_LPIC,
> + ACPI_IRQ_MODEL_RINTC,
Is the ACPI_IRQ_MODEL_RINTC value documented somewhere? Maybe an ECR
for the ACPI spec?
acpi_bus_init_irq() is going to pass ACPI_IRQ_MODEL_RINTC to _PIC, and
ACPI r6.5, sec 5.8.1 only mentions the ACPI_IRQ_MODEL_PIC,
ACPI_IRQ_MODEL_IOAPIC, and ACPI_IRQ_MODEL_IOSAPIC values.
Even the existing ACPI_IRQ_MODEL_PLATFORM, ACPI_IRQ_MODEL_GIC, and
ACPI_IRQ_MODEL_LPIC values aren't mentioned in ACPI r6.5.
> ACPI_IRQ_MODEL_COUNT
> };
>
> --
> 2.40.1
>
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2024-05-23 21:59 UTC|newest]
Thread overview: 138+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-05-01 12:17 [PATCH v5 00/17] RISC-V: ACPI: Add external interrupt controller support Sunil V L
2024-05-01 12:17 ` Sunil V L
2024-05-01 12:17 ` Sunil V L
2024-05-01 12:17 ` [PATCH v5 01/17] arm64: PCI: Migrate ACPI related functions to pci-acpi.c Sunil V L
2024-05-01 12:17 ` Sunil V L
2024-05-01 12:17 ` Sunil V L
2024-05-01 12:59 ` Will Deacon
2024-05-01 12:59 ` Will Deacon
2024-05-01 12:59 ` Will Deacon
2024-05-02 9:22 ` Andy Shevchenko
2024-05-02 9:22 ` Andy Shevchenko
2024-05-02 9:22 ` Andy Shevchenko
2024-05-02 9:56 ` Sunil V L
2024-05-02 9:56 ` Sunil V L
2024-05-02 9:56 ` Sunil V L
2024-05-01 12:17 ` [PATCH v5 02/17] ACPI: scan: Add a weak function to reorder the IRQCHIP probe Sunil V L
2024-05-01 12:17 ` Sunil V L
2024-05-01 12:17 ` Sunil V L
2024-05-01 12:17 ` [PATCH v5 03/17] ACPI: bus: Add acpi_riscv_init function Sunil V L
2024-05-01 12:17 ` Sunil V L
2024-05-01 12:17 ` Sunil V L
2024-05-02 9:24 ` Andy Shevchenko
2024-05-02 9:24 ` Andy Shevchenko
2024-05-02 9:24 ` Andy Shevchenko
2024-05-02 10:02 ` Sunil V L
2024-05-02 10:02 ` Sunil V L
2024-05-02 10:02 ` Sunil V L
2024-05-02 10:12 ` Sudeep Holla
2024-05-02 10:12 ` Sudeep Holla
2024-05-02 10:12 ` Sudeep Holla
2024-05-02 10:19 ` Andy Shevchenko
2024-05-02 10:19 ` Andy Shevchenko
2024-05-02 10:19 ` Andy Shevchenko
2024-05-02 11:00 ` Sunil V L
2024-05-02 11:00 ` Sunil V L
2024-05-02 11:00 ` Sunil V L
2024-05-01 12:17 ` [PATCH v5 04/17] ACPI: scan: Refactor dependency creation Sunil V L
2024-05-01 12:17 ` Sunil V L
2024-05-01 12:17 ` Sunil V L
2024-05-02 9:20 ` Andy Shevchenko
2024-05-02 9:20 ` Andy Shevchenko
2024-05-02 9:20 ` Andy Shevchenko
2024-05-02 9:55 ` Sunil V L
2024-05-02 9:55 ` Sunil V L
2024-05-02 9:55 ` Sunil V L
2024-05-01 12:17 ` [PATCH v5 05/17] ACPI: scan: Add RISC-V interrupt controllers to honor list Sunil V L
2024-05-01 12:17 ` Sunil V L
2024-05-01 12:17 ` Sunil V L
2024-05-01 12:17 ` [PATCH v5 06/17] ACPI: scan: Define weak function to populate dependencies Sunil V L
2024-05-01 12:17 ` Sunil V L
2024-05-01 12:17 ` Sunil V L
2024-05-01 12:17 ` [PATCH v5 07/17] ACPI: bus: Add RINTC IRQ model for RISC-V Sunil V L
2024-05-01 12:17 ` Sunil V L
2024-05-01 12:17 ` Sunil V L
2024-05-23 21:59 ` Bjorn Helgaas [this message]
2024-05-23 21:59 ` Bjorn Helgaas
2024-05-23 21:59 ` Bjorn Helgaas
2024-05-27 4:35 ` Sunil V L
2024-05-27 4:35 ` Sunil V L
2024-05-27 4:35 ` Sunil V L
2024-05-01 12:17 ` [PATCH v5 08/17] ACPI: pci_link: Clear the dependencies after probe Sunil V L
2024-05-01 12:17 ` Sunil V L
2024-05-01 12:17 ` Sunil V L
2024-05-01 16:56 ` Bjorn Helgaas
2024-05-01 16:56 ` Bjorn Helgaas
2024-05-01 16:56 ` Bjorn Helgaas
2024-05-02 9:25 ` Andy Shevchenko
2024-05-02 9:25 ` Andy Shevchenko
2024-05-02 9:25 ` Andy Shevchenko
2024-05-02 9:32 ` Sunil V L
2024-05-02 9:32 ` Sunil V L
2024-05-02 9:32 ` Sunil V L
2024-05-01 12:17 ` [PATCH v5 09/17] ACPI: RISC-V: Implement PCI related functionality Sunil V L
2024-05-01 12:17 ` Sunil V L
2024-05-01 12:17 ` Sunil V L
2024-05-01 12:17 ` [PATCH v5 10/17] ACPI: RISC-V: Implement function to reorder irqchip probe entries Sunil V L
2024-05-01 12:17 ` Sunil V L
2024-05-01 12:17 ` Sunil V L
2024-05-01 12:17 ` [PATCH v5 11/17] ACPI: RISC-V: Initialize GSI mapping structures Sunil V L
2024-05-01 12:17 ` Sunil V L
2024-05-01 12:17 ` Sunil V L
2024-05-01 12:17 ` [PATCH v5 12/17] ACPI: RISC-V: Implement function to add implicit dependencies Sunil V L
2024-05-01 12:17 ` Sunil V L
2024-05-01 12:17 ` Sunil V L
2024-05-01 12:17 ` [PATCH v5 13/17] irqchip/riscv-intc: Add ACPI support for AIA Sunil V L
2024-05-01 12:17 ` Sunil V L
2024-05-01 12:17 ` Sunil V L
2024-05-23 21:47 ` Thomas Gleixner
2024-05-23 21:47 ` Thomas Gleixner
2024-05-23 21:47 ` Thomas Gleixner
2024-05-27 4:39 ` Sunil V L
2024-05-27 4:39 ` Sunil V L
2024-05-27 4:39 ` Sunil V L
2024-05-01 12:17 ` [PATCH v5 14/17] irqchip/riscv-imsic: Add ACPI support Sunil V L
2024-05-01 12:17 ` Sunil V L
2024-05-01 12:17 ` Sunil V L
2024-05-23 22:00 ` Thomas Gleixner
2024-05-23 22:00 ` Thomas Gleixner
2024-05-23 22:00 ` Thomas Gleixner
2024-05-27 4:52 ` Sunil V L
2024-05-27 4:52 ` Sunil V L
2024-05-27 4:52 ` Sunil V L
2024-05-01 12:17 ` [PATCH v5 15/17] irqchip/riscv-aplic: " Sunil V L
2024-05-01 12:17 ` Sunil V L
2024-05-01 12:17 ` Sunil V L
2024-05-01 12:17 ` [PATCH v5 16/17] irqchip/sifive-plic: " Sunil V L
2024-05-01 12:17 ` Sunil V L
2024-05-01 12:17 ` Sunil V L
2024-05-01 12:17 ` [PATCH v5 17/17] serial: 8250: Add 8250_acpi driver Sunil V L
2024-05-01 12:17 ` Sunil V L
2024-05-01 12:17 ` Sunil V L
2024-05-02 9:17 ` Andy Shevchenko
2024-05-02 9:17 ` Andy Shevchenko
2024-05-02 9:17 ` Andy Shevchenko
2024-05-02 9:50 ` Sunil V L
2024-05-02 9:50 ` Sunil V L
2024-05-02 9:50 ` Sunil V L
2024-05-02 10:09 ` Andy Shevchenko
2024-05-02 10:09 ` Andy Shevchenko
2024-05-02 10:09 ` Andy Shevchenko
2024-05-02 11:20 ` Sunil V L
2024-05-02 11:20 ` Sunil V L
2024-05-02 11:20 ` Sunil V L
2024-05-02 15:35 ` Andy Shevchenko
2024-05-02 15:35 ` Andy Shevchenko
2024-05-02 15:35 ` Andy Shevchenko
2024-05-03 13:59 ` Sunil V L
2024-05-03 13:59 ` Sunil V L
2024-05-03 13:59 ` Sunil V L
2024-05-03 15:32 ` Andy Shevchenko
2024-05-03 15:32 ` Andy Shevchenko
2024-05-03 15:32 ` Andy Shevchenko
2024-05-06 11:45 ` Sunil V L
2024-05-06 11:45 ` Sunil V L
2024-05-06 11:45 ` Sunil V L
2024-05-04 15:53 ` Greg Kroah-Hartman
2024-05-04 15:53 ` Greg Kroah-Hartman
2024-05-04 15:53 ` Greg Kroah-Hartman
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