From: Sunil V L <sunilvl@ventanamicro.com>
To: Thomas Gleixner <tglx@linutronix.de>
Cc: linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org,
linux-acpi@vger.kernel.org, linux-pci@vger.kernel.org,
linux-serial@vger.kernel.org, acpica-devel@lists.linux.dev,
"Catalin Marinas" <catalin.marinas@arm.com>,
"Will Deacon" <will@kernel.org>,
"Paul Walmsley" <paul.walmsley@sifive.com>,
"Albert Ou" <aou@eecs.berkeley.edu>,
"Rafael J . Wysocki" <rafael@kernel.org>,
"Len Brown" <lenb@kernel.org>,
"Bjorn Helgaas" <bhelgaas@google.com>,
"Anup Patel" <anup@brainfault.org>,
"Samuel Holland" <samuel.holland@sifive.com>,
"Greg Kroah-Hartman" <gregkh@linuxfoundation.org>,
"Jiri Slaby" <jirislaby@kernel.org>,
"Robert Moore" <robert.moore@intel.com>,
"Conor Dooley" <conor.dooley@microchip.com>,
"Andrew Jones" <ajones@ventanamicro.com>,
"Andy Shevchenko" <andriy.shevchenko@linux.intel.com>,
"Marc Zyngier" <maz@kernel.org>,
"Atish Kumar Patra" <atishp@rivosinc.com>,
"Andrei Warkentin" <andrei.warkentin@intel.com>,
"Haibo1 Xu" <haibo1.xu@intel.com>,
"Björn Töpel" <bjorn@kernel.org>
Subject: Re: [PATCH v5 14/17] irqchip/riscv-imsic: Add ACPI support
Date: Mon, 27 May 2024 10:22:08 +0530 [thread overview]
Message-ID: <ZlQReOytuJcMsXUW@sunil-laptop> (raw)
In-Reply-To: <871q5sfatm.ffs@tglx>
On Fri, May 24, 2024 at 12:00:21AM +0200, Thomas Gleixner wrote:
> On Wed, May 01 2024 at 17:47, Sunil V L wrote:
>
> > RISC-V IMSIC interrupt controller provides IPI and MSI support.
> > Currently, DT based drivers setup the IPI feature early during boot but
> > defer setting up the MSI functionality. However, in ACPI systems, ACPI,
> > both IPI and MSI features need to be initialized early itself.
>
> Why?
>
Sorry, commit message got truncated by mistake. Basically, in ACPI PCI
scan happens very early and there is no concept of msi-parent/dependency
on MSI controller like in DT. It just assumes MSI is setup already. Due
to this, we need to setup MSI controller early as well.
> > +
> > +#ifdef CONFIG_ACPI
> > +
> > +static struct fwnode_handle *imsic_acpi_fwnode;
> > +
> > +struct fwnode_handle *imsic_acpi_get_fwnode(struct device *dev)
>
> Why is this function global? It's only used in the very same file and
> under the same CONFIG_ACPI #ifdef, no?
>
For platform devices using MSIs, we need a way to determine the MSI
domain. This function is exported so that platform device like
APLIC/IOMMU can find the MSI irqdomain.
For PCI, pci_msi_register_fwnode_provider() is registered by the MSI
driver for this purpose.
Let me know if this can be made better.
> > +{
> > + return imsic_acpi_fwnode;
> > +}
> > +
> > +static int __init imsic_early_acpi_init(union acpi_subtable_headers *header,
> > + const unsigned long end)
> > +{
> > + struct acpi_madt_imsic *imsic = (struct acpi_madt_imsic *)header;
> > + int rc;
> > +
> > + imsic_acpi_fwnode = irq_domain_alloc_named_fwnode("imsic");
> > + if (!imsic_acpi_fwnode) {
> > + pr_err("unable to allocate IMSIC FW node\n");
> > + return -ENOMEM;
> > + }
> > +
> > + /* Setup IMSIC state */
> > + rc = imsic_setup_state(imsic_acpi_fwnode, (void *)imsic);
>
> Pointless (void *) cast.
>
Okay.
> > + if (rc) {
> > + pr_err("%pfwP: failed to setup state (error %d)\n", imsic_acpi_fwnode, rc);
> > + return rc;
> > + }
> > +
> > + /* Do early setup of IMSIC state and IPIs */
> > + rc = imsic_early_probe(imsic_acpi_fwnode);
> > + if (rc)
> > + return rc;
> > +
> > + rc = imsic_platform_acpi_probe(imsic_acpi_fwnode);
> > +
> > +#ifdef CONFIG_PCI
> > + if (!rc)
> > + pci_msi_register_fwnode_provider(&imsic_acpi_get_fwnode);
> > +#endif
> > +
> > + return rc;
>
> Any error return in this function leaks the firmware node and probably
> some more stuff.
>
Yeah, fwnode needs free up and need to update the code a bit. Thanks!
> > +}
> > +
> > +IRQCHIP_ACPI_DECLARE(riscv_imsic, ACPI_MADT_TYPE_IMSIC, NULL,
> > + 1, imsic_early_acpi_init);
> > +#endif
>
> ...
>
> > - /* Find number of interrupt identities */
> > - rc = of_property_read_u32(to_of_node(fwnode), "riscv,num-ids",
> > - &global->nr_ids);
> > - if (rc) {
> > - pr_err("%pfwP: number of interrupt identities not found\n", fwnode);
> > - return rc;
> > + /* Find number of guest interrupt identities */
> > + rc = of_property_read_u32(to_of_node(fwnode), "riscv,num-guest-ids",
> > + &global->nr_guest_ids);
> > + if (rc)
> > + global->nr_guest_ids = global->nr_ids;
> > + } else {
> > + global->guest_index_bits = imsic->guest_index_bits;
> > + global->hart_index_bits = imsic->hart_index_bits;
> > + global->group_index_bits = imsic->group_index_bits;
> > + global->group_index_shift = imsic->group_index_shift;
> > + global->nr_ids = imsic->num_ids;
> > + global->nr_guest_ids = imsic->num_guest_ids;
> > }
>
> Seriously?
>
> Why can't you just split out the existing DT code into a separate
> function in an initial patch which avoulds all of this unreviewable
> churn of making the DT stuff indented ?
>
Sure, makes sense. let me create separate patch first as you suggested.
> > +#ifdef CONFIG_ACPI
> > +int imsic_platform_acpi_probe(struct fwnode_handle *fwnode);
> > +struct fwnode_handle *imsic_acpi_get_fwnode(struct device *dev);
> > +#else
> > +static inline struct fwnode_handle *imsic_acpi_get_fwnode(struct device *dev)
> > +{
> > + return NULL;
> > +}
> > +#endif
>
> Oh well.
>
I guess this is related to your prior comment about the need to make
this public function. Let me know if I am missing something.
Thanks!
Sunil
WARNING: multiple messages have this Message-ID (diff)
From: Sunil V L <sunilvl@ventanamicro.com>
To: Thomas Gleixner <tglx@linutronix.de>
Cc: linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org,
linux-acpi@vger.kernel.org, linux-pci@vger.kernel.org,
linux-serial@vger.kernel.org, acpica-devel@lists.linux.dev,
"Catalin Marinas" <catalin.marinas@arm.com>,
"Will Deacon" <will@kernel.org>,
"Paul Walmsley" <paul.walmsley@sifive.com>,
"Albert Ou" <aou@eecs.berkeley.edu>,
"Rafael J . Wysocki" <rafael@kernel.org>,
"Len Brown" <lenb@kernel.org>,
"Bjorn Helgaas" <bhelgaas@google.com>,
"Anup Patel" <anup@brainfault.org>,
"Samuel Holland" <samuel.holland@sifive.com>,
"Greg Kroah-Hartman" <gregkh@linuxfoundation.org>,
"Jiri Slaby" <jirislaby@kernel.org>,
"Robert Moore" <robert.moore@intel.com>,
"Conor Dooley" <conor.dooley@microchip.com>,
"Andrew Jones" <ajones@ventanamicro.com>,
"Andy Shevchenko" <andriy.shevchenko@linux.intel.com>,
"Marc Zyngier" <maz@kernel.org>,
"Atish Kumar Patra" <atishp@rivosinc.com>,
"Andrei Warkentin" <andrei.warkentin@intel.com>,
"Haibo1 Xu" <haibo1.xu@intel.com>,
"Björn Töpel" <bjorn@kernel.org>
Subject: Re: [PATCH v5 14/17] irqchip/riscv-imsic: Add ACPI support
Date: Mon, 27 May 2024 10:22:08 +0530 [thread overview]
Message-ID: <ZlQReOytuJcMsXUW@sunil-laptop> (raw)
In-Reply-To: <871q5sfatm.ffs@tglx>
On Fri, May 24, 2024 at 12:00:21AM +0200, Thomas Gleixner wrote:
> On Wed, May 01 2024 at 17:47, Sunil V L wrote:
>
> > RISC-V IMSIC interrupt controller provides IPI and MSI support.
> > Currently, DT based drivers setup the IPI feature early during boot but
> > defer setting up the MSI functionality. However, in ACPI systems, ACPI,
> > both IPI and MSI features need to be initialized early itself.
>
> Why?
>
Sorry, commit message got truncated by mistake. Basically, in ACPI PCI
scan happens very early and there is no concept of msi-parent/dependency
on MSI controller like in DT. It just assumes MSI is setup already. Due
to this, we need to setup MSI controller early as well.
> > +
> > +#ifdef CONFIG_ACPI
> > +
> > +static struct fwnode_handle *imsic_acpi_fwnode;
> > +
> > +struct fwnode_handle *imsic_acpi_get_fwnode(struct device *dev)
>
> Why is this function global? It's only used in the very same file and
> under the same CONFIG_ACPI #ifdef, no?
>
For platform devices using MSIs, we need a way to determine the MSI
domain. This function is exported so that platform device like
APLIC/IOMMU can find the MSI irqdomain.
For PCI, pci_msi_register_fwnode_provider() is registered by the MSI
driver for this purpose.
Let me know if this can be made better.
> > +{
> > + return imsic_acpi_fwnode;
> > +}
> > +
> > +static int __init imsic_early_acpi_init(union acpi_subtable_headers *header,
> > + const unsigned long end)
> > +{
> > + struct acpi_madt_imsic *imsic = (struct acpi_madt_imsic *)header;
> > + int rc;
> > +
> > + imsic_acpi_fwnode = irq_domain_alloc_named_fwnode("imsic");
> > + if (!imsic_acpi_fwnode) {
> > + pr_err("unable to allocate IMSIC FW node\n");
> > + return -ENOMEM;
> > + }
> > +
> > + /* Setup IMSIC state */
> > + rc = imsic_setup_state(imsic_acpi_fwnode, (void *)imsic);
>
> Pointless (void *) cast.
>
Okay.
> > + if (rc) {
> > + pr_err("%pfwP: failed to setup state (error %d)\n", imsic_acpi_fwnode, rc);
> > + return rc;
> > + }
> > +
> > + /* Do early setup of IMSIC state and IPIs */
> > + rc = imsic_early_probe(imsic_acpi_fwnode);
> > + if (rc)
> > + return rc;
> > +
> > + rc = imsic_platform_acpi_probe(imsic_acpi_fwnode);
> > +
> > +#ifdef CONFIG_PCI
> > + if (!rc)
> > + pci_msi_register_fwnode_provider(&imsic_acpi_get_fwnode);
> > +#endif
> > +
> > + return rc;
>
> Any error return in this function leaks the firmware node and probably
> some more stuff.
>
Yeah, fwnode needs free up and need to update the code a bit. Thanks!
> > +}
> > +
> > +IRQCHIP_ACPI_DECLARE(riscv_imsic, ACPI_MADT_TYPE_IMSIC, NULL,
> > + 1, imsic_early_acpi_init);
> > +#endif
>
> ...
>
> > - /* Find number of interrupt identities */
> > - rc = of_property_read_u32(to_of_node(fwnode), "riscv,num-ids",
> > - &global->nr_ids);
> > - if (rc) {
> > - pr_err("%pfwP: number of interrupt identities not found\n", fwnode);
> > - return rc;
> > + /* Find number of guest interrupt identities */
> > + rc = of_property_read_u32(to_of_node(fwnode), "riscv,num-guest-ids",
> > + &global->nr_guest_ids);
> > + if (rc)
> > + global->nr_guest_ids = global->nr_ids;
> > + } else {
> > + global->guest_index_bits = imsic->guest_index_bits;
> > + global->hart_index_bits = imsic->hart_index_bits;
> > + global->group_index_bits = imsic->group_index_bits;
> > + global->group_index_shift = imsic->group_index_shift;
> > + global->nr_ids = imsic->num_ids;
> > + global->nr_guest_ids = imsic->num_guest_ids;
> > }
>
> Seriously?
>
> Why can't you just split out the existing DT code into a separate
> function in an initial patch which avoulds all of this unreviewable
> churn of making the DT stuff indented ?
>
Sure, makes sense. let me create separate patch first as you suggested.
> > +#ifdef CONFIG_ACPI
> > +int imsic_platform_acpi_probe(struct fwnode_handle *fwnode);
> > +struct fwnode_handle *imsic_acpi_get_fwnode(struct device *dev);
> > +#else
> > +static inline struct fwnode_handle *imsic_acpi_get_fwnode(struct device *dev)
> > +{
> > + return NULL;
> > +}
> > +#endif
>
> Oh well.
>
I guess this is related to your prior comment about the need to make
this public function. Let me know if I am missing something.
Thanks!
Sunil
_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv
WARNING: multiple messages have this Message-ID (diff)
From: Sunil V L <sunilvl@ventanamicro.com>
To: Thomas Gleixner <tglx@linutronix.de>
Cc: linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org,
linux-acpi@vger.kernel.org, linux-pci@vger.kernel.org,
linux-serial@vger.kernel.org, acpica-devel@lists.linux.dev,
"Catalin Marinas" <catalin.marinas@arm.com>,
"Will Deacon" <will@kernel.org>,
"Paul Walmsley" <paul.walmsley@sifive.com>,
"Albert Ou" <aou@eecs.berkeley.edu>,
"Rafael J . Wysocki" <rafael@kernel.org>,
"Len Brown" <lenb@kernel.org>,
"Bjorn Helgaas" <bhelgaas@google.com>,
"Anup Patel" <anup@brainfault.org>,
"Samuel Holland" <samuel.holland@sifive.com>,
"Greg Kroah-Hartman" <gregkh@linuxfoundation.org>,
"Jiri Slaby" <jirislaby@kernel.org>,
"Robert Moore" <robert.moore@intel.com>,
"Conor Dooley" <conor.dooley@microchip.com>,
"Andrew Jones" <ajones@ventanamicro.com>,
"Andy Shevchenko" <andriy.shevchenko@linux.intel.com>,
"Marc Zyngier" <maz@kernel.org>,
"Atish Kumar Patra" <atishp@rivosinc.com>,
"Andrei Warkentin" <andrei.warkentin@intel.com>,
"Haibo1 Xu" <haibo1.xu@intel.com>,
"Björn Töpel" <bjorn@kernel.org>
Subject: Re: [PATCH v5 14/17] irqchip/riscv-imsic: Add ACPI support
Date: Mon, 27 May 2024 10:22:08 +0530 [thread overview]
Message-ID: <ZlQReOytuJcMsXUW@sunil-laptop> (raw)
In-Reply-To: <871q5sfatm.ffs@tglx>
On Fri, May 24, 2024 at 12:00:21AM +0200, Thomas Gleixner wrote:
> On Wed, May 01 2024 at 17:47, Sunil V L wrote:
>
> > RISC-V IMSIC interrupt controller provides IPI and MSI support.
> > Currently, DT based drivers setup the IPI feature early during boot but
> > defer setting up the MSI functionality. However, in ACPI systems, ACPI,
> > both IPI and MSI features need to be initialized early itself.
>
> Why?
>
Sorry, commit message got truncated by mistake. Basically, in ACPI PCI
scan happens very early and there is no concept of msi-parent/dependency
on MSI controller like in DT. It just assumes MSI is setup already. Due
to this, we need to setup MSI controller early as well.
> > +
> > +#ifdef CONFIG_ACPI
> > +
> > +static struct fwnode_handle *imsic_acpi_fwnode;
> > +
> > +struct fwnode_handle *imsic_acpi_get_fwnode(struct device *dev)
>
> Why is this function global? It's only used in the very same file and
> under the same CONFIG_ACPI #ifdef, no?
>
For platform devices using MSIs, we need a way to determine the MSI
domain. This function is exported so that platform device like
APLIC/IOMMU can find the MSI irqdomain.
For PCI, pci_msi_register_fwnode_provider() is registered by the MSI
driver for this purpose.
Let me know if this can be made better.
> > +{
> > + return imsic_acpi_fwnode;
> > +}
> > +
> > +static int __init imsic_early_acpi_init(union acpi_subtable_headers *header,
> > + const unsigned long end)
> > +{
> > + struct acpi_madt_imsic *imsic = (struct acpi_madt_imsic *)header;
> > + int rc;
> > +
> > + imsic_acpi_fwnode = irq_domain_alloc_named_fwnode("imsic");
> > + if (!imsic_acpi_fwnode) {
> > + pr_err("unable to allocate IMSIC FW node\n");
> > + return -ENOMEM;
> > + }
> > +
> > + /* Setup IMSIC state */
> > + rc = imsic_setup_state(imsic_acpi_fwnode, (void *)imsic);
>
> Pointless (void *) cast.
>
Okay.
> > + if (rc) {
> > + pr_err("%pfwP: failed to setup state (error %d)\n", imsic_acpi_fwnode, rc);
> > + return rc;
> > + }
> > +
> > + /* Do early setup of IMSIC state and IPIs */
> > + rc = imsic_early_probe(imsic_acpi_fwnode);
> > + if (rc)
> > + return rc;
> > +
> > + rc = imsic_platform_acpi_probe(imsic_acpi_fwnode);
> > +
> > +#ifdef CONFIG_PCI
> > + if (!rc)
> > + pci_msi_register_fwnode_provider(&imsic_acpi_get_fwnode);
> > +#endif
> > +
> > + return rc;
>
> Any error return in this function leaks the firmware node and probably
> some more stuff.
>
Yeah, fwnode needs free up and need to update the code a bit. Thanks!
> > +}
> > +
> > +IRQCHIP_ACPI_DECLARE(riscv_imsic, ACPI_MADT_TYPE_IMSIC, NULL,
> > + 1, imsic_early_acpi_init);
> > +#endif
>
> ...
>
> > - /* Find number of interrupt identities */
> > - rc = of_property_read_u32(to_of_node(fwnode), "riscv,num-ids",
> > - &global->nr_ids);
> > - if (rc) {
> > - pr_err("%pfwP: number of interrupt identities not found\n", fwnode);
> > - return rc;
> > + /* Find number of guest interrupt identities */
> > + rc = of_property_read_u32(to_of_node(fwnode), "riscv,num-guest-ids",
> > + &global->nr_guest_ids);
> > + if (rc)
> > + global->nr_guest_ids = global->nr_ids;
> > + } else {
> > + global->guest_index_bits = imsic->guest_index_bits;
> > + global->hart_index_bits = imsic->hart_index_bits;
> > + global->group_index_bits = imsic->group_index_bits;
> > + global->group_index_shift = imsic->group_index_shift;
> > + global->nr_ids = imsic->num_ids;
> > + global->nr_guest_ids = imsic->num_guest_ids;
> > }
>
> Seriously?
>
> Why can't you just split out the existing DT code into a separate
> function in an initial patch which avoulds all of this unreviewable
> churn of making the DT stuff indented ?
>
Sure, makes sense. let me create separate patch first as you suggested.
> > +#ifdef CONFIG_ACPI
> > +int imsic_platform_acpi_probe(struct fwnode_handle *fwnode);
> > +struct fwnode_handle *imsic_acpi_get_fwnode(struct device *dev);
> > +#else
> > +static inline struct fwnode_handle *imsic_acpi_get_fwnode(struct device *dev)
> > +{
> > + return NULL;
> > +}
> > +#endif
>
> Oh well.
>
I guess this is related to your prior comment about the need to make
this public function. Let me know if I am missing something.
Thanks!
Sunil
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2024-05-27 4:52 UTC|newest]
Thread overview: 138+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-05-01 12:17 [PATCH v5 00/17] RISC-V: ACPI: Add external interrupt controller support Sunil V L
2024-05-01 12:17 ` Sunil V L
2024-05-01 12:17 ` Sunil V L
2024-05-01 12:17 ` [PATCH v5 01/17] arm64: PCI: Migrate ACPI related functions to pci-acpi.c Sunil V L
2024-05-01 12:17 ` Sunil V L
2024-05-01 12:17 ` Sunil V L
2024-05-01 12:59 ` Will Deacon
2024-05-01 12:59 ` Will Deacon
2024-05-01 12:59 ` Will Deacon
2024-05-02 9:22 ` Andy Shevchenko
2024-05-02 9:22 ` Andy Shevchenko
2024-05-02 9:22 ` Andy Shevchenko
2024-05-02 9:56 ` Sunil V L
2024-05-02 9:56 ` Sunil V L
2024-05-02 9:56 ` Sunil V L
2024-05-01 12:17 ` [PATCH v5 02/17] ACPI: scan: Add a weak function to reorder the IRQCHIP probe Sunil V L
2024-05-01 12:17 ` Sunil V L
2024-05-01 12:17 ` Sunil V L
2024-05-01 12:17 ` [PATCH v5 03/17] ACPI: bus: Add acpi_riscv_init function Sunil V L
2024-05-01 12:17 ` Sunil V L
2024-05-01 12:17 ` Sunil V L
2024-05-02 9:24 ` Andy Shevchenko
2024-05-02 9:24 ` Andy Shevchenko
2024-05-02 9:24 ` Andy Shevchenko
2024-05-02 10:02 ` Sunil V L
2024-05-02 10:02 ` Sunil V L
2024-05-02 10:02 ` Sunil V L
2024-05-02 10:12 ` Sudeep Holla
2024-05-02 10:12 ` Sudeep Holla
2024-05-02 10:12 ` Sudeep Holla
2024-05-02 10:19 ` Andy Shevchenko
2024-05-02 10:19 ` Andy Shevchenko
2024-05-02 10:19 ` Andy Shevchenko
2024-05-02 11:00 ` Sunil V L
2024-05-02 11:00 ` Sunil V L
2024-05-02 11:00 ` Sunil V L
2024-05-01 12:17 ` [PATCH v5 04/17] ACPI: scan: Refactor dependency creation Sunil V L
2024-05-01 12:17 ` Sunil V L
2024-05-01 12:17 ` Sunil V L
2024-05-02 9:20 ` Andy Shevchenko
2024-05-02 9:20 ` Andy Shevchenko
2024-05-02 9:20 ` Andy Shevchenko
2024-05-02 9:55 ` Sunil V L
2024-05-02 9:55 ` Sunil V L
2024-05-02 9:55 ` Sunil V L
2024-05-01 12:17 ` [PATCH v5 05/17] ACPI: scan: Add RISC-V interrupt controllers to honor list Sunil V L
2024-05-01 12:17 ` Sunil V L
2024-05-01 12:17 ` Sunil V L
2024-05-01 12:17 ` [PATCH v5 06/17] ACPI: scan: Define weak function to populate dependencies Sunil V L
2024-05-01 12:17 ` Sunil V L
2024-05-01 12:17 ` Sunil V L
2024-05-01 12:17 ` [PATCH v5 07/17] ACPI: bus: Add RINTC IRQ model for RISC-V Sunil V L
2024-05-01 12:17 ` Sunil V L
2024-05-01 12:17 ` Sunil V L
2024-05-23 21:59 ` Bjorn Helgaas
2024-05-23 21:59 ` Bjorn Helgaas
2024-05-23 21:59 ` Bjorn Helgaas
2024-05-27 4:35 ` Sunil V L
2024-05-27 4:35 ` Sunil V L
2024-05-27 4:35 ` Sunil V L
2024-05-01 12:17 ` [PATCH v5 08/17] ACPI: pci_link: Clear the dependencies after probe Sunil V L
2024-05-01 12:17 ` Sunil V L
2024-05-01 12:17 ` Sunil V L
2024-05-01 16:56 ` Bjorn Helgaas
2024-05-01 16:56 ` Bjorn Helgaas
2024-05-01 16:56 ` Bjorn Helgaas
2024-05-02 9:25 ` Andy Shevchenko
2024-05-02 9:25 ` Andy Shevchenko
2024-05-02 9:25 ` Andy Shevchenko
2024-05-02 9:32 ` Sunil V L
2024-05-02 9:32 ` Sunil V L
2024-05-02 9:32 ` Sunil V L
2024-05-01 12:17 ` [PATCH v5 09/17] ACPI: RISC-V: Implement PCI related functionality Sunil V L
2024-05-01 12:17 ` Sunil V L
2024-05-01 12:17 ` Sunil V L
2024-05-01 12:17 ` [PATCH v5 10/17] ACPI: RISC-V: Implement function to reorder irqchip probe entries Sunil V L
2024-05-01 12:17 ` Sunil V L
2024-05-01 12:17 ` Sunil V L
2024-05-01 12:17 ` [PATCH v5 11/17] ACPI: RISC-V: Initialize GSI mapping structures Sunil V L
2024-05-01 12:17 ` Sunil V L
2024-05-01 12:17 ` Sunil V L
2024-05-01 12:17 ` [PATCH v5 12/17] ACPI: RISC-V: Implement function to add implicit dependencies Sunil V L
2024-05-01 12:17 ` Sunil V L
2024-05-01 12:17 ` Sunil V L
2024-05-01 12:17 ` [PATCH v5 13/17] irqchip/riscv-intc: Add ACPI support for AIA Sunil V L
2024-05-01 12:17 ` Sunil V L
2024-05-01 12:17 ` Sunil V L
2024-05-23 21:47 ` Thomas Gleixner
2024-05-23 21:47 ` Thomas Gleixner
2024-05-23 21:47 ` Thomas Gleixner
2024-05-27 4:39 ` Sunil V L
2024-05-27 4:39 ` Sunil V L
2024-05-27 4:39 ` Sunil V L
2024-05-01 12:17 ` [PATCH v5 14/17] irqchip/riscv-imsic: Add ACPI support Sunil V L
2024-05-01 12:17 ` Sunil V L
2024-05-01 12:17 ` Sunil V L
2024-05-23 22:00 ` Thomas Gleixner
2024-05-23 22:00 ` Thomas Gleixner
2024-05-23 22:00 ` Thomas Gleixner
2024-05-27 4:52 ` Sunil V L [this message]
2024-05-27 4:52 ` Sunil V L
2024-05-27 4:52 ` Sunil V L
2024-05-01 12:17 ` [PATCH v5 15/17] irqchip/riscv-aplic: " Sunil V L
2024-05-01 12:17 ` Sunil V L
2024-05-01 12:17 ` Sunil V L
2024-05-01 12:17 ` [PATCH v5 16/17] irqchip/sifive-plic: " Sunil V L
2024-05-01 12:17 ` Sunil V L
2024-05-01 12:17 ` Sunil V L
2024-05-01 12:17 ` [PATCH v5 17/17] serial: 8250: Add 8250_acpi driver Sunil V L
2024-05-01 12:17 ` Sunil V L
2024-05-01 12:17 ` Sunil V L
2024-05-02 9:17 ` Andy Shevchenko
2024-05-02 9:17 ` Andy Shevchenko
2024-05-02 9:17 ` Andy Shevchenko
2024-05-02 9:50 ` Sunil V L
2024-05-02 9:50 ` Sunil V L
2024-05-02 9:50 ` Sunil V L
2024-05-02 10:09 ` Andy Shevchenko
2024-05-02 10:09 ` Andy Shevchenko
2024-05-02 10:09 ` Andy Shevchenko
2024-05-02 11:20 ` Sunil V L
2024-05-02 11:20 ` Sunil V L
2024-05-02 11:20 ` Sunil V L
2024-05-02 15:35 ` Andy Shevchenko
2024-05-02 15:35 ` Andy Shevchenko
2024-05-02 15:35 ` Andy Shevchenko
2024-05-03 13:59 ` Sunil V L
2024-05-03 13:59 ` Sunil V L
2024-05-03 13:59 ` Sunil V L
2024-05-03 15:32 ` Andy Shevchenko
2024-05-03 15:32 ` Andy Shevchenko
2024-05-03 15:32 ` Andy Shevchenko
2024-05-06 11:45 ` Sunil V L
2024-05-06 11:45 ` Sunil V L
2024-05-06 11:45 ` Sunil V L
2024-05-04 15:53 ` Greg Kroah-Hartman
2024-05-04 15:53 ` Greg Kroah-Hartman
2024-05-04 15:53 ` Greg Kroah-Hartman
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