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From: Jamin Lin via <qemu-devel@nongnu.org>
To: "Cédric Le Goater" <clg@kaod.org>,
	"Peter Maydell" <peter.maydell@linaro.org>,
	"Andrew Jeffery" <andrew@codeconstruct.com.au>,
	"Joel Stanley" <joel@jms.id.au>,
	"Alistair Francis" <alistair@alistair23.me>,
	"Cleber Rosa" <crosa@redhat.com>,
	"Philippe Mathieu-Daudé" <philmd@linaro.org>,
	"Wainer dos Santos Moschetta" <wainersm@redhat.com>,
	"Beraldo Leal" <bleal@redhat.com>,
	"open list:ASPEED BMCs" <qemu-arm@nongnu.org>,
	"open list:All patches CC here" <qemu-devel@nongnu.org>
Cc: <jamin_lin@aspeedtech.com>, <troy_lee@aspeedtech.com>,
	<yunlin.tang@aspeedtech.com>
Subject: [PATCH v5 01/17] aspeed/wdt: Add AST2700 support
Date: Tue, 4 Jun 2024 13:44:22 +0800	[thread overview]
Message-ID: <20240604054438.3424349-2-jamin_lin@aspeedtech.com> (raw)
In-Reply-To: <20240604054438.3424349-1-jamin_lin@aspeedtech.com>

AST2700 wdt controller is similiar to AST2600's wdt, but
the AST2700 has 8 watchdogs, and they each have 0x80 of registers.
Introduce ast2700 object class and increase the number of regs(offset) of
ast2700 model.

Signed-off-by: Troy Lee <troy_lee@aspeedtech.com>
Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
---
 hw/watchdog/wdt_aspeed.c         | 24 ++++++++++++++++++++++++
 include/hw/watchdog/wdt_aspeed.h |  3 ++-
 2 files changed, 26 insertions(+), 1 deletion(-)

diff --git a/hw/watchdog/wdt_aspeed.c b/hw/watchdog/wdt_aspeed.c
index d70b656f8e..75685c5647 100644
--- a/hw/watchdog/wdt_aspeed.c
+++ b/hw/watchdog/wdt_aspeed.c
@@ -422,12 +422,36 @@ static const TypeInfo aspeed_1030_wdt_info = {
     .class_init = aspeed_1030_wdt_class_init,
 };
 
+static void aspeed_2700_wdt_class_init(ObjectClass *klass, void *data)
+{
+    DeviceClass *dc = DEVICE_CLASS(klass);
+    AspeedWDTClass *awc = ASPEED_WDT_CLASS(klass);
+
+    dc->desc = "ASPEED 2700 Watchdog Controller";
+    awc->iosize = 0x80;
+    awc->ext_pulse_width_mask = 0xfffff; /* TODO */
+    awc->reset_ctrl_reg = AST2600_SCU_RESET_CONTROL1;
+    awc->reset_pulse = aspeed_2500_wdt_reset_pulse;
+    awc->wdt_reload = aspeed_wdt_reload_1mhz;
+    awc->sanitize_ctrl = aspeed_2600_sanitize_ctrl;
+    awc->default_status = 0x014FB180;
+    awc->default_reload_value = 0x014FB180;
+}
+
+static const TypeInfo aspeed_2700_wdt_info = {
+    .name = TYPE_ASPEED_2700_WDT,
+    .parent = TYPE_ASPEED_WDT,
+    .instance_size = sizeof(AspeedWDTState),
+    .class_init = aspeed_2700_wdt_class_init,
+};
+
 static void wdt_aspeed_register_types(void)
 {
     type_register_static(&aspeed_wdt_info);
     type_register_static(&aspeed_2400_wdt_info);
     type_register_static(&aspeed_2500_wdt_info);
     type_register_static(&aspeed_2600_wdt_info);
+    type_register_static(&aspeed_2700_wdt_info);
     type_register_static(&aspeed_1030_wdt_info);
 }
 
diff --git a/include/hw/watchdog/wdt_aspeed.h b/include/hw/watchdog/wdt_aspeed.h
index e90ef86651..830b0a7936 100644
--- a/include/hw/watchdog/wdt_aspeed.h
+++ b/include/hw/watchdog/wdt_aspeed.h
@@ -19,9 +19,10 @@ OBJECT_DECLARE_TYPE(AspeedWDTState, AspeedWDTClass, ASPEED_WDT)
 #define TYPE_ASPEED_2400_WDT TYPE_ASPEED_WDT "-ast2400"
 #define TYPE_ASPEED_2500_WDT TYPE_ASPEED_WDT "-ast2500"
 #define TYPE_ASPEED_2600_WDT TYPE_ASPEED_WDT "-ast2600"
+#define TYPE_ASPEED_2700_WDT TYPE_ASPEED_WDT "-ast2700"
 #define TYPE_ASPEED_1030_WDT TYPE_ASPEED_WDT "-ast1030"
 
-#define ASPEED_WDT_REGS_MAX        (0x30 / 4)
+#define ASPEED_WDT_REGS_MAX        (0x80 / 4)
 
 struct AspeedWDTState {
     /*< private >*/
-- 
2.25.1


  reply	other threads:[~2024-06-04  5:48 UTC|newest]

Thread overview: 39+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-06-04  5:44 [PATCH v5 00/17] Add AST2700 support Jamin Lin via
2024-06-04  5:44 ` Jamin Lin via [this message]
2024-06-04  5:44 ` [PATCH v5 02/17] aspeed/sli: " Jamin Lin via
2024-06-04  5:44 ` [PATCH v5 03/17] aspeed/sdmc: remove redundant macros Jamin Lin via
2024-06-04  5:44   ` Jamin Lin via
2024-06-04  5:44 ` [PATCH v5 04/17] aspeed/sdmc: fix coding style Jamin Lin via
2024-06-04  5:44 ` [PATCH v5 05/17] aspeed/sdmc: Add AST2700 support Jamin Lin via
2024-06-04  5:44   ` Jamin Lin via
2024-06-04  6:10   ` Cédric Le Goater
2024-06-04  5:44 ` [PATCH v5 06/17] aspeed/smc: correct device description Jamin Lin via
2024-06-04  5:44 ` [PATCH v5 07/17] aspeed/smc: support dma start length and 1 byte length unit Jamin Lin via
2024-06-04  5:44 ` [PATCH v5 08/17] aspeed/smc: support 64 bits dma dram address Jamin Lin via
2024-06-04  5:44 ` [PATCH v5 09/17] aspeed/smc: support different memory region ops for SMC flash region Jamin Lin via
2024-06-04  5:44   ` Jamin Lin via
2024-06-04  6:11   ` Cédric Le Goater
2024-06-04  5:44 ` [PATCH v5 10/17] aspeed/smc: Add AST2700 support Jamin Lin via
2024-06-04  5:44   ` Jamin Lin via
2024-06-04  6:12   ` Cédric Le Goater
2024-06-04  5:44 ` [PATCH v5 11/17] aspeed/scu: " Jamin Lin via
2024-06-04  5:44   ` Jamin Lin via
2024-06-04  5:44 ` [PATCH v5 12/17] aspeed/intc: " Jamin Lin via
2024-06-04  7:18   ` Cédric Le Goater
2024-06-04  5:44 ` [PATCH v5 13/17] aspeed/soc: " Jamin Lin via
2024-06-04  5:44   ` Jamin Lin via
2024-06-04  6:17   ` Cédric Le Goater
2025-01-30 15:13   ` Philippe Mathieu-Daudé
2025-02-03  7:28     ` Jamin Lin
2025-02-03  7:43       ` Jamin Lin
2025-02-03 16:40         ` Philippe Mathieu-Daudé
2025-02-04  3:22           ` Jamin Lin
2024-06-04  5:44 ` [PATCH v5 14/17] aspeed: Add an AST2700 eval board Jamin Lin via
2024-06-04  5:44 ` [PATCH v5 15/17] aspeed/soc: fix incorrect dram size for AST2700 Jamin Lin via
2024-06-04  6:13   ` Cédric Le Goater
2024-06-04  5:44 ` [PATCH v5 16/17] test/avocado/machine_aspeed.py: Add AST2700 test case Jamin Lin via
2024-06-04  5:44 ` [PATCH v5 17/17] docs:aspeed: Add AST2700 Evaluation board Jamin Lin via
2024-06-04  5:44   ` Jamin Lin via
2024-06-04 11:51 ` [PATCH v5 00/17] Add AST2700 support Cédric Le Goater
2024-06-05  0:40   ` Jamin Lin
2024-06-10  9:23 ` Cédric Le Goater

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