Re: [PATCH v3 08/11] riscv: dts: add initial SpacemiT K1 SoC device tree

[Yixun Lan <dlan@gentoo.org>]

On 12:12 Sat 06 Jul     , Jisheng Zhang wrote:
> On Fri, Jul 05, 2024 at 06:38:39AM +0000, Yixun Lan wrote:
> > 
> > On 21:46 Thu 04 Jul     , Jisheng Zhang wrote:
> > > On Wed, Jul 03, 2024 at 02:55:11PM +0000, Yixun Lan wrote:
> > > > From: Yangyu Chen <cyy@cyyself.name>
> > > > 
> > > > Banana Pi BPI-F3 motherboard is powered by SpacemiT K1[1].
> > > > 
> > > > Key features:
> > > > - 4 cores per cluster, 2 clusters on chip
> > > > - UART IP is Intel XScale UART
> > > > 
> > > > Some key considerations:
> > > > - ISA string is inferred from vendor documentation[2]
> > > > - Cluster topology is inferred from datasheet[1] and L2 in vendor dts[3]
> > > > - No coherent DMA on this board
> > > >     Inferred by taking vendor ethernet and MMC drivers to the mainline
> > > >     kernel. Without dma-noncoherent in soc node, the driver fails.
> > > > - No cache nodes now
> > > >     The parameters from vendor dts are likely to be wrong. It has 512
> > > >     sets for a 32KiB L1 Cache. In this case, each set is 64B in size.
> > > >     When the size of the cache line is 64B, it is a directly mapped
> > > >     cache rather than a set-associative cache, the latter is commonly
> > > >     used. Thus, I didn't use the parameters from vendor dts.
> > > > 
> > > > Currently only support booting into console with only uart, other
> > > > features will be added soon later.
> > > > 
> > > > Link: https://docs.banana-pi.org/en/BPI-F3/SpacemiT_K1_datasheet [1]
> > > > Link: https://developer.spacemit.com/#/documentation?token=BWbGwbx7liGW21kq9lucSA6Vnpb [2]
> > > > Link: https://gitee.com/bianbu-linux/linux-6.1/blob/bl-v1.0.y/arch/riscv/boot/dts/spacemit/k1-x.dtsi [3]
> > > > Signed-off-by: Yangyu Chen <cyy@cyyself.name>
> > > > Signed-off-by: Yixun Lan <dlan@gentoo.org>
> > > > ---
> > > >  arch/riscv/boot/dts/spacemit/k1.dtsi | 376 +++++++++++++++++++++++++++++++++++
> > > >  1 file changed, 376 insertions(+)
> > > > 
> > > > diff --git a/arch/riscv/boot/dts/spacemit/k1.dtsi b/arch/riscv/boot/dts/spacemit/k1.dtsi
> > > > new file mode 100644
> > > > index 0000000000000..a076e35855a2e
> > > > --- /dev/null
> > > > +++ b/arch/riscv/boot/dts/spacemit/k1.dtsi
> > > > @@ -0,0 +1,376 @@
> > > > +// SPDX-License-Identifier: GPL-2.0 OR MIT
> > > > +/*
> > > > + * Copyright (C) 2024 Yangyu Chen <cyy@cyyself.name>
> > > > + */
> > > > +
> > > > +/dts-v1/;
> > > > +/ {
> > > > +	#address-cells = <2>;
> > > > +	#size-cells = <2>;
> > > > +	model = "SpacemiT K1";
> > > > +	compatible = "spacemit,k1";
> > > > +
> > > > +	aliases {
> > > > +		serial0 = &uart0;
> > > > +		serial1 = &uart2;
> > > > +		serial2 = &uart3;
> > > > +		serial3 = &uart4;
> > > > +		serial4 = &uart5;
> > > > +		serial5 = &uart6;
> > > > +		serial6 = &uart7;
> > > > +		serial7 = &uart8;
> > > > +		serial8 = &uart9;
> > > > +	};
> > > > +
> > > > +	cpus {
> > > > +		#address-cells = <1>;
> > > > +		#size-cells = <0>;
> > > > +		timebase-frequency = <24000000>;
> > > > +
> > > > +		cpu-map {
> > > > +			cluster0 {
> > > > +				core0 {
> > > > +					cpu = <&cpu_0>;
> > > > +				};
> > > > +				core1 {
> > > > +					cpu = <&cpu_1>;
> > > > +				};
> > > > +				core2 {
> > > > +					cpu = <&cpu_2>;
> > > > +				};
> > > > +				core3 {
> > > > +					cpu = <&cpu_3>;
> > > > +				};
> > > > +			};
> > > > +
> > > > +			cluster1 {
> > > > +				core0 {
> > > > +					cpu = <&cpu_4>;
> > > > +				};
> > > > +				core1 {
> > > > +					cpu = <&cpu_5>;
> > > > +				};
> > > > +				core2 {
> > > > +					cpu = <&cpu_6>;
> > > > +				};
> > > > +				core3 {
> > > > +					cpu = <&cpu_7>;
> > > > +				};
> > > > +			};
> > > > +		};
> > > > +
> > > > +		cpu_0: cpu@0 {
> > > > +			compatible = "spacemit,x60", "riscv";
> > > > +			device_type = "cpu";
> > > > +			reg = <0>;
> > > > +			riscv,isa = "rv64imafdcv_zicbom_zicbop_zicboz_zicntr_zicond_zicsr_zifencei_zihintpause_zihpm_zfh_zba_zbb_zbc_zbs_zkt_zvfh_zvkt_sscofpmf_sstc_svinval_svnapot_svpbmt";
> > > > +			riscv,isa-base = "rv64i";
> > > > +			riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "v", "zicbom",
> > > > +					       "zicbop", "zicboz", "zicntr", "zicond", "zicsr",
> > > > +					       "zifencei", "zihintpause", "zihpm", "zfh", "zba",
> > > > +					       "zbb", "zbc", "zbs", "zkt", "zvfh", "zvkt",
> > > > +					       "sscofpmf", "sstc", "svinval", "svnapot", "svpbmt";
> > > > +			riscv,cbom-block-size = <64>;
> > > > +			riscv,cbop-block-size = <64>;
> > > > +			riscv,cboz-block-size = <64>;
> > > > +			mmu-type = "riscv,sv39";
> > > > +
> > > > +			cpu0_intc: interrupt-controller {
> > > > +				compatible = "riscv,cpu-intc";
> > > > +				interrupt-controller;
> > > > +				#interrupt-cells = <1>;
> > > > +			};
> > > > +		};
> > > > +
> > > > +		cpu_1: cpu@1 {
> > > > +			compatible = "spacemit,x60", "riscv";
> > > > +			device_type = "cpu";
> > > > +			reg = <1>;
> > > > +			riscv,isa = "rv64imafdcv_zicbom_zicbop_zicboz_zicntr_zicond_zicsr_zifencei_zihintpause_zihpm_zfh_zba_zbb_zbc_zbs_zkt_zvfh_zvkt_sscofpmf_sstc_svinval_svnapot_svpbmt";
> > > > +			riscv,isa-base = "rv64i";
> > > > +			riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "v", "zicbom",
> > > > +					       "zicbop", "zicboz", "zicntr", "zicond", "zicsr",
> > > > +					       "zifencei", "zihintpause", "zihpm", "zfh", "zba",
> > > > +					       "zbb", "zbc", "zbs", "zkt", "zvfh", "zvkt",
> > > > +					       "sscofpmf", "sstc", "svinval", "svnapot", "svpbmt";
> > > > +			riscv,cbom-block-size = <64>;
> > > > +			riscv,cbop-block-size = <64>;
> > > > +			riscv,cboz-block-size = <64>;
> > > > +			mmu-type = "riscv,sv39";
> > > > +
> > > > +			cpu1_intc: interrupt-controller {
> > > > +				compatible = "riscv,cpu-intc";
> > > > +				interrupt-controller;
> > > > +				#interrupt-cells = <1>;
> > > > +			};
> > > > +		};
> > > > +
> > > > +		cpu_2: cpu@2 {
> > > > +			compatible = "spacemit,x60", "riscv";
> > > > +			device_type = "cpu";
> > > > +			reg = <2>;
> > > > +			riscv,isa = "rv64imafdcv_zicbom_zicbop_zicboz_zicntr_zicond_zicsr_zifencei_zihintpause_zihpm_zfh_zba_zbb_zbc_zbs_zkt_zvfh_zvkt_sscofpmf_sstc_svinval_svnapot_svpbmt";
> > > > +			riscv,isa-base = "rv64i";
> > > > +			riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "v", "zicbom",
> > > > +					       "zicbop", "zicboz", "zicntr", "zicond", "zicsr",
> > > > +					       "zifencei", "zihintpause", "zihpm", "zfh", "zba",
> > > > +					       "zbb", "zbc", "zbs", "zkt", "zvfh", "zvkt",
> > > > +					       "sscofpmf", "sstc", "svinval", "svnapot", "svpbmt";
> > > > +			riscv,cbom-block-size = <64>;
> > > > +			riscv,cbop-block-size = <64>;
> > > > +			riscv,cboz-block-size = <64>;
> > > > +			mmu-type = "riscv,sv39";
> > > > +
> > > > +			cpu2_intc: interrupt-controller {
> > > > +				compatible = "riscv,cpu-intc";
> > > > +				interrupt-controller;
> > > > +				#interrupt-cells = <1>;
> > > > +			};
> > > > +		};
> > > > +
> > > > +		cpu_3: cpu@3 {
> > > > +			compatible = "spacemit,x60", "riscv";
> > > > +			device_type = "cpu";
> > > > +			reg = <3>;
> > > > +			riscv,isa = "rv64imafdcv_zicbom_zicbop_zicboz_zicntr_zicond_zicsr_zifencei_zihintpause_zihpm_zfh_zba_zbb_zbc_zbs_zkt_zvfh_zvkt_sscofpmf_sstc_svinval_svnapot_svpbmt";
> > > > +			riscv,isa-base = "rv64i";
> > > > +			riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "v", "zicbom",
> > > > +					       "zicbop", "zicboz", "zicntr", "zicond", "zicsr",
> > > > +					       "zifencei", "zihintpause", "zihpm", "zfh", "zba",
> > > > +					       "zbb", "zbc", "zbs", "zkt", "zvfh", "zvkt",
> > > > +					       "sscofpmf", "sstc", "svinval", "svnapot", "svpbmt";
> > > > +			riscv,cbom-block-size = <64>;
> > > > +			riscv,cbop-block-size = <64>;
> > > > +			riscv,cboz-block-size = <64>;
> > > > +			mmu-type = "riscv,sv39";
> > > > +
> > > > +			cpu3_intc: interrupt-controller {
> > > > +				compatible = "riscv,cpu-intc";
> > > > +				interrupt-controller;
> > > > +				#interrupt-cells = <1>;
> > > > +			};
> > > > +		};
> > > > +
> > > > +		cpu_4: cpu@4 {
> > > > +			compatible = "spacemit,x60", "riscv";
> > > > +			device_type = "cpu";
> > > > +			reg = <4>;
> > > > +			riscv,isa = "rv64imafdcv_zicbom_zicbop_zicboz_zicntr_zicond_zicsr_zifencei_zihintpause_zihpm_zfh_zba_zbb_zbc_zbs_zkt_zvfh_zvkt_sscofpmf_sstc_svinval_svnapot_svpbmt";
> > > > +			riscv,isa-base = "rv64i";
> > > > +			riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "v", "zicbom",
> > > > +					       "zicbop", "zicboz", "zicntr", "zicond", "zicsr",
> > > > +					       "zifencei", "zihintpause", "zihpm", "zfh", "zba",
> > > > +					       "zbb", "zbc", "zbs", "zkt", "zvfh", "zvkt",
> > > > +					       "sscofpmf", "sstc", "svinval", "svnapot", "svpbmt";
> > > > +			riscv,cbom-block-size = <64>;
> > > > +			riscv,cbop-block-size = <64>;
> > > > +			riscv,cboz-block-size = <64>;
> > > > +			mmu-type = "riscv,sv39";
> > > > +
> > > > +			cpu4_intc: interrupt-controller {
> > > > +				compatible = "riscv,cpu-intc";
> > > > +				interrupt-controller;
> > > > +				#interrupt-cells = <1>;
> > > > +			};
> > > > +		};
> > > > +
> > > > +		cpu_5: cpu@5 {
> > > > +			compatible = "spacemit,x60", "riscv";
> > > > +			device_type = "cpu";
> > > > +			reg = <5>;
> > > > +			riscv,isa = "rv64imafdcv_zicbom_zicbop_zicboz_zicntr_zicond_zicsr_zifencei_zihintpause_zihpm_zfh_zba_zbb_zbc_zbs_zkt_zvfh_zvkt_sscofpmf_sstc_svinval_svnapot_svpbmt";
> > > > +			riscv,isa-base = "rv64i";
> > > > +			riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "v", "zicbom",
> > > > +					       "zicbop", "zicboz", "zicntr", "zicond", "zicsr",
> > > > +					       "zifencei", "zihintpause", "zihpm", "zfh", "zba",
> > > > +					       "zbb", "zbc", "zbs", "zkt", "zvfh", "zvkt",
> > > > +					       "sscofpmf", "sstc", "svinval", "svnapot", "svpbmt";
> > > > +			riscv,cbom-block-size = <64>;
> > > > +			riscv,cbop-block-size = <64>;
> > > > +			riscv,cboz-block-size = <64>;
> > > > +			mmu-type = "riscv,sv39";
> > > > +
> > > > +			cpu5_intc: interrupt-controller {
> > > > +				compatible = "riscv,cpu-intc";
> > > > +				interrupt-controller;
> > > > +				#interrupt-cells = <1>;
> > > > +			};
> > > > +		};
> > > > +
> > > > +		cpu_6: cpu@6 {
> > > > +			compatible = "spacemit,x60", "riscv";
> > > > +			device_type = "cpu";
> > > > +			reg = <6>;
> > > > +			riscv,isa = "rv64imafdcv_zicbom_zicbop_zicboz_zicntr_zicond_zicsr_zifencei_zihintpause_zihpm_zfh_zba_zbb_zbc_zbs_zkt_zvfh_zvkt_sscofpmf_sstc_svinval_svnapot_svpbmt";
> > > > +			riscv,isa-base = "rv64i";
> > > > +			riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "v", "zicbom",
> > > > +					       "zicbop", "zicboz", "zicntr", "zicond", "zicsr",
> > > > +					       "zifencei", "zihintpause", "zihpm", "zfh", "zba",
> > > > +					       "zbb", "zbc", "zbs", "zkt", "zvfh", "zvkt",
> > > > +					       "sscofpmf", "sstc", "svinval", "svnapot", "svpbmt";
> > > > +			riscv,cbom-block-size = <64>;
> > > > +			riscv,cbop-block-size = <64>;
> > > > +			riscv,cboz-block-size = <64>;
> > > > +			mmu-type = "riscv,sv39";
> > > > +
> > > > +			cpu6_intc: interrupt-controller {
> > > > +				compatible = "riscv,cpu-intc";
> > > > +				interrupt-controller;
> > > > +				#interrupt-cells = <1>;
> > > > +			};
> > > > +		};
> > > > +
> > > > +		cpu_7: cpu@7 {
> > > > +			compatible = "spacemit,x60", "riscv";
> > > > +			device_type = "cpu";
> > > > +			reg = <7>;
> > > > +			riscv,isa = "rv64imafdcv_zicbom_zicbop_zicboz_zicntr_zicond_zicsr_zifencei_zihintpause_zihpm_zfh_zba_zbb_zbc_zbs_zkt_zvfh_zvkt_sscofpmf_sstc_svinval_svnapot_svpbmt";
> > > > +			riscv,isa-base = "rv64i";
> > > > +			riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "v", "zicbom",
> > > > +					       "zicbop", "zicboz", "zicntr", "zicond", "zicsr",
> > > > +					       "zifencei", "zihintpause", "zihpm", "zfh", "zba",
> > > > +					       "zbb", "zbc", "zbs", "zkt", "zvfh", "zvkt",
> > > > +					       "sscofpmf", "sstc", "svinval", "svnapot", "svpbmt";
> > > > +			riscv,cbom-block-size = <64>;
> > > > +			riscv,cbop-block-size = <64>;
> > > > +			riscv,cboz-block-size = <64>;
> > > > +			mmu-type = "riscv,sv39";
> > > > +
> > > > +			cpu7_intc: interrupt-controller {
> > > > +				compatible = "riscv,cpu-intc";
> > > > +				interrupt-controller;
> > > > +				#interrupt-cells = <1>;
> > > > +			};
> > > > +		};
> > > > +
> > > > +	};
> > > > +
> > > > +	soc {
> > > > +		compatible = "simple-bus";
> > > > +		interrupt-parent = <&plic>;
> > > > +		#address-cells = <2>;
> > > > +		#size-cells = <2>;
> > > > +		dma-noncoherent;
> > > > +		ranges;
> > > > +
> > > > +		uart0: serial@d4017000 {
> > > > +			compatible = "spacemit,k1-uart", "intel,xscale-uart";
> > > 
> > > no, this is not a correct hw modeling. The doc on spacemit says
> > > all the uart support 64 bytes FIFO, declaring xscale only makes
> > > use of 32 bytes FIFO.
> > yes, I also noticed it's 64 bytes FIFO
> > 
> > > 
> > > IIRC, 8250_pxa is a xscale uart with 64 bytes FIFO, so this should be
> > > "mrvl,pxa-uart" or "mrvl,mmp-uart"
> > 
> > 
> > for mrvl,pxa-uart, I think you imply to use drivers/tty/serial/8250/8250_pxa.c,
> > which turn out doesn't work on k1 SoC, for the record, we need to adjust
> 
> Really? I just tried "mrvl,pxa-uart" with rc6, it works perfectly, and the FIFO
> in the driver logic is 64bytes now. Am I misssing something or you never tried it?
> 
Ok, I realised it's the clock issue

still, I'm not fully convinced about using "mrvl,pxa-uart",
e.g this driver hardcoded tz_loadsz to 32, not sure if K1 suffer same problem
5208e7ced520 ("serial: 8250_pxa: Configure tx_loadsz to match FIFO IRQ level")

also, what's the preference when choosing driver between 8250_pxa.c vs 8250_of.c?
it occur to me that 8250_pxa.c is more specially tailored for pxa hardware, while
8250_of.c is more generic.. besides, should we consider one more step if we want to
support DMA mode in the future (vendor uart driver has DMA support)?


> >  drivers/tty/serial/8250/Kconfig to enable the driver for ARCH_SPACEMIT,
> >  and change uart compatible to "spacemit,k1-uart", "mrvl,pxa-uart"
> > 
> > for mrvl,mmp-uart, I see two choices, one using 8250_pxa.c which has same result
> > as mrvl,pxa-uart, another choice would using the driver of 8250_of.c 
> > and it work as same as "intel,xscale-uart", I don't see any difference..
> > 
> > P.S: there is possibly a side problem that "mrvl,mmp-uart" from 8250_of.c doesn't 
> > really compatile with "mrvl,mmp-uart" from 8250_pxa.c, but I think it's another story

-- 
Yixun Lan (dlan)
Gentoo Linux Developer
GPG Key ID AABEFD55

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