Re: [PATCH v3 11/11] riscv: dts: spacemit: add uart1 node for K1 SoC

From: Jisheng Zhang <jszhang@kernel.org>
To: Yixun Lan <dlan@gentoo.org>
Cc: Rob Herring <robh@kernel.org>,
	Krzysztof Kozlowski <krzk+dt@kernel.org>,
	Conor Dooley <conor+dt@kernel.org>,
	Conor Dooley <conor@kernel.org>,
	Paul Walmsley <paul.walmsley@sifive.com>,
	Palmer Dabbelt <palmer@dabbelt.com>,
	Albert Ou <aou@eecs.berkeley.edu>,
	Daniel Lezcano <daniel.lezcano@linaro.org>,
	Thomas Gleixner <tglx@linutronix.de>,
	Samuel Holland <samuel.holland@sifive.com>,
	Anup Patel <anup@brainfault.org>,
	Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
	Jiri Slaby <jirislaby@kernel.org>,
	Lubomir Rintel <lkundrak@v3.sk>,
	devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
	Yangyu Chen <cyy@cyyself.name>,
	Inochi Amaoto <inochiama@outlook.com>,
	linux-serial@vger.kernel.org, linux-riscv@lists.infradead.org,
	Meng Zhang <zhangmeng.kevin@spacemit.com>
Subject: Re: [PATCH v3 11/11] riscv: dts: spacemit: add uart1 node for K1 SoC
Date: Thu, 4 Jul 2024 22:05:03 +0800	[thread overview]
Message-ID: <ZoasDzbOfQjxk9QZ@xhacker> (raw)
In-Reply-To: <20240703-k1-01-basic-dt-v3-11-12f73b47461e@gentoo.org>

On Wed, Jul 03, 2024 at 02:55:14PM +0000, Yixun Lan wrote:
> Devices in 0xf000,0000 - 0xf080,0000 are reserved for TEE purpose,
> so add uart1 here but mark its status as reserved.

This patch doesn't deserve a seperate patch, it's better to fold it
into the dtsi one.

> 
> Signed-off-by: Yixun Lan <dlan@gentoo.org>
> 
> ---
> This patch can be folded into "riscv: dts: add initial SpacemiT K1 SoC device tree",
> if maintainer finds it's too trivial to have an independent patch..
> ---
>  arch/riscv/boot/dts/spacemit/k1.dtsi | 10 ++++++++++
>  1 file changed, 10 insertions(+)
> 
> diff --git a/arch/riscv/boot/dts/spacemit/k1.dtsi b/arch/riscv/boot/dts/spacemit/k1.dtsi
> index a076e35855a2e..fee8921513c1f 100644
> --- a/arch/riscv/boot/dts/spacemit/k1.dtsi
> +++ b/arch/riscv/boot/dts/spacemit/k1.dtsi
> @@ -372,5 +372,15 @@ clint: timer@e4000000 {
>  					      <&cpu6_intc 3>, <&cpu6_intc 7>,
>  					      <&cpu7_intc 3>, <&cpu7_intc 7>;
>  		};
> +
> +		sec_uart1: serial@f0612000 {
> +			compatible = "spacemit,k1-uart", "intel,xscale-uart";
> +			reg = <0x0 0xf0612000 0x0 0x100>;
> +			interrupts = <43>;
> +			clock-frequency = <14857000>;
> +			reg-shift = <2>;
> +			reg-io-width = <4>;
> +			status = "reserved"; /* for TEE usage */
> +		};
>  	};
>  };
> 
> -- 
> 2.45.2
> 
> 
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