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From: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
To: Lukas Wunner <lukas@wunner.de>
Cc: Bjorn Helgaas <bhelgaas@google.com>,
	"Rafael J. Wysocki" <rafael@kernel.org>,
	Len Brown <lenb@kernel.org>,
	linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org,
	linux-acpi@vger.kernel.org, mika.westerberg@linux.intel.com,
	Hsin-Yi Wang <hsinyi@chromium.org>
Subject: Re: [PATCH v5 4/4] PCI: Allow PCI bridges to go to D3Hot on all Devicetree based platforms
Date: Mon, 5 Aug 2024 19:05:55 +0530	[thread overview]
Message-ID: <20240805133555.GC7274@thinkpad> (raw)
In-Reply-To: <ZqyxS8spZ-ohsP3R@wunner.de>

On Fri, Aug 02, 2024 at 12:13:31PM +0200, Lukas Wunner wrote:
> On Fri, Aug 02, 2024 at 11:25:03AM +0530, Manivannan Sadhasivam via B4 Relay wrote:
> > Unlike ACPI based platforms, there are no known issues with D3Hot for the
> > PCI bridges in the Devicetree based platforms. So let's allow the PCI
> > bridges to go to D3Hot during runtime. It should be noted that the bridges
> > need to be defined in Devicetree for this to work.
> [...]
> > +		if (state == PCI_D3hot && dev_of_node(&bridge->dev))
> > +			return true;
> 
> For such a simple change which several parties are interested in,
> I think it would be better to move it to the front of the series.
> 
> Patch [1/4] looks like an optimization (using a cached value)
> which this patch doesn't depend on.  Patch [2/4] looks like a
> change of bikeshed color which isn't strictly necessary for
> this fourth patch either.  If you want to propose those changes,
> fine, but by making this fourth patch depend on them, you risk
> delaying its acceptance.  As an upstreaming strategy it's usually
> smarter to move potentially controversial or unnecessary material
> to the back of the series, or submit it separately if it can be
> applied standalone.
> 

Agree with you! Even after doing upstreaming for this much time, I tend to
ignore this...

> 
> > Currently, D3Cold is not allowed since Vcc supply which is required for
> > transitioning the device to D3Cold is not exposed on all Devicetree based
> > platforms.
> 
> The PCI core cannot put devices into D3cold without help from the
> platform.  Checking whether D3cold is possible (or allowed or
> whatever) thus requires asking platform support code via
> platform_pci_power_manageable(), platform_pci_choose_state() etc.
> 
> I think patch [3/4] is a little confusing because it creates
> infrastructure to decide whether D3cold is supported (allowed?)
> but we already have that in the platform_pci_*() functions.
> So I'm not sure if patch [3/4] adds value.  I think generally
> speaking if D3hot isn't possible (allowed?), D3cold is assumed
> to not be possible either.
> 

Why? D3Hot is useful for runtime PM and if the platform doesn't want to do
runtime PM, it can always skip D3Hot (not ideal though). But D3Cold is a power
off state, and the platform may choose to use it for the case of system suspend.

So I still feel that decoupling D3Hot and D3Cold is necessary.

- Mani

-- 
மணிவண்ணன் சதாசிவம்

  reply	other threads:[~2024-08-05 13:36 UTC|newest]

Thread overview: 37+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-08-02  5:54 [PATCH v5 0/4] PCI: Allow D3Hot for PCI bridges in Devicetree based platforms Manivannan Sadhasivam
2024-08-02  5:54 ` Manivannan Sadhasivam via B4 Relay
2024-08-02  5:55 ` [PATCH v5 1/4] PCI/portdrv: Make use of pci_dev::bridge_d3 for checking the D3 possibility Manivannan Sadhasivam
2024-08-02  5:55   ` Manivannan Sadhasivam via B4 Relay
2024-08-02  9:49   ` Lukas Wunner
2024-08-02 11:19     ` Rafael J. Wysocki
2024-08-02 20:07       ` Lukas Wunner
2024-08-05 13:24         ` Manivannan Sadhasivam
2024-08-06  6:46           ` Lukas Wunner
2024-08-06 11:48             ` Manivannan Sadhasivam
2024-08-02  5:55 ` [PATCH v5 2/4] PCI: Rename pci_bridge_d3_possible() to pci_bridge_d3_allowed() Manivannan Sadhasivam
2024-08-02  5:55   ` Manivannan Sadhasivam via B4 Relay
2024-08-03 11:03   ` kernel test robot
2024-08-05 13:26     ` Manivannan Sadhasivam
2024-08-02  5:55 ` [PATCH v5 3/4] PCI: Decouple D3Hot and D3Cold handling for bridges Manivannan Sadhasivam
2024-08-02  5:55   ` Manivannan Sadhasivam via B4 Relay
2024-08-19 12:44   ` Oliver Neukum
2024-08-20  6:00     ` Manivannan Sadhasivam
2024-08-20 23:45       ` Bjorn Helgaas
2024-08-29  6:10         ` Manivannan Sadhasivam
2024-08-21  1:45   ` Bjorn Helgaas
2024-08-28 15:52     ` Manivannan Sadhasivam
2024-08-28 21:07       ` Bjorn Helgaas
2024-08-29  5:22         ` Manivannan Sadhasivam
2024-11-21 18:54           ` Brian Norris
2024-08-02  5:55 ` [PATCH v5 4/4] PCI: Allow PCI bridges to go to D3Hot on all Devicetree based platforms Manivannan Sadhasivam
2024-08-02  5:55   ` Manivannan Sadhasivam via B4 Relay
2024-08-02 10:13   ` Lukas Wunner
2024-08-05 13:35     ` Manivannan Sadhasivam [this message]
2024-08-06  6:53       ` Lukas Wunner
2024-08-06 12:41         ` Manivannan Sadhasivam
2024-08-06 13:02           ` Lukas Wunner
2024-08-06 14:39             ` Manivannan Sadhasivam
2024-08-06 20:20               ` Lukas Wunner
2024-08-19 15:34                 ` Manivannan Sadhasivam
2024-08-06 20:58               ` Hsin-Yi Wang
2024-11-21 18:53   ` Brian Norris

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