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From: Brian Norris <briannorris@chromium.org>
To: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Cc: Bjorn Helgaas <helgaas@kernel.org>,
	Bjorn Helgaas <bhelgaas@google.com>,
	"Rafael J. Wysocki" <rafael@kernel.org>,
	Len Brown <lenb@kernel.org>,
	linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org,
	linux-acpi@vger.kernel.org, lukas@wunner.de,
	mika.westerberg@linux.intel.com,
	Hsin-Yi Wang <hsinyi@chromium.org>
Subject: Re: [PATCH v5 3/4] PCI: Decouple D3Hot and D3Cold handling for bridges
Date: Thu, 21 Nov 2024 10:54:28 -0800	[thread overview]
Message-ID: <Zz-B5DSJx6z_FEQ4@google.com> (raw)
In-Reply-To: <20240829052244.6jekalgshzlbz5hp@thinkpad>

Hi Manivannan,

On Thu, Aug 29, 2024 at 10:52:44AM +0530, Manivannan Sadhasivam wrote:
> On Wed, Aug 28, 2024 at 04:07:05PM -0500, Bjorn Helgaas wrote:
> > On Wed, Aug 28, 2024 at 09:22:17PM +0530, Manivannan Sadhasivam wrote:
> > > I can, but I do not want these cleanups/refactoring to delay merging
> > > the patch 4. Are you OK if I just send it standalone and work on the
> > > refactoring as a separate series?
> > 
> > You mean to send patch 4/4 standalone, and do the rest separately?
> > That sounds reasonable to me.
> 
> Ack, thanks.

Did this ever happen? I ask, because I'm also interested in supporting
D3hot for bridges on device tree systems, and it seems like there's
pretty clear agreement that pci_bridge_d3_possible() should not prevent
it.

If there isn't an updated posting and plan to merge yet, would you mind
if I submitted one myself, carrying links to your work for
back-reference?

Also, I had some questions on patch 4, as I think it places too much
restriction on how the DT should look. So I might tweak it a bit if I
send a new revision.

Brian

  reply	other threads:[~2024-11-21 18:54 UTC|newest]

Thread overview: 37+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-08-02  5:54 [PATCH v5 0/4] PCI: Allow D3Hot for PCI bridges in Devicetree based platforms Manivannan Sadhasivam
2024-08-02  5:54 ` Manivannan Sadhasivam via B4 Relay
2024-08-02  5:55 ` [PATCH v5 1/4] PCI/portdrv: Make use of pci_dev::bridge_d3 for checking the D3 possibility Manivannan Sadhasivam
2024-08-02  5:55   ` Manivannan Sadhasivam via B4 Relay
2024-08-02  9:49   ` Lukas Wunner
2024-08-02 11:19     ` Rafael J. Wysocki
2024-08-02 20:07       ` Lukas Wunner
2024-08-05 13:24         ` Manivannan Sadhasivam
2024-08-06  6:46           ` Lukas Wunner
2024-08-06 11:48             ` Manivannan Sadhasivam
2024-08-02  5:55 ` [PATCH v5 2/4] PCI: Rename pci_bridge_d3_possible() to pci_bridge_d3_allowed() Manivannan Sadhasivam
2024-08-02  5:55   ` Manivannan Sadhasivam via B4 Relay
2024-08-03 11:03   ` kernel test robot
2024-08-05 13:26     ` Manivannan Sadhasivam
2024-08-02  5:55 ` [PATCH v5 3/4] PCI: Decouple D3Hot and D3Cold handling for bridges Manivannan Sadhasivam
2024-08-02  5:55   ` Manivannan Sadhasivam via B4 Relay
2024-08-19 12:44   ` Oliver Neukum
2024-08-20  6:00     ` Manivannan Sadhasivam
2024-08-20 23:45       ` Bjorn Helgaas
2024-08-29  6:10         ` Manivannan Sadhasivam
2024-08-21  1:45   ` Bjorn Helgaas
2024-08-28 15:52     ` Manivannan Sadhasivam
2024-08-28 21:07       ` Bjorn Helgaas
2024-08-29  5:22         ` Manivannan Sadhasivam
2024-11-21 18:54           ` Brian Norris [this message]
2024-08-02  5:55 ` [PATCH v5 4/4] PCI: Allow PCI bridges to go to D3Hot on all Devicetree based platforms Manivannan Sadhasivam
2024-08-02  5:55   ` Manivannan Sadhasivam via B4 Relay
2024-08-02 10:13   ` Lukas Wunner
2024-08-05 13:35     ` Manivannan Sadhasivam
2024-08-06  6:53       ` Lukas Wunner
2024-08-06 12:41         ` Manivannan Sadhasivam
2024-08-06 13:02           ` Lukas Wunner
2024-08-06 14:39             ` Manivannan Sadhasivam
2024-08-06 20:20               ` Lukas Wunner
2024-08-19 15:34                 ` Manivannan Sadhasivam
2024-08-06 20:58               ` Hsin-Yi Wang
2024-11-21 18:53   ` Brian Norris

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