From: Jakub Kicinski <kuba@kernel.org>
To: Alexander Lobakin <aleksander.lobakin@intel.com>
Cc: "netdev@vger.kernel.org" <netdev@vger.kernel.org>,
"Kolacinski, Karol" <karol.kolacinski@intel.com>,
"intel-wired-lan@lists.osuosl.org"
<intel-wired-lan@lists.osuosl.org>,
"Kitszel, Przemyslaw" <przemyslaw.kitszel@intel.com>,
"Keller, Jacob E" <jacob.e.keller@intel.com>,
"Nguyen, Anthony L" <anthony.l.nguyen@intel.com>
Subject: Re: [Intel-wired-lan] [PATCH v3 iwl-next 4/4] ice: combine cross timestamp functions for E82x and E830
Date: Thu, 8 Aug 2024 07:20:58 -0700 [thread overview]
Message-ID: <20240808072058.09215916@kernel.org> (raw)
In-Reply-To: <52af8b88-8814-4861-aba0-4bc726c95740@intel.com>
On Thu, 8 Aug 2024 15:00:52 +0200 Alexander Lobakin wrote:
> > Technically, neither ART nor TSC are directly related to the PTP cross
> > timestamp. It's just the implementation on Intel NICs, where those
> > NICs use x86 ART to crosstimestamp.
> >
> > For cross timestamp on ARM, it's also HW specific and depends on which
> > timer the HW uses for timestamping. I'm not really sure what's the HW
> > protocol in this case and if e.g. E830 can latch other timers than
> > x86 ART in its ART_TIME registers.
> >
> > get_device_system_crosststamp() supports multiple clock sources defined
> > in enum clocksource_ids. Maybe instead of checking ART flag, the driver
> > could get clocksources and if CSID_X86_ART is available, it would assign
> > the pointer to crosststamp function, but I'm not convinced.
>
> I mean, I'm fine with the arch-specific definitions in the driver as
> long as the netdev maintainers are fine. Or maybe they could propose
> some generic solution.
I don't like it either, FWIW, but it seems like this is what everyone
is doing. Please do CC tglx / the time maintainers on the next version
and net-next submission. I get the feeling they will wake up in a year
telling us we did it all wrong, but hey, all we can do now is CC them..
WARNING: multiple messages have this Message-ID (diff)
From: Jakub Kicinski <kuba@kernel.org>
To: Alexander Lobakin <aleksander.lobakin@intel.com>
Cc: "Kolacinski, Karol" <karol.kolacinski@intel.com>,
"intel-wired-lan@lists.osuosl.org"
<intel-wired-lan@lists.osuosl.org>,
"Keller, Jacob E" <jacob.e.keller@intel.com>,
"netdev@vger.kernel.org" <netdev@vger.kernel.org>,
"Nguyen, Anthony L" <anthony.l.nguyen@intel.com>,
"Kitszel, Przemyslaw" <przemyslaw.kitszel@intel.com>
Subject: Re: [Intel-wired-lan] [PATCH v3 iwl-next 4/4] ice: combine cross timestamp functions for E82x and E830
Date: Thu, 8 Aug 2024 07:20:58 -0700 [thread overview]
Message-ID: <20240808072058.09215916@kernel.org> (raw)
In-Reply-To: <52af8b88-8814-4861-aba0-4bc726c95740@intel.com>
On Thu, 8 Aug 2024 15:00:52 +0200 Alexander Lobakin wrote:
> > Technically, neither ART nor TSC are directly related to the PTP cross
> > timestamp. It's just the implementation on Intel NICs, where those
> > NICs use x86 ART to crosstimestamp.
> >
> > For cross timestamp on ARM, it's also HW specific and depends on which
> > timer the HW uses for timestamping. I'm not really sure what's the HW
> > protocol in this case and if e.g. E830 can latch other timers than
> > x86 ART in its ART_TIME registers.
> >
> > get_device_system_crosststamp() supports multiple clock sources defined
> > in enum clocksource_ids. Maybe instead of checking ART flag, the driver
> > could get clocksources and if CSID_X86_ART is available, it would assign
> > the pointer to crosststamp function, but I'm not convinced.
>
> I mean, I'm fine with the arch-specific definitions in the driver as
> long as the netdev maintainers are fine. Or maybe they could propose
> some generic solution.
I don't like it either, FWIW, but it seems like this is what everyone
is doing. Please do CC tglx / the time maintainers on the next version
and net-next submission. I get the feeling they will wake up in a year
telling us we did it all wrong, but hey, all we can do now is CC them..
next prev parent reply other threads:[~2024-08-08 14:21 UTC|newest]
Thread overview: 32+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-07-25 9:34 [Intel-wired-lan] [PATCH v3 iwl-next 0/4] ice: Implement PTP support for E830 devices Karol Kolacinski
2024-07-25 9:34 ` Karol Kolacinski
2024-07-25 9:34 ` [Intel-wired-lan] [PATCH v3 iwl-next 1/4] " Karol Kolacinski
2024-07-25 9:34 ` Karol Kolacinski
2024-07-26 13:17 ` [Intel-wired-lan] " Alexander Lobakin
2024-07-26 13:17 ` Alexander Lobakin
2024-07-25 9:34 ` [Intel-wired-lan] [PATCH v3 iwl-next 2/4] ice: Process TSYN IRQ in a separate function Karol Kolacinski
2024-07-25 9:34 ` Karol Kolacinski
2024-07-26 13:22 ` [Intel-wired-lan] " Alexander Lobakin
2024-07-26 13:22 ` Alexander Lobakin
2024-07-25 9:34 ` [Intel-wired-lan] [PATCH v3 iwl-next 3/4] ice: Add timestamp ready bitmap for E830 products Karol Kolacinski
2024-07-25 9:34 ` Karol Kolacinski
2024-07-26 13:25 ` [Intel-wired-lan] " Alexander Lobakin
2024-07-26 13:25 ` Alexander Lobakin
2024-07-25 9:34 ` [Intel-wired-lan] [PATCH v3 iwl-next 4/4] ice: combine cross timestamp functions for E82x and E830 Karol Kolacinski
2024-07-25 9:34 ` Karol Kolacinski
2024-07-25 16:31 ` [Intel-wired-lan] " Jacob Keller
2024-07-25 16:31 ` Jacob Keller
2024-07-26 13:37 ` [Intel-wired-lan] " Alexander Lobakin
2024-07-26 13:37 ` Alexander Lobakin
2024-07-26 23:16 ` Jacob Keller
2024-07-26 23:16 ` Jacob Keller
2024-08-05 16:21 ` Kolacinski, Karol
2024-08-05 16:21 ` Kolacinski, Karol
2024-08-07 13:54 ` Alexander Lobakin
2024-08-07 13:54 ` Alexander Lobakin
2024-08-07 14:26 ` Kolacinski, Karol
2024-08-07 14:26 ` Kolacinski, Karol
2024-08-08 13:00 ` Alexander Lobakin
2024-08-08 13:00 ` Alexander Lobakin
2024-08-08 14:20 ` Jakub Kicinski [this message]
2024-08-08 14:20 ` Jakub Kicinski
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